JPH01160017A - Detection of end point of development - Google Patents

Abstract

PURPOSE:To form a minute contact hole in high yields by forming a layer containing a luminescence material on a layer being processed and covering it with a resist layer, by exposing and developing the resist layer and making a hole, and by confirming the exposure of the layer containing a luminescence material at the position and dry-etching. CONSTITUTION:A luminescence material contained layer 16 is disposed between a layer to he processed 12 and a resist layer 15 since the presence of a residue resist on the bottom of a minute hole of a hole diameter of about 1mum produced on a resists layer by an exposure and development process cannot he observed accurately by an ordinary observation under a microscope. This enables the presence of residue resist on the bottom of a hole 17 to be checked visually. Since this makes the bottom of a hole emit light by the light used under a microscopic check, residue resist at the position which a contact hole is formed can be detected by the presence or absence of light emission.

Description

[Detailed Description of the Invention] [Summary] Regarding the formation of contact holes used in the formation of semiconductor integrated circuits, the purpose of forming fine contact holes with a high yield is to photo-etch a layer to be processed formed on a semiconductor substrate. In the process of making a plurality of holes using a technique, a resist layer is coated after forming a fluorescent agent-containing layer on the treated layer,
After exposing and developing the resist layer and making holes at the required positions,
A method for detecting the development end point in photolithography is constructed by confirming the exposure of the fluorescent agent-containing layer at the position and performing dry etching.

[Industrial application field]

The present invention relates to a method for detecting the end point of development in a photolithography process in which a large number of micropores are formed using photolithography.

Semiconductor integrated circuits are manufactured using ion implantation technology, thin film formation technology, photolithography technology (photolithography or electron beam lithography), etc. on a substrate made of a single semiconductor such as silicon (Si) or a compound semiconductor such as gallium arsenide (GaAs). A circuit consisting of a large number of semiconductor unit elements is formed by using a semiconductor chip, but as information processing technology advances, the size and capacity have become smaller, and the degree of integration has increased from IC to LSI, and from LSI to VLSI. .

However, such improvement in the degree of integration is not achieved by increasing the area of the elements (chips) on which integrated circuits are formed, but by miniaturizing the unit elements. Pattern widths have been extremely reduced.

[Conventional technology]

Semiconductor integrated circuits use ion implantation technology to form semiconductor regions on semiconductor substrates (wafers), thin film formation technology to form insulating layers and conductor layers, and photolithography technology to form hexagonal and fine patterns. It is formed by a process such as forming.

What about figure 3? This is a cross-sectional view showing the configuration of an IO5I-transistor, and to explain the manufacturing method of a semiconductor integrated circuit using this formation process as an example, a chemical vapor deposition method (abbreviated as CVD method) is used to deposit a semiconductor integrated circuit on a wafer 1 made of Si. After coating with an oxidation-resistant insulating layer made of silicon nitride (SiJ4), this insulating layer is removed using photolithography leaving a transistor forming area, and the remaining insulating layer is used as a cover to expose the insulating layer to an oxygen stream containing water vapor. A thermal oxidation treatment is performed to form a separation insulating layer 2 of 5 iOz to insulate the transistor formation region from the surroundings.

Next, after removing the Si:+N4 layer used as a cover, a heat treatment is performed to form a first insulating layer 3 made of SiO□ in the transistor formation region.

Next, a poly-Si layer 4 is formed on the surface of the wafer 1 by the CVD method, and then the poly-Si layer 4 is removed using photolithography, leaving a gate electrode formation region.

Next, the Si wafer 1 subjected to the above treatment is heat-treated to form a second insulating layer 5 made of SiO□ on the substrate surface of the transistor formation region and the surface of the poly-Si layer 4 that will become the gate electrode. Ion implantation is performed using poly-Si layer 4 as a mask, and then heat treatment is performed to activate the implanted ions to form source region 6 and drain region 7.

Next, a third insulating layer 8 made of phosphosilicate glass (abbreviated as PSG) is formed on the Si wafer 1 that has been subjected to the above treatment by CVD, and then reactive ion etching (abbreviated as RIE) is performed. The third insulating layer 8 is formed by the photolithographic technique used.
Contact holes 9 are formed by selectively etching the second insulating layer 5 to reach the source region 6 and drain region 7.
Drill a hole.

Next, a conductive layer made of metal is formed by a method such as sputtering on the third insulating layer 8 in which the contact hole 9 has been formed, and then the conductive layer is selectively etched using photolithography to form a source electrode. By forming a drain electrode 10 and a drain electrode 11, a MOS transistor is completed.

In this way, semiconductor integrated circuits are manufactured using thin film formation technology, photolithography technology, ion implantation technology, etc.
As integration progresses and unit elements become smaller, it has become difficult to confirm patterns formed using photolithographic techniques, and in particular it has become difficult to form contact holes.

That is, in order to form a contact I hole, as shown in FIG.
After a resist film 13 is coated on the top by a spin code method, this resist film 13 is subjected to projection exposure to expose the resist film 13 above the contact hole forming position 14, and then developed to open a window in the resist film 13. Then, RIE is performed using this resist film 13 as a mask, and the layer to be processed 12 is opened to form a contact hole.

In this case, it is necessary that the holes provided in the resist film 13 completely reach the layer to be processed 12, and if there is residual resist 15 as shown on the right side of the figure, R
Since a gas is selected and used as an etchant for IE so that the etching speed of the layer 12 to be processed is much higher than that of the resist, RIE
There is a problem in that even if this is done, the contact hole can only be formed incompletely.

Therefore, after the resist film 13 is selectively exposed and developed, it is necessary to make sure that the window is completely opened to the layer to be processed 12 and that there is no residual resist 15, prior to the RIE process.

This confirmation work is called a development inspection, but since the contact holes in the original IC elements were large, several μm square, the presence or absence of residual resist 15 can be visually confirmed through microscopic inspection, indicating that residual resist exists. It was possible to remove it as a development defect.

However, as integration has progressed, unit elements have become smaller and the size of contact holes has become smaller, 1 μm or less, making detection difficult even by microscopic inspection, which is a cause of lower manufacturing yields.

Therefore, it has been desired to put into practical use a method that allows the residual resist 15 present at the bottom of the resist film 13 opened at the contact hole formation position 14 to be visually recognized.

[Problem that the invention seeks to solve]

As mentioned above, in chips with advanced integration such as LSI and VLSI, the size of contact holes has been reduced to about 1 μm square. The problem is to establish a method for detecting whether or not residual resist exists at the bottom of an opened hole.

In addition, as a way to solve this problem, it seems to be a good idea to extend the development time to completely dissolve the resist in the exposed area, but in this case, the diameter of the contact hole also increases, causing a pattern short circuit, so the development conditions should be changed. cannot be changed.

[Means for solving problems]

The above problem occurs in the process of drilling multiple holes using photolithography in a layer to be processed formed on a semiconductor substrate.
After forming a fluorescent-side containing layer on this layer to be treated, a resist layer is coated, and this resist layer is exposed and developed to make a hole at the required position, and then the exposure of the fluorescent-side containing layer at this position is confirmed. However, this problem can be solved by using a development end point detection method that involves dry etching.

[Effect]

The first aspect of the present invention is that ordinary microscopic observation cannot accurately observe whether there is residual resist at the bottom of microscopic holes with a diameter of about 1 μm that are created in the resist layer by exposure and development processing. As shown in the figure, the fluorescent side containing layer 16
Processed layer 12 and resist layer 13 on which pattern shorting is performed
This allows the presence or absence of residual resist at the bottom of the hole 17 to be visually confirmed.

In this case, a fluorescent agent is a material that absorbs ultraviolet rays and visible light and emits visible light with a longer wavelength.There are two types of materials: inorganic materials and organic materials. Organic fluorescent agents are suitable for providing the fluorescent side containing layer.

Then, the fluorescent agent is mixed with a material that does not dissolve in the developer but is easily etched in the reaction gas used for RIE.
It is applied in a state where spin code is possible.

In this way, the bottom of the hole emits light using the light used in the microscopic examination, and the residual resist at the recontact hole formation position can be detected based on the presence or absence of light emission.

〔Example〕

Fluorescein, which emits green light with a wavelength of 5,300 to 5,700, was used as an organic fluorescent agent, and was mixed with a conventional negative resist to produce a fluorescent paint.

This was then used to form contact holes in the MOS transistor manufacturing process described above with reference to FIG.

That is, after forming the third insulating layer made of PSG,
After applying fluorescent paint to a thickness of approximately 30 nm using the spin code method, a positive resist was applied to a thickness of 1.1 μm as before.
After drying, the resist layer 1 on each source region and drain region is exposed by projection and developed.
A μm square hole was formed.

Next, when this wafer was observed under a microscope, the holes provided at the contact hole formation positions emitted green light, and the holes where residual resist existed did not emit light, so it was possible to easily determine whether the wafer was good or bad.

Next, for a good wafer, methane trifluoride (C) lFl
) to form contact holes reaching the source and drain regions.

Note that the presence or absence of residual resist in microscopic holes can be determined not by microscopic observation as shown in this example, but also by an optical method that uses laser light and compares the positions of microscopic holes in a regular sample to determine pass/fail. It can be carried out.

〔Effect of the invention〕

By using the present invention in which a fluorescent agent-containing layer is provided under the resist layer, it is possible to detect residual resist after exposure and development of the resist layer when forming microholes such as contact holes using photolithography. This makes it possible to improve the manufacturing yield of microholes.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing the detection method according to the present invention, FIG. 2 is a sectional view showing the conventional contact 1-hole forming method, and FIG. 3 is a sectional view showing the configuration of a MOS transistor.
It is. In the figure, 1 is a Si wafer, 12 is a layer to be processed, 13 is a resist layer, 14 is a contact hole formation position, 15 is a residual resist, 16 is a fluorescent agent-containing layer, 1
7 is a hole.

Claims (1)

[Claims] In a processing step of forming a plurality of through holes in a layer to be processed formed on a semiconductor substrate using photolithography, a resist layer is formed after forming a fluorescent agent-containing layer on the layer to be processed. A method for detecting the end point of development in photolithography, which comprises coating the resist layer with a resist layer, exposing and developing the resist layer to make holes at required positions, confirming the exposure of the fluorescent agent-containing layer at the positions, and performing dry etching. .