JPH01154512A - Semiconductor crystal - Google Patents

Abstract

PURPOSE:To reduce the density of dislocation occurring in a second semiconductor crystal, by arranging a layerlike insulating material on an Si substrate crystal, arranging thereon a layerlike Si single crystal layer, and further arranging thereon a specified second semiconductor layer setting the Si single crystal as a reference. CONSTITUTION:Oxygen ions are implanted into an Si substrate crystal 4, on which GaAs crystal 1 is epitaxially grown by MBE method. During the epitaxial growth, an SiO2 insulating film 3 is automatically formed, and a thin Si crystal layer 2 is made by a thermal process in the course of the epitaxial growth. The stress due to lattice mismatching between a GaAs layer 8 and an Si layer 9 is mainly intensively applied to the thin Si crystal layer side, and the thin Si crystal layer of the Si layer 9 deforms in the lateral direction. However, the thin SiO2 film automatically formed during the thermal process acts as a buffer layer, so that the deformation of the thin Si crystal layer of the Si layer 9 is relieved at the boundary surface between an SiO2 film 10 and the Si layer 9, and dose not propagate to an Si substrate crystal 11. Further, since the thin SiO2 film of the Si layer 9 deforms, the stress to the GaAs epitaxial layer 8 remarkably decreases, and the generation of dislocation in the epitaxial layer is restrained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is suitable for suppressing the occurrence of dislocations due to lattice constant mismatch when producing a heterogeneous semiconductor with a large difference in lattice constants on a Si substrate crystal. Regarding the structure.

[Conventional technology]

An example of a dissimilar semiconductor crystal with a large lattice constant difference provided on a conventional Si substrate crystal is the Japanese Journal of Applied Physics (Japanese J
Internal of Applied Physics
), Vol. 23 (1984), pp. 5843-584
Discussed on page 5.

[Problem that the invention seeks to solve]

In the prior art, crystal lattice mismatch occurs only in the second abnormal semiconductor layer provided on the Si substrate crystal. Therefore, there is a limit to the suppression of high-density dislocations that occur due to lattice mismatch, and the characteristics of semiconductor devices fabricated in the epitaxial layer are significantly deteriorated.

An object of the present invention is to reduce the density of dislocations generated in the second semiconductor crystal by alleviating lattice mismatch even in the Si crystal.

A further object of the present invention is to alleviate lattice mismatch in both the Si substrate crystal and the epitaxial layer, thereby reducing the dislocation density generated in the epitaxial semiconductor layer.

[Means for solving problems]

The above purpose is to sandwich an insulating layer between the Si crystal layer adjacent to the second heterogeneous semiconductor crystal and the Si substrate crystal, thereby relieving strain at the interface between the insulating layer and the Si crystal. This is achieved by reducing the strain stress applied to the

That is, a layered insulating material is provided on a Si substrate crystal, a layered Si single crystal layer is provided thereon, and a second semiconductor having a lattice constant difference of 1% or more with respect to the Si single crystal layer is further provided on top of the layered insulating material. It provides layers.

Further, the above object is achieved by introducing dislocations into the Si substrate crystal by ion implantation and distributing the relaxation of strain caused by lattice mismatch with the epitaxial crystal to both the substrate crystal and the epitaxial crystal.

That is, Si with dislocations introduced near the surface by ion implantation
On the substrate crystal, there is a difference in lattice constant of 1 with respect to the Si single crystal.
This is achieved by using a semiconductor crystal in which a second semiconductor material with a ratio of /Zoo percent or more is epitaxially grown.

[Effect]

Since the lattice constants of the Si single crystal and the second heterogeneous semiconductor crystal are significantly different, the second semiconductor crystal layer and the adjacent S
A large strain stress is applied to the i-crystal layer. Since this stress is also applied to the interface between the insulating layer and the Si crystal, which are sandwiched between the Si crystals, dislocations occur here and the strain is relaxed. Therefore, the strain stress caused by the lattice mismatch between the Si crystal and the second semiconductor crystal significantly reduces the dislocation density generated in the second semiconductor crystal, compared to the conventional case where the strain stress is relaxed only in the second semiconductor crystal. can be reduced.

In the case of the second method, that is, introducing dislocations into the Si substrate crystal by ion implantation, the following can be considered.

Ions implanted into the Si substrate crystal generate high-density dislocations near the depth to which the implanted ions reach the Si substrate crystal.

In this state, a second semiconductor material having a large lattice constant difference is epitaxially grown.

Lattice mismatch is caused by dislocations occurring in the epitaxial crystal and S
It is relaxed by both dislocations generated in the i-substrate crystal.

By relaxing the lattice mismatch, which was conventionally imposed only on the epitaxial crystal layer, also on the Si substrate crystal side, it is possible to reduce the dislocation density generated in the epitaxial crystal.

〔Example〕

Embodiment 1 An embodiment of the present invention will be described below with reference to FIGS. 1, 2, and 3.

Figure 1 shows an areal density of 5X 10 on a (100) Si substrate crystal 4.
This is the structure that is created by implanting oxygen ions at 1scm-" and an acceleration voltage of 180 and epitaxially growing a GaAs crystal 1 using the MBE method. 3 in the figure is a SiOx insulating film that is automatically formed during epitaxial growth. 2 is a thin Si crystal layer also created by a thermal process during epitaxial growth.
When a As crystal is grown epitaxially,
As schematically shown in FIG. 2, a high density of dislocations occurs at the hetero interface. That is, the lattice constant of the Si substrate crystal shown in 7 and 5
Since the lattice constants of the GaAs single crystals shown by 6 have a large difference of about 4%, a large strain stress is applied to the GaAs epitaxial crystal layer, and dislocations as shown by 6 are introduced at a high density. On the other hand, when this example is used, the crystal structure becomes as shown in FIG. That is, G a A s 758 and S
Stress due to lattice mismatch in i-layer 9 is strongly applied mainly to the thin Si crystal layer side, and the thin Si crystal layer 9 is laterally distorted.

In this example, a thin 5
The iOz film becomes a buffer layer, and the strain in the thin Si crystal layer 9 is relaxed at the interface with the 5iOi layer 1o, and the Si crystal layer 11
It is not transmitted to the substrate crystal. Furthermore, the stress on the GaAs epitaxial layer 8 is greatly reduced due to the distortion of the thin 5ift layer 9, and the generation of dislocations in the epitaxially grown layer is significantly suppressed.

When the structure of this example is used, the dislocation density in the GaAs epitaxial layer is suppressed to about 1/3 of that of the conventional structure.

In this embodiment, the structure shown in FIG. 1 is provided over the entire surface of the Si substrate crystal, but the same effect can be obtained even if the structure is formed only in a partial region of the substrate crystal.

Further, when automatically forming an insulating film layer by ion implantation as in this embodiment, it is also possible to use other ion species such as N and P.

Embodiment 2 A second embodiment of the present invention will be described with reference to FIG. 1, FIG. 2(a), and FIG. 2(b).

As shown in FIG. 4, a dislocation-free Si wafer 14 tilted 2 degrees from the plane orientation (100) to the [110] direction is used as the substrate crystal, and a part of the area has an areal density of 1×1018an-2,
Arsenic ions were implanted at an accelerating voltage of 100 KV. As a result, an ion implantation layer 12 with a depth of about 3000 people is formed.
Further, a high-density dislocation region 3 is created near the ion reach distance. 11 in the figure is epitaxially grown Ga A
Although it is an s-crystal layer, the dislocations shown in 3 are considerably recovered by the thermal process during epitaxial growth. But G
Dislocations introduced into the Si substrate crystal due to mismatch between the aAs crystal lattice and the Si crystal lattice are not completely eliminated.

FIG. 6 shows this situation. That is, G a A
Part of the strain caused by the lattice mismatch between s18 and 5i21 is relaxed by dislocations 19 generated at the hetero interface, and the rest is relaxed by dislocations 20 introduced into the Si substrate crystal 21. On the other hand, FIG. 5 schematically shows the structure of a conventionally produced GaAs epitaxial crystal on a Si substrate crystal. Since all the lattice mismatch between the GaAs epilayer 15 and the Si substrate crystal 17 is alleviated by the dislocations 16 generated at the hetero interface, it has been difficult to suppress the density of these dislocations below a certain amount. In this example, part of the strain is relaxed by dislocations in the Si substrate crystal, so it is possible to reduce the dislocation density of the GaAs epitaxial layer.

Under the ion implantation conditions of this example, the dislocation density in the GaAs epitaxial crystal layer provided on the ion implantation region was reduced to about 173 compared to the case where ion implantation was not performed.

Although arsenic was selected as the ion species in this example, similar effects can be obtained using other ions. Further, in this embodiment, ions were implanted only into a partial region within the crystal plane of the Si substrate, but the same effect can be obtained even if ions are implanted over the entire surface of the substrate.

〔Effect of the invention〕

According to the present invention, the dislocation density in the second semiconductor crystal provided on the Si substrate crystal can be reduced to about 1/3 of that of the conventional structure, so that the characteristics of the semiconductor element manufactured in the second crystal layer can be reduced. It has an improving effect. In particular, in a semiconductor device (for example, a bipolar transistor) that operates using minority carriers in the second semiconductor crystal, the lifetime of the minority carriers can be increased by about three times or more by reducing dislocations, so that the characteristics can be significantly improved.

Furthermore, according to the second means, the dislocation density in the second semiconductor crystal layer having a lattice constant difference of 1/100 percent or more with respect to the Si single crystal epitaxially grown on the Si substrate crystal is reduced from that of the conventional structure. Since it can be reduced to about 1/3, it has the effect of improving the characteristics of semiconductor elements manufactured in epitaxial crystal layers.

In particular, in a semiconductor device (for example, a bipolar transistor) that operates using minority carriers in an epitaxial crystal, the minority carrier lifetime can be increased by about three times or more, resulting in a significant improvement in characteristics.

[Brief explanation of the drawing]

FIG. 1 is a crystal cross-sectional view of an embodiment of the present invention, FIG. 2 is a schematic diagram showing the crystal structure of a GaAs/Si crystal produced by a conventional technique, and FIG. 3 is a crystal cross-sectional view of an embodiment of the present invention. FIG. 2 is a schematic diagram showing an example crystal structure. FIG. 4 is a cross-sectional view of a GaAs/Si crystal according to an embodiment of the present invention. Figure 5 shows the G a A s/S fabricated using the conventional technology.
FIG. 6 is a schematic diagram showing the crystal structure of an i-crystal. FIG. 6 is a schematic diagram showing the crystal structure of an embodiment of the present invention. 1...G a As epitaxial crystal layer, 2...
・Si crystal layer, 3...5ift film, 4...Si substrate crystal, 5...crystal lattice of GaAs epitaxial crystal layer, 6...dislocation generated at hetero interface, 7...Si
Crystal lattice of substrate crystal, 8... Crystal lattice of GaAs epitaxial crystal layer, 9... Crystal lattice of Si crystal layer, 1
0...5iOz film, 11...Crystal lattice of Si substrate crystal, 11...GaAs epitaxial crystal layer, 12...
...Ion implantation layer, 13...Dislocation generation region, 14...
・Si substrate crystal, 15,18...Crystal lattice of GaAs epitaxial crystal layer, 16.19...Dislocation generated at the hetero interface, 17,21...Crystal lattice of Si substrate crystal, 18. ...Crystal lattice of GaAs epitaxial crystal layer, 19...Dislocation generated at the hetero interface, 20...Dislocation generated in the Si substrate crystal.

Claims (1)

[Claims] 1. A layered insulating material is provided on a Si substrate crystal, a layered Si single crystal layer is provided thereon, and a second semiconductor crystal layer having a lattice constant difference of 1% or more with respect to the Si single crystal layer is further provided thereon. A semiconductor crystal characterized by having a portion provided with.