JPH01152750A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH01152750A JPH01152750A JP31353587A JP31353587A JPH01152750A JP H01152750 A JPH01152750 A JP H01152750A JP 31353587 A JP31353587 A JP 31353587A JP 31353587 A JP31353587 A JP 31353587A JP H01152750 A JPH01152750 A JP H01152750A
- Authority
- JP
- Japan
- Prior art keywords
- silicone resin
- whole
- resin
- semiconductor pellet
- wiring substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 29
- 229920002050 silicone resin Polymers 0.000 claims abstract description 32
- 239000008188 pellet Substances 0.000 claims abstract description 18
- 239000005011 phenolic resin Substances 0.000 claims abstract description 9
- 229920005989 resin Polymers 0.000 claims abstract description 3
- 239000011347 resin Substances 0.000 claims abstract description 3
- 229920001296 polysiloxane Polymers 0.000 claims description 3
- 239000000463 material Substances 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract description 3
- 239000000758 substrate Substances 0.000 abstract 5
- 230000002265 prevention Effects 0.000 abstract 1
- ZWEHNKRNPOVVGH-UHFFFAOYSA-N 2-Butanone Chemical compound CCC(C)=O ZWEHNKRNPOVVGH-UHFFFAOYSA-N 0.000 description 3
- 239000001307 helium Substances 0.000 description 3
- 229910052734 helium Inorganic materials 0.000 description 3
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 3
- 238000004806 packaging method and process Methods 0.000 description 3
- 239000003960 organic solvent Substances 0.000 description 2
- 238000012827 research and development Methods 0.000 description 2
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- 230000005260 alpha ray Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 229920001971 elastomer Polymers 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置に関し、特にメモリ等のフリップチ
ップ型の半導体チップを内蔵した半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device incorporating a flip-chip type semiconductor chip such as a memory.
従来のこの種の半導体装置の一例としては、アイビイエ
ム ジャーナル オブ リサーチ アンド デベルプメ
ント（ＩＢＭ Ｊｏｕｒｎａｌ ｏｆ Ｒｅ５ｅａｒｃ
ｈａｎｄ Ｄｅｖｅｌｏｐｍｅｎｔ）、第２６巻第１号
、ＪＡＮ。An example of a conventional semiconductor device of this type is the IBM Journal of Research and Development (IBM Journal of Research and Development).
hand Development), Volume 26, No. 1, JAN.
１９８２．２〜６９頁、及び同誌第２６巻第３号、ＭＡ
Ｙ、１９８２．３６２〜３７１頁記載の半導体装置を上
げることができる。1982.2-69, and the same magazine, Vol. 26, No. 3, MA
Y, 1982, pp. 362-371.
この半導体装置は、第２図に示すように、配線基板１上
にフリップチップ型の半導体ペレット２を搭載したあと
、全体をヘリウム７を充てんした容器６の中に入れて封
止した構造となっている。As shown in FIG. 2, this semiconductor device has a structure in which a flip-chip type semiconductor pellet 2 is mounted on a wiring board 1, and then the whole is placed in a container 6 filled with helium 7 and sealed. ing.
上述した従来の半導体装置は、ヘリウムガス７を充てん
した容器６内に半導体ベレットを封入する構造となって
°いるので、耐湿性等を確保しているため全体として体
積が大きくなり、その結果単位体積当りの実装密度が小
さくなり、またα線によるソフトエラーを防止するため
には、低α化された配線基板、配線材料を使わざるを得
す、コスト高となるという欠点がある。The conventional semiconductor device described above has a structure in which a semiconductor pellet is enclosed in a container 6 filled with helium gas 7, so the overall volume is large due to moisture resistance etc. The packaging density per volume is low, and in order to prevent soft errors caused by α rays, it is necessary to use wiring boards and wiring materials with low α, resulting in high costs.
本発明の目的は、全体を小型化することができて実装密
度を上げることができ、かつα線によるソフトエラーの
防止を低コストにより実現することができる半導体装置
を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device that can be miniaturized as a whole, can increase packaging density, and can prevent soft errors caused by alpha rays at low cost.
本発明の半導体装置は、配線基板と、この配線基板上に
搭載されたフリップチップ型の半導体ペレットと、この
半導体ペレットと前記配線基板との間の間隙を充てんし
かつこの半導体ペレット全体を覆う低α化されたゲル状
シリコーン樹脂と、このゲル状シリコーン樹脂全体を覆
うゴム状シリコーン樹脂と、このゴム状シリコーン樹脂
及び前記配線基板全体を包含する外装のフェノール樹脂
とを有している。The semiconductor device of the present invention includes a wiring board, a flip-chip semiconductor pellet mounted on the wiring board, and a low-layer film that fills a gap between the semiconductor pellet and the wiring board and covers the entire semiconductor pellet. It has a gel-like silicone resin that has been gelatinized, a rubber-like silicone resin that covers the entire gel-like silicone resin, and an exterior phenol resin that covers the rubber-like silicone resin and the entire wiring board.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例の断面図である。FIG. 1 is a sectional view of an embodiment of the present invention.
この実施例は、ます、配線基板］上にフリップチップ型
の半導体ペレット２を搭載した後、ゲル状シリコーン樹
脂３を半導体ペレット２と配線基板１との間隙１０に充
てんし、かつ半導体ペレット２の周囲全体を覆うように
充てんする。In this embodiment, after mounting a flip-chip type semiconductor pellet 2 on a wiring board, a gel-like silicone resin 3 is filled into a gap 10 between the semiconductor pellet 2 and the wiring board 1, and the semiconductor pellet 2 is Fill it to cover the entire area.
このケル状シリコーン樹脂３はゲル状ゆえに、真空脱泡
により容易に間隙１０を満すことができる。またこのゲ
ル状シリコ−・ン樹脂３は充分低α化（１０−５カウン
ト／ｈｒ−ｃｍ２以下）されたものが市販されており、
自ら発生ずるα線が極めて少なく、かつ約５０ａｍ厚の
ゲル状シリコーン樹脂３により配線基板、配線材料等か
ら飛来するα線を完全にじゃへいすることができるので
、α線のソフトエラーを完全に抑制できる。Since the gel-like silicone resin 3 is in a gel state, it can easily fill the gap 10 by vacuum defoaming. In addition, this gel-like silicone resin 3 is commercially available with sufficiently low α (10-5 counts/hr-cm2 or less).
The amount of alpha rays generated by itself is extremely low, and the approximately 50 am thick gel-like silicone resin 3 can completely block alpha rays coming from wiring boards, wiring materials, etc., completely eliminating alpha ray soft errors. It can be suppressed.
そして、ゲル状シリコーン樹脂３全体を覆うようにゴム
状シリコーン樹脂４をがぶせたあと、フェノール樹脂５
により配線基板１及びゴム状シリコーン圀脂４全体包含
するように外装する構造となている。Then, after covering the entire gel silicone resin 3 with rubber silicone resin 4, phenol resin 5
The structure is such that the wiring board 1 and the rubber-like silicone resin 4 are entirely covered.
コム状シリコーン樹脂４は、フェノール樹脂５に含まれ
ている有機溶材（例えばメチルエチルケトン〉等からゲ
ル状シリコーン樹脂３を保護するためのバッファコート
であり、前記有機溶剤によりゲル状シリコーン樹脂３が
膨潤してフリップチップ接続を破壊するのを防止する。The comb-like silicone resin 4 is a buffer coat for protecting the gel-like silicone resin 3 from organic solvents (for example, methyl ethyl ketone) contained in the phenol resin 5, and the gel-like silicone resin 3 is swollen by the organic solvent. to prevent damage to the flip-chip connections.
また、ゴム状シリコーン樹脂４は、その溶剤によってゲ
ル状シリコーン樹脂３を膨潤させることは全くない。Furthermore, the rubbery silicone resin 4 never swells the gel-like silicone resin 3 due to its solvent.
外装樹脂としては、半導体ペレット２のシリコーンと？
、ｔＪ、膨張係数がほぼ同じ（４〜７Ｘ］、Ｏ−６＞で
あるフェノール樹脂が熱ストレス緩和のために不可欠で
ある。As the exterior resin, is the silicone of semiconductor pellet 2?
, tJ, and expansion coefficients of approximately the same (4 to 7X], O-6> are essential for alleviating thermal stress.
また、必要に応じてフェノール樹脂５にワックスまたは
シリコーンを含浸してさらに耐候性を増すことも可能で
ある。It is also possible to impregnate the phenolic resin 5 with wax or silicone to further increase weather resistance, if necessary.
以上説明したように本発明は、半導体ペレット全体を低
α化されたゲル状シリコーン樹脂で覆い、その上をゴム
状シリコーン樹脂で覆い、これら及び配線基板全体をフ
ェノール樹脂で包含して外装する構造とすることにより
、全体を小型化することができるので実装密度を上げる
ことができ、またゲル状シリコーン樹脂によりα線を充
分に遮へいすることができるので配線基板、配線材料等
を特に低α化する必要がなく、低コストでソフトエラー
を防止することができる効果がある、。As explained above, the present invention has a structure in which the entire semiconductor pellet is covered with a low-α gel-like silicone resin, the top is covered with a rubber-like silicone resin, and these and the entire wiring board are covered and packaged with a phenol resin. By doing so, the overall size can be made smaller, increasing the packaging density, and the gel-like silicone resin can sufficiently shield alpha rays, making wiring boards, wiring materials, etc. particularly low alpha. It is effective in preventing soft errors at low cost.
第１図は本発明の一実施例を示す断面図、第２図は従来
の半導体装置の一例を示す断面図である。
１・・・配線基板、２・・・半導体ペレット、３・・・
ゲル状シリコーン樹脂、４・・・ゴム状シリコーン樹脂
、５・・・フェノール樹脂、６・・・容器、７・・・ヘ
リウムカス、１０・・・間隙。FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a sectional view showing an example of a conventional semiconductor device. 1... Wiring board, 2... Semiconductor pellet, 3...
Gel-like silicone resin, 4... Rubber-like silicone resin, 5... Phenol resin, 6... Container, 7... Helium scum, 10... Gap.
Claims (1)
ップ型の半導体ペレットと、この半導体ペレットと前記
配線基板との間の間隙を充てんしかつこの半導体ペレッ
ト全体を覆う低α化されたゲル状シリコーン樹脂と、こ
のゲル状シリコーン樹脂全体を覆うゴム状シリコーン樹
脂と、このゴム状シリコーン樹脂及び前記配線基板全体
を包含する外装のフェノール樹脂とを有することを特徴
とする半導体装置。A wiring board, a flip-chip type semiconductor pellet mounted on the wiring board, and a low-α gel-like silicone that fills a gap between the semiconductor pellet and the wiring board and covers the entire semiconductor pellet. A semiconductor device comprising a resin, a rubber-like silicone resin that covers the entire gel-like silicone resin, and an exterior phenol resin that includes the rubber-like silicone resin and the entire wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31353587A JPH01152750A (en) | 1987-12-10 | 1987-12-10 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31353587A JPH01152750A (en) | 1987-12-10 | 1987-12-10 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01152750A true JPH01152750A (en) | 1989-06-15 |
Family
ID=18042486
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP31353587A Pending JPH01152750A (en) | 1987-12-10 | 1987-12-10 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01152750A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0340458A (en) * | 1989-07-07 | 1991-02-21 | Matsushita Electric Ind Co Ltd | Semiconductor device and manufacture thereof |
| JPH03244145A (en) * | 1990-02-22 | 1991-10-30 | Nec Corp | Chip carrier |
| US5656857A (en) * | 1994-05-12 | 1997-08-12 | Kabushiki Kaisha Toshiba | Semiconductor device with insulating resin layer and substrate having low sheet resistance |
| US6097097A (en) * | 1996-08-20 | 2000-08-01 | Fujitsu Limited | Semiconductor device face-down bonded with pillars |
| US6246124B1 (en) * | 1998-09-16 | 2001-06-12 | International Business Machines Corporation | Encapsulated chip module and method of making same |
-
1987
- 1987-12-10 JP JP31353587A patent/JPH01152750A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0340458A (en) * | 1989-07-07 | 1991-02-21 | Matsushita Electric Ind Co Ltd | Semiconductor device and manufacture thereof |
| JPH03244145A (en) * | 1990-02-22 | 1991-10-30 | Nec Corp | Chip carrier |
| JP2570880B2 (en) * | 1990-02-22 | 1997-01-16 | 日本電気株式会社 | Chip carrier |
| US5656857A (en) * | 1994-05-12 | 1997-08-12 | Kabushiki Kaisha Toshiba | Semiconductor device with insulating resin layer and substrate having low sheet resistance |
| US6097097A (en) * | 1996-08-20 | 2000-08-01 | Fujitsu Limited | Semiconductor device face-down bonded with pillars |
| US6246124B1 (en) * | 1998-09-16 | 2001-06-12 | International Business Machines Corporation | Encapsulated chip module and method of making same |
| US6558981B2 (en) | 1998-09-16 | 2003-05-06 | International Business Machines Corporation | Method for making an encapsulated semiconductor chip module |
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