JPH01146744U

JPH01146744U -

Info

Publication number: JPH01146744U
Application number: JP3536188U
Authority: JP
Priority date: 1988-03-16
Filing date: 1988-03-16
Publication date: 1989-10-11
Anticipated expiration: 2003-03-16
Also published as: JPH0721070Y2

Description

[Brief explanation of the drawing]

第１図ａ，ｂはそれぞれ本考案パツケージの第
１実施例の構成を示すブロツク図及びその斜視図
、第２図ａ，ｂはそれぞれ本考案パツケージの第
２実施例の構成を示すブロツク図及びその斜視図
、第３図は本考案パツケージの第３実施例の構成
を示すブロツク図、第４図は本考案パツケージの
第１実施例の構成を示す接続図、第５図は第２実
施例の構成を示す接続図、第６図は第３実施例の
構成を示す回路図である。１……充電回路、２……二次電池、３……電源
監視回路、４……過放電防止回路、５……メモリ
プロテクトロジツク回路、６……停電検出回路、
Ｖｉ……直流電圧、Ｖｚ……充電用電圧、Ｄ_１，
Ｄ_２……ダイオード、Ｍ……メモリ、ＣＰＵ……
中央処理装置。 1A and 1B are a block diagram and a perspective view thereof, respectively, showing the structure of a first embodiment of the package of the present invention, and FIGS. 2A and 2B are a block diagram and a perspective view thereof, respectively, showing the structure of a second embodiment of the package of the present invention. 3 is a block diagram showing the structure of the third embodiment of the package of the present invention, FIG. 4 is a connection diagram showing the structure of the first embodiment of the package of the present invention, and FIG. 5 is the second embodiment of the package of the present invention. FIG. 6 is a circuit diagram showing the structure of the third embodiment. DESCRIPTION OF SYMBOLS 1... Charging circuit, 2... Secondary battery, 3... Power monitoring circuit, 4... Overdischarge prevention circuit, 5... Memory protection logic circuit, 6... Power outage detection circuit,
Vi...DC voltage, Vz...Charging voltage, _D1 ,
_D2 ...Diode, M...Memory, CPU...
Central processing unit.

Claims

[Claims for Utility Model Registration] (1) A charging circuit 1 that inputs a DC voltage Vi and outputs a charging voltage Vz via a diode _D2 ;
a small secondary battery 2 that is constantly charged with a charging voltage Vz; a power supply monitoring circuit 3 that detects that the DC voltage Vi has fallen below an allowable range and cuts off the supply of the DC voltage Vi to the memory M; When the supply of DC voltage Vi to the memory M is cut off, the secondary battery 2
a diode _D1 supplying a voltage of to the memory M;
An over-discharge prevention circuit 4 that detects that the voltage of the secondary battery 2 has fallen below an allowable range and stops supplying power from the secondary battery 2 to the memory M, and an output signal from the power supply monitoring circuit 3 are input. This is a secondary battery package with a charging function, which is packed with a memory protection logic circuit 5 which outputs a signal to protect the memory M by inhibiting write operation of the memory M. (2) a charging circuit 1 that inputs a DC voltage Vi and outputs a charging voltage Vz via a diode _D2 ;
a small secondary battery 2 that is constantly charged with a charging voltage Vz; a power supply monitoring circuit 3 that detects that the DC voltage Vi has fallen below an allowable range and cuts off the supply of the DC voltage Vi to the memory M; When the supply of DC voltage Vi to the memory M is cut off, the secondary battery 2
a diode _D1 supplying a voltage of to the memory M;
An over-discharge prevention circuit 4 that detects that the voltage of the secondary battery 2 has fallen below an allowable range and stops the supply of power from the secondary battery 2 to the memory M, and a central processing based on the output of the power failure detection circuit 6. HALT of device CPU
A secondary battery package with a charging function is packed with a memory protection logic circuit 5 which inputs a signal and outputs a signal to protect the memory M by inhibiting the writing operation of the memory M. (3) a charging circuit 1 that inputs a DC voltage Vi and outputs a charging voltage Vz via a diode _D2 ;
a small secondary battery 2 that is constantly charged with a charging voltage Vz; a power supply monitoring circuit 3 that detects that the DC voltage Vi has fallen below an allowable range and cuts off the supply of the DC voltage Vi to the memory M; When the supply of DC voltage Vi to the memory M is cut off, the secondary battery 2
a diode _D1 supplying a voltage of to the memory M;
An over-discharge prevention circuit 4 that detects that the voltage of the secondary battery 2 has fallen below an allowable range and stops the supply of power from the secondary battery 2 to the memory M, and a central processing based on the output of the power failure detection circuit 6. HALT of device CPU
This secondary battery package with a charging function is packed with a memory protection logic circuit 5 which inputs the signal and the output of a power supply monitoring circuit 3 and outputs a signal to protect the memory M by inhibiting write operations to the memory M. (4) a charging circuit 1 that inputs a DC voltage Vi and outputs a charging voltage Vz via a diode _D2 ;
a small secondary battery 2 that is constantly charged with a charging voltage Vz; a power supply monitoring circuit 3 that detects that the DC voltage Vi has fallen below a permissible range and cuts off the supply of the DC voltage Vi to the memory M; When the supply of DC voltage Vi to memory M is cut off, secondary battery 2
a diode Di that supplies the voltage to the memory M;
An over-discharge prevention circuit 4 that detects that the voltage of the secondary battery 2 has fallen below an allowable range and stops supplying power from the secondary battery 2 to the memory M, the output of the power failure detection circuit 6, and the power failure A memory protection logic circuit 5 inputs the HALT signal of the central processing unit CPU based on the output of the detection circuit 6 and the output of the power supply monitoring circuit 3, and outputs a signal for inhibiting the write operation of the memory M and protecting the memory M. A secondary battery package with charging function. (5) The overdischarge prevention circuit 4 includes a voltage detection section that monitors the voltage of the secondary battery 2 and detects when the voltage has fallen below an allowable range, and a memory of the voltage of the secondary battery 2 based on the output of this detection section. A secondary battery package with a charging function according to any one of claims 1 to 4, which is comprised of a switch part that cuts off supply to M.