JPH01145833A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the step coverage of a wiring material in which its contact hole is taper-etched by implanting an impurity into an insulating film and altering an etching speed. CONSTITUTION:An insulating film 2 is deposited on a semiconductor substrate 1. An impurity is implanted by an ion implanting method into the deposited film 2. In this case, conditions are so set as to provide a concentration distribution in which the concentration is high on the surface of the film 2 and thinner toward its downward direction. The film 2 is coated with resist 3, and the resist 3 is patterned with a contact hole by photolithography. Then, with the resist 3 as a mask the contact hole is etched. The higher the impurity concentration is the faster the etching speed becomes. Thus, the etching speed of the film 2 implanted with the impurity is fast at the surface and slower toward its downward direction. The hole is taper-etched by this effect.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a manufacturing method that smooths the corners of a contact portion and improves the step coverage range of a wiring material.

[Summary of the invention]

The present invention provides a method for smoothing a contact portion, comprising:
By implanting the impurity concentration in the insulating film so as to have a certain distribution, the etching rate is made non-uniform, thereby enabling Taber etching of the contact.

[Conventional technology]

FIG. 2 (al to tel) shows a conventional contact hole manufacturing method.

After depositing an insulating film 2 as an interlayer film on the semiconductor substrate 1 as shown in FIG.
A resist 3 is applied onto the surface of the resist 92, and the resist 3 is patterned by photolithography.

As shown in FIG. 2, a method was known in which a contact hole was formed by etching the monochrome film 2 using a resist 3 as a mask.

[Problem that the invention seeks to solve]

However, the conventional method has the disadvantage that contact holes are vertically drilled and double-drilled, resulting in breakage at the edge of the contact when wiring material is attached in the next step.

In order to solve these conventional drawbacks, the present invention improves stamp cover technology by implanting impurities into the insulating film and changing the etching rate to enable taper etching of contact holes. The purpose is to

Means for Solving Problem c] In order to solve the above problem, the present invention implants impurities into the insulating film 2 by ion implantation to make the etching rate of the insulating film 2 non-uniform. I made it.

[Effect]

By implanting impurities into the insulating film 2 by ion implantation, it is possible to form the insulating film 2 with a certain concentration distribution. Since the etching rate of the insulating film 2 containing the impurities described above varies depending on the impurity concentration, a certain impurity concentration distribution is provided to enable deep etching of the contact hole.

〔Example〕

Embodiments of the present invention will be described below based on the drawings.

As shown in 11th mta), an insulating film 2 is deposited on a semiconductor substrate l. As shown in FIG. 1(b), impurities are implanted into the deposited insulating film 2 by the ion implantation method. Set conditions to achieve the distribution.

Then, as shown in FIG. 1 (C1), resist 3 is applied on insulation 2.
is applied, and patterning of contact holes is performed on the resist 3 by photolithography. It is shown in Figure 1 fd+.
Next, contact holes are etched using the resist 3 as a mask. Since the higher the impurity concentration, the faster the etching rate, the etching of the impurity-injected insulating film 2 is faster at the surface and becomes slower as it goes downward.

Due to this effect, the contact hole is tapered etched.

〔Effect of the invention〕

As described above, the present invention has the effect of injecting impurities into an insulating film and changing the etch rate, thereby enabling taper etching of contact holes and improving stamp cover technology of wiring materials.

[Brief explanation of the drawing]

1(+1) to tdl are process cross-sectional views of a manufacturing method for performing taper etching of contact holes according to the present invention, and FIGS. 2+al to fcl are process cross-sectional views of a conventional contact hole etching manufacturing method. l...Semi-dedicated substrate 2...Insulating film 3...Resist and above Applicant Seiko Electronics Co., Ltd. Figure 1

Claims (1)

[Claims] (a) A step of depositing an insulating film as an interlayer film on a semiconductor substrate, (b) A step of injecting impurities into the insulating film by an ion implantation method, and (c) A contact by a photolithography step. A method for manufacturing a semiconductor device, comprising the steps of forming a resist pattern for making a hole, and (d) etching a contact hole in a tapered manner.