JPH0114025Y2 - - Google Patents
Info
- Publication number
- JPH0114025Y2 JPH0114025Y2 JP19857581U JP19857581U JPH0114025Y2 JP H0114025 Y2 JPH0114025 Y2 JP H0114025Y2 JP 19857581 U JP19857581 U JP 19857581U JP 19857581 U JP19857581 U JP 19857581U JP H0114025 Y2 JPH0114025 Y2 JP H0114025Y2
- Authority
- JP
- Japan
- Prior art keywords
- resist
- substrate
- development
- parallel plate
- substrate surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000758 substrate Substances 0.000 claims description 23
- 150000002500 ions Chemical class 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 7
- 238000005530 etching Methods 0.000 description 8
- 239000007789 gas Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 3
- 238000010894 electron beam technology Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 229910001430 chromium ion Inorganic materials 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- -1 silicon ions Chemical class 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 230000008961 swelling Effects 0.000 description 1
Description
【考案の詳細な説明】
本考案はプラズマガスに依つて基板表面のレジ
ストの現像を行うドライエツチング装置に関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a dry etching apparatus for developing resist on a substrate surface using plasma gas.
近年、半導体集積回路の製造工程はドライ化の
傾向が強くなつてきている。特にエツチング工程
はプラズマエツチング、反応性イオンビームエツ
チング等、各種方式によりドライ化が進められ、
サイドエツチの少ないエツチングが可能となつて
いる。これに対して現在のレジスト現像は殆んど
が湿式である。ところがこの湿式現像ではレジス
トが現像液を吸い込んで乾燥時にレジストパター
ンが変形すると云う膨潤変形を避けることが出来
なかつた。このため最近では、酸素、Wet Air等
のガスプラズマによるドライ現像が開発されてい
る。然し乍ら、この現像方式はレジスト膜の露光
された領域と露光されていない領域とがガス・プ
ラズマによつてエツチングされる速度が異なる点
を利用したものであるため、過度に現像を行うと
現像終了後のレジスト膜の膜厚が非常に薄くなつ
てしまい、その後のエツチング工程に支障を来た
すと云う問題点が生じていた。 In recent years, there has been a strong trend toward dry manufacturing processes for semiconductor integrated circuits. In particular, the etching process is being made dry using various methods such as plasma etching and reactive ion beam etching.
Etching with less side etching is now possible. In contrast, most of the current resist development is wet-type. However, this wet development cannot avoid swelling deformation in which the resist absorbs the developer and the resist pattern is deformed when it dries. For this reason, recently, dry development using gas plasma such as oxygen or wet air has been developed. However, this development method takes advantage of the fact that the exposed and unexposed areas of the resist film are etched at different rates by gas/plasma, so if you develop too much, the development will stop. A problem has arisen in that the thickness of the subsequent resist film becomes extremely thin, which interferes with the subsequent etching process.
本考案は、このような問題点に鑑みて為された
ものであつて、現像完了を精度よく検出するドラ
イ現像装置を提供するものである。 The present invention has been devised in view of these problems, and it is an object of the present invention to provide a dry developing device that accurately detects the completion of development.
以下図面を参照しつつ本考案を詳述する。第1
図乃至第3図は、本考案現像装置を用いて基板上
に塗布されたレジストを現像するときの工程を説
明するための図を示し、1はマスクや半導体材料
等の基板、2は、この半導体基板1上に塗布され
たレジストである。3は現像槽、4,4はこの現
像槽3内に設けられた平行平板電極を表わし、こ
の電極4,4間に現像される基板1が設定され
る。5は前記平行平板電極4,4に高周波電圧を
印加する高周波電源、6はこの高周波電源5から
平行平板電極4,4へ供給する高周波電圧の供
給、遮断を行うスイツチ、7は前記基板1表面か
ら放出されるクロムイオン、シリコンイオン等の
イオンの種類を判定する質量分析計よりなるイオ
ン検出器を示し、イオンの検出によつて前記スイ
ツチ6を開放する構成になつている。 The present invention will be described in detail below with reference to the drawings. 1st
3 to 3 are diagrams for explaining the process of developing a resist coated on a substrate using the developing device of the present invention, 1 is a substrate such as a mask or a semiconductor material, 2 is this This is a resist coated on a semiconductor substrate 1. Reference numeral 3 represents a developer tank, 4 and 4 represent parallel plate electrodes provided in the developer tank 3, and a substrate 1 to be developed is set between the electrodes 4 and 4. 5 is a high frequency power source that applies a high frequency voltage to the parallel plate electrodes 4, 4; 6 is a switch that supplies or cuts off the high frequency voltage supplied from this high frequency power source 5 to the parallel plate electrodes 4; 7 is a surface of the substrate 1; The ion detector is comprised of a mass spectrometer that determines the types of ions such as chromium ions and silicon ions emitted from the ion, and is configured to open the switch 6 upon detection of ions.
このような現像装置において、基板1上に塗布
したレジスト2を第1示に示す如くパターン露光
し、現像槽3内の平行平板電極4間にこの基板1
を設定した後、プラズマガス、例えばWet・Air
を供給して、スイツチ6を閉じ、プラズマ現像を
開始すると、レジスト2はこのプラズマガスによ
つて、エツチングされ始める。このとき例えばポ
ジ型のレジスト2の場合、第2図に示す如く電子
ビームで露光された露光領域の方が露光されてい
ない非露光領域より速くエツチングされる。さら
にエツチングが進んで第3図に示すように露光領
域で基板1の表面が現われはじめると、この基板
1表面がプラズマガスによつてスパツタされ、基
板1を構成するイオン、例えば、クロムイオン、
シリコンイオン等が基板1表面から放出される。
イオン検出器7はこのイオンの放出を検出して露
光領域のレジスト2が完全に除去されるまでの時
間、例えば10乃至20秒を計測した後、スイツチ6
へ信号を送り、スイツチ6を開き、平行平板電極
4,4への高周波電圧を遮断し、現像を停止す
る。 In such a developing device, a resist 2 coated on a substrate 1 is exposed in a pattern as shown in the first diagram, and this substrate 1 is exposed between parallel plate electrodes 4 in a developing tank 3.
After setting the plasma gas, e.g. Wet/Air
When the plasma gas is supplied, the switch 6 is closed, and plasma development is started, the resist 2 begins to be etched by this plasma gas. At this time, for example, in the case of a positive type resist 2, as shown in FIG. 2, the exposed areas exposed to the electron beam are etched faster than the unexposed areas. As the etching progresses further and the surface of the substrate 1 begins to appear in the exposed area as shown in FIG.
Silicon ions and the like are released from the surface of the substrate 1.
The ion detector 7 detects the release of these ions and measures the time, for example, 10 to 20 seconds, until the resist 2 in the exposed area is completely removed, and then the switch 6 is turned on.
The switch 6 is opened, the high frequency voltage applied to the parallel plate electrodes 4, 4 is cut off, and development is stopped.
続いて、本考案現像装置を利用して行つたレジ
スト現像の一実験例を述べる。クロムマスク基板
上に、ポジ型電子ビームレジストOEBR−100(東
京応化)を5000Å塗布し、80℃、30minのプリベ
ークを行なつた後、露光量1×10-4covlomb/cm2
の電子ビームによりパターン露光し、さらに80℃
10minのベーキングを行ない、続いてドライ現
像を行なつた。ガスは、Wet Airを用い、圧力は
0.1Torrであつた。印加電圧は、1.0KVで、周波
数13.5MHz、電力100Wの条件でドライ現像開始
後5分でイオン検出器のクロムイオンの信号が増
大したので現像を終了した。終了後の基板は、完
全なレジストパターンが形成されており残存レジ
スト膜厚は約1000Åであつた。 Next, an experimental example of resist development performed using the developing device of the present invention will be described. A positive electron beam resist OEBR-100 (Tokyo Ohka) was applied to a thickness of 5000 Å on a chrome mask substrate, and after pre-baking at 80°C for 30 minutes, the exposure amount was 1×10 -4 covlomb/cm 2
Pattern exposure is performed using an electron beam of
Baking was performed for 10 minutes, followed by dry development. Wet air is used as the gas, and the pressure is
It was 0.1 Torr. The applied voltage was 1.0 KV, the frequency was 13.5 MHz, and the power was 100 W. Five minutes after the start of dry development, the chromium ion signal from the ion detector increased, so development was terminated. After completion of the process, a complete resist pattern was formed on the substrate, and the remaining resist film thickness was about 1000 Å.
以上述べた如く本考案ドライ現像装置は、現像
槽内にプラズマガスを供給して、平行平板間に高
周波電圧を印加し、現像槽の平行平板間に設立さ
れた基板上のレジストの現像を行い、現像が進行
して基板表面が現われたとき、該基板から放出さ
れるイオンをイオン検出器で検出する事によつて
現像の完了を識別する構成にしているので、正確
に現像終了を知ることが出来、オーバエツチング
やエツチング不足を起すことなく、正確なレジス
トパターンの形成が可能となり、より細かい微細
化が図れる。 As described above, the dry developing device of the present invention supplies plasma gas into the developer tank, applies a high frequency voltage between the parallel plates, and develops the resist on the substrate established between the parallel plates of the developer tank. When development progresses and the surface of the substrate appears, the ion detector detects ions emitted from the substrate, thereby identifying the completion of development, so it is possible to accurately know when development is complete. This makes it possible to form accurate resist patterns without causing over-etching or insufficient etching, and allows for finer micropatterning.
第1図はレジストが塗布された基板の断面図、
第2図乃び第3図は本考案ドライ現像装置のブロ
ツク図である。
1……基板、2……レジスト、4,4……平行
平板電極、5……高周波電源、6……スイツチ、
7……イオン検出器。
Figure 1 is a cross-sectional view of a substrate coated with resist.
2 and 3 are block diagrams of the dry developing device of the present invention. 1...Substrate, 2...Resist, 4, 4...Parallel plate electrode, 5...High frequency power supply, 6...Switch,
7...Ion detector.
Claims (1)
依つて現像するドライ現像装置において、現像槽
に設けられた平行平板電極と、この平行平板電極
に高周波電圧を供給する電源と、基板表面から放
出されるイオンを検出するイオン検出器と、から
成り、上記平行平板電極間にレジストを塗布した
基板を配置し、この現像槽内へプラズマガスを供
給するとともに前記平行平板電極間に高周波電圧
を印加して両電極間でプラズマ放電を行わしめ、
そのプラズマに依つて基板表面のレジスト現像を
行い、現像が進行して基板面が露出されたとき
に、該基板表面から放出されるイオンを、前記イ
オン検出器で検出せしめて現像処理の完了を識別
することを特徴とするドライ現像装置。 In a dry developing device that develops resist formed on a substrate using plasma discharge, a parallel plate electrode provided in a developer tank, a power source that supplies high frequency voltage to the parallel plate electrode, and a voltage emitted from the substrate surface are used. an ion detector for detecting ions, a substrate coated with resist is placed between the parallel plate electrodes, plasma gas is supplied into the developing tank, and a high frequency voltage is applied between the parallel plate electrodes. Plasma discharge is generated between both electrodes,
Resist development on the substrate surface is performed using the plasma, and when the development progresses and the substrate surface is exposed, the ions emitted from the substrate surface are detected by the ion detector to confirm the completion of the development process. A dry developing device characterized by identification.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19857581U JPS58103045U (en) | 1981-12-29 | 1981-12-29 | dry developing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19857581U JPS58103045U (en) | 1981-12-29 | 1981-12-29 | dry developing device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58103045U JPS58103045U (en) | 1983-07-13 |
JPH0114025Y2 true JPH0114025Y2 (en) | 1989-04-25 |
Family
ID=30111755
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19857581U Granted JPS58103045U (en) | 1981-12-29 | 1981-12-29 | dry developing device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58103045U (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2828682B2 (en) * | 1989-09-08 | 1998-11-25 | 東京エレクトロン株式会社 | Development method |
JP2912595B2 (en) * | 1997-04-24 | 1999-06-28 | 東京エレクトロン株式会社 | Developing device |
-
1981
- 1981-12-29 JP JP19857581U patent/JPS58103045U/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS58103045U (en) | 1983-07-13 |
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