JPS60137022A - Etching method - Google Patents

Etching method

Info

Publication number
JPS60137022A
JPS60137022A JP24433283A JP24433283A JPS60137022A JP S60137022 A JPS60137022 A JP S60137022A JP 24433283 A JP24433283 A JP 24433283A JP 24433283 A JP24433283 A JP 24433283A JP S60137022 A JPS60137022 A JP S60137022A
Authority
JP
Japan
Prior art keywords
resist
pmma
plasma
layer
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24433283A
Other languages
Japanese (ja)
Inventor
Hiroshi Goto
広志 後藤
Chuichi Takada
高田 忠一
Ryoji Abe
良司 阿部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP24433283A priority Critical patent/JPS60137022A/en
Publication of JPS60137022A publication Critical patent/JPS60137022A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To eliminate trouble of a defective pattern shape, the formation of pin hole, etc. by improving the ashing rate of a polymethyl methacrylate group resist. CONSTITUTION:Patterns such as wiring patterns 2 in aluminum are formed on a wafer 1, and a PSG layer 3 is applied in approximately 1mum thickness. A polymethyl methacrylate (PMMA) layer 4 is applied in approximately 1-1.5mum thickness, and patterned. A PMMA group resist is treated with chlorine group plasma, and the PMMA layer 4 is etched by Freon group plasma. An ashing rate to Freon group plasma of the PMMA group resist is lowered largely through treatment by chlorine group plasma. Accordingly, the excess ashing of the resist is prevented, and troubles such as the defective shape of a material to be etched, the generation of a pin hole, etc. are eliminated.

Description

【発明の詳細な説明】 発明の技術分野 本発明はエツチング方法、特にポリメチルメタアクリレ
−)(PMMA)系レジス)71fマスクとするフレオ
ン系プラズマによるエツチング方法に係る0 従来技術と問題点 半導体装置の集積度の増加に伴なう微細加工技術の一環
としてレジス)Y電子線で露光することが一般化1−て
いる。電子線露光用レジストとじてPMMAは早くから
開発された代表的なものであり、特にその高解像力は捨
てがたい魅力である。
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to an etching method, particularly an etching method using Freon plasma as a polymethyl methacrylate (PMMA) type resist mask. As part of the microfabrication technology accompanying the increase in the degree of integration of devices, exposure with a resist electron beam has become commonplace. PMMA is a typical resist for electron beam exposure that was developed early on, and its high resolution is particularly attractive.

しかし、ドライエツチングにおける被エツチング材との
エッチレートの比が小さいので、エツチング形状の不良
やピンホールの発生などの問題がある0 第1図および第2図を参照して説明する。例えば、ウェ
ハ1上にアルミニウムの配線パターン2ン形成後PSG
層3を厚さ1μm程度に被葆する。
However, since the ratio of the etch rate to the material to be etched in dry etching is small, there are problems such as defective etching shapes and generation of pinholes. This will be explained with reference to FIGS. 1 and 2. For example, after forming 2 aluminum wiring patterns on wafer 1, PSG
Layer 3 is covered to a thickness of about 1 μm.

次いで、PMMA層4を厚さ1.0〜1.5μm程度塗
布し、例えばスルーホール形成用にPSGN3に窓をあ
けるためにPMMAN4y図示のようにパターニングす
る。窓開けのためのPMMA層4の開口部の幅をWlと
仮定する。この後、例えばフレオン系のプラズマ7用い
てPSG%3の選択的エツチングを行なうと、p MM
 A +a 4の灰化速度が速いためにPM MA陥の
開口部下に露出したPSG層3と共にPMMA層4の灰
化が進む。特に開口部付近で第2図の破線で示す工うI
CPMllvJ、A層4が横方向に灰化され、その結果
PMMA層の開口部の幅W8が大きくなり、最終的にP
SG層3がエツチングされて窓が形成されにとき、その
窓の幅がW2(図のようにW′1より大きい)になって
し1い、エツチングのパターン形状に不良が発生する。
Next, a PMMA layer 4 is applied to a thickness of about 1.0 to 1.5 μm, and patterned as shown in PMMAN 4y in order to form a window in PSGN 3 for forming a through hole, for example. It is assumed that the width of the opening in the PMMA layer 4 for opening the window is Wl. After this, if selective etching of PSG%3 is performed using, for example, Freon-based plasma 7, p MM
Since the ashing rate of A + a 4 is fast, the PMMA layer 4 is ashed together with the PSG layer 3 exposed under the opening of the PM MA depression. Particularly in the vicinity of the opening, as shown by the broken line in Figure 2,
CPMllvJ, the A layer 4 is laterally ashed, and as a result, the width W8 of the opening in the PMMA layer increases, and finally the P
When the SG layer 3 is etched to form a window, the width of the window becomes W2 (larger than W'1 as shown in the figure), and a defect occurs in the etched pattern shape.

また、PMMA層4は必ずしも均一な厚さに塗布されな
いので、厚さが不十分な箇所ではエツチング処理中にl
j M M A層が灰化してしまい、その下側のPSG
層3をもエツチングして、そこにビンホールン形成して
しまうおそれがある。
In addition, since the PMMA layer 4 is not necessarily coated to a uniform thickness, parts with insufficient thickness may be etched during the etching process.
j M M A layer has turned into ashes, and the PSG underneath it has
There is a risk that layer 3 will also be etched and bin holes will be formed there.

発明の目的 本発明ヶよ、以上の如き従来技術の問題点に鑑み、P 
M M A糸しジストtマスクとするプラズマエソヂン
グ処理において、PMMA系レジストの灰化レートを向
上さぜることにLってパターン形状不良ヤL”ンポール
の形成等の不都合ビ除去することン目白りとする。
Purpose of the Invention The present invention, in view of the problems of the prior art as described above,
In the plasma etching process using MMA thread as a resist mask, it is possible to improve the ashing rate of the PMMA resist and eliminate inconveniences such as the formation of poor pattern shapes and poles. The eyes become pale.

発明の構成 そして、本発明は、上記目的を達成するために、PMM
A系レジストのバターニング後、先ず塩素系プラズマで
レジストを処理してからフレオン系プラズマでエツチン
グな行なうものである。この塩素系プラズマによる処理
によってI) M M A系レジストのフレオン系プラ
ズマによる灰化レートが大幅に低下する。本発明はこの
4実を見い出すことに工っで為されたものである。
Structure of the invention In order to achieve the above object, the present invention provides a PMM
After patterning the A-type resist, the resist is first treated with chlorine-based plasma and then etched with Freon-based plasma. By this treatment with chlorine-based plasma, the ashing rate of I) MMA-based resist due to Freon-based plasma is significantly reduced. The present invention has been devised to discover these four fruits.

本発明にいうPMMA系レジストとは、下記式:) を有するP M M Aのほか、PMMAのメチル基の
水素乞ハロゲンや簡単なアルキル基で直換1.,7S:
ような肪廊体をいう。更にこ3らの重合体である(P(
MMA−MA)) +CP (MMA−CIlPvlA
))、及びこれら同士の本合体も含む。また、塩素系プ
ラズマと’D、 B HnCJ8−4−Hs CHyl
 CJ! 4−B1. + S 1 Hl Ce4−1
(n11ntlj、o1112、もしくは3である。〕
、cg2ガスなどに基いて0プラズマが存在する系をい
う。フレオン系プラズマとはフレオンガス、例えばCF
 4 、CHFa 、、 C2F6 、CaFs等のガ
スのほかこオLらと02ガスの混合ガスに基づくプラズ
マ乞いうO 発明の実施例 第3図は、平方平板形エツチング装置を示す。
In addition to PMMA having the following formula:), the PMMA resist referred to in the present invention includes PMMA having the following formula: 1. ,7S:
It refers to a stout body like this. Furthermore, these three polymers (P(
MMA-MA)) +CP (MMA-CIlPvlA
)), and combinations thereof. In addition, chlorine-based plasma and 'D, B HnCJ8-4-Hs CHyl
CJ! 4-B1. + S 1 Hl Ce4-1
(n11ntlj, o1112, or 3.)
, CG2 gas, etc., in which zero plasma exists. Freon plasma is Freon gas, such as CF.
Embodiment of the Invention FIG. 3 shows a square plate type etching apparatus.

エツチング室5内の電極プレート6.7には電源8から
高周波電力が供給でき、電極プレートの一万〇に被処理
ウェハ9が塔載される。エツチング室5は気密封止さI
t、ガス出口10から真空排気する一方、カス人口11
から弁12乞介し−〔プラズマ用ガスが等大さオする。
High frequency power can be supplied from a power source 8 to the electrode plates 6,7 in the etching chamber 5, and a wafer 9 to be processed is placed on the electrode plate 10,000. The etching chamber 5 is hermetically sealed.
t, while evacuating from the gas outlet 10, the scum population 11
From the valve 12 - [The plasma gas is of equal size.

このような装置を用いてり、−トの実験ケ行なった○ 例1 P M M A Yセルンルブアセテートに溶解してシ
リコンウェハに塗布し、プリベーク17て厚さ15μm
のP M M Aレジスト膜ヲ形成した。このウエハン
第3図の工うな平行平板形プラズマエツチング装置に塔
載し5Bα、200SCCM、(標準状態に換算したc
nt /分単位の滝、量をいう) 十CCJ410S 
Cc Mの混合ガスタ供給し、真空度(>、 1 To
rr s周波数13.56 M)lzの高周波を力0.
1 W / c11t程度の条件で5分間プラズマ処理
乞行った○このプラズマ処理後のP HM Aの膜厚は
0.8〜1、Oμm程度でおった。
Using such a device, we conducted the following experiments.
A PMMA resist film was formed. This wafer was placed on a parallel plate plasma etching apparatus shown in Fig. 3 and etched with 5Bα, 200SCCM, (c converted to standard condition).
Waterfall in nt/minute unit) 10CCJ410S
Cc M gas mixture is supplied, and the degree of vacuum (>, 1 To
rr s frequency 13.56 M) lz high frequency with power 0.
Plasma treatment was performed for 5 minutes under conditions of approximately 1 W/c11t. The film thickness of PHMA after this plasma treatment was approximately 0.8 to 1.0 μm.

次に、同じエツチング室置で供給ガスYCf(F’38
0SCCM+0□ 3〜58CCMに換え、真空度0.
2Torr、高周波電力13.56 M■1z 、 0
.4 W / crtlの条rトでプラズマ処理を行な
った。処理後の膜厚を測定して灰化速度をめたところ、
50〜100A/分程度であった。
Next, the supply gas YCf (F'38
0SCCM+0□ Change to 3~58CCM, vacuum degree 0.
2 Torr, high frequency power 13.56 M■1z, 0
.. Plasma treatment was performed at a rate of 4 W/crtl. After measuring the film thickness after treatment and calculating the ashing rate, we found that
It was about 50 to 100 A/min.

従来、塩素系プラズマ処理なしでP M M A乞直換
上記と向じフレオン系プラズマ処理し定場合のph\(
Mへの灰1ヒ速度は300〜50OA/分程度であっ7
こ0従−っ゛C1塩素系プラズマ処理に、【ってP h
’l M Aの灰化速度は大幅VC低減していり。因み
に、上記フレオン系プラズマ処理によるp S Gのエ
ッノル−l−は800〜900A/分であるので、PM
MAレジストは約10倍程度のエッチレート比を達成し
ていることVこlる。また、’SiO□。
Conventionally, PMMA was directly converted without chlorine plasma treatment.
The rate of ash 1 to M is about 300 to 50 OA/min7.
According to this C1 chlorine plasma treatment,
The ashing rate of 'l MA is significantly reduced by VC. Incidentally, since the enol-l- of pSG by the above Freon plasma treatment is 800 to 900 A/min, PM
The MA resist achieves an etch rate ratio of about 10 times. Also, 'SiO□.

SiN3のエッチレートは500A/分、250A/分
程度である。
The etch rate of SiN3 is about 500 A/min and 250 A/min.

例2 例1のようにして形成L5たP M M Aレジスト膜
(厚さ145μ?+1)馨BCig3+CQ?4の混合
ガスの代りに5ick4200〜300SCCM、+(
’7280SCCHの混合ガスV用いて、真空度0.1
Torrx高周波電力13.56MHz 、 1 W 
/ rr&の条件で10〜30秒間プラズマ処理し、厚
さ10μmの膜が残った。これを例1と同じ条件でフレ
オン系プラズマ処理したところ、50〜100A/分の
エッチレートであった。
Example 2 PMMA resist film (thickness 145μ?+1) formed as in Example 1 L5BCig3+CQ? 5ick4200~300SCCM instead of 4 mixed gas, +(
Using mixed gas V of '7280SCCH, vacuum degree 0.1
Torrx high frequency power 13.56MHz, 1W
Plasma treatment was performed for 10 to 30 seconds under the conditions of /rr&, leaving a 10 μm thick film. When this was subjected to Freon plasma treatment under the same conditions as in Example 1, the etch rate was 50 to 100 A/min.

例3 P M M A以外には(P(MMA−MA))及びC
P (MMA −CiMA ))の二つの共重合体ン脱
塩酸反応により重合させた。CrosslinkedM
ethavylate Re5ist (CMR) l
:使用しても同様の結果が得られた。
Example 3 P M M A (P(MMA-MA)) and C
Two copolymers of P(MMA-CiMA)) were polymerized by dehydrochlorination reaction. CrosslinkedM
ethavilate Re5ist (CMR) l
: Similar results were obtained when using

例4 フレオン系プラズマエツチングでti CHF3以外に
CF、+eHF3 ’Y使用したエツチングでも同様の
効果が確認されている。たとえばエツチング条件はCC
F41005CC,CCHF31O0SCCの流量に於
込て、真空度0.2Torr Rf 13.56MHz
パワー密度1 W / crt1程度の条件において、
レジストの灰化レートは塩素プラズマ処理のない場合は
800A/jl1m程度であるが、前述の処理により4
00A/Nll+程度におさえらねている。
Example 4 Similar effects have been confirmed in Freon plasma etching using CF and +eHF3'Y in addition to tiCHF3. For example, the etching conditions are CC
Into the flow rate of F41005CC, CCHF31O0SCC, vacuum degree 0.2 Torr Rf 13.56 MHz
Under the condition that the power density is about 1 W/crt1,
The ashing rate of the resist is about 800A/Jl1m without chlorine plasma treatment, but with the above treatment
I try to keep it to around 00A/Nll+.

拒 第1図を参照すると、シリコンウェハ1上にアルミニウ
ムの配線パターン(厚さ1.0μm)2)Y形成し、そ
の上にPSG層ビ厚さ1μmに被覆する。次いで、PM
MAi液乞スピンオフ法で厚さ1.5μmに塗布した。
Referring to FIG. 1, an aluminum wiring pattern (thickness: 1.0 μm) 2) is formed on a silicon wafer 1, and a PSG layer is coated thereon to a thickness of 1 μm. Then P.M.
It was coated to a thickness of 1.5 μm using the MAi liquid spin-off method.

このPMMAIfi4のアルミニウム配線層2の上方に
幅2μmの窓乞形成する。
A window with a width of 2 μm is formed above the aluminum wiring layer 2 of this PMMA Ifi4.

それから、例1と同様にしてB C/、 + C’ (
J4の混合ガスによるプラズマ処理乞約5分間行カう。
Then, as in Example 1, B C/, + C' (
Perform plasma treatment using J4 mixed gas for approximately 5 minutes.

PMMA層は厚さ1.0μm程度になる。次いで、例1
と同様にしてCHF3+0□の混合ガスで15分間程度
プラズマエツチング処理する。その結果、第4図に見ら
れるように、280層3に幅2.3μm程度のスルーホ
ール用窓が形成される。
The PMMA layer has a thickness of about 1.0 μm. Next, Example 1
In the same manner as above, plasma etching is performed using a mixed gas of CHF3+0□ for about 15 minutes. As a result, as shown in FIG. 4, through-hole windows with a width of about 2.3 μm are formed in the 280 layer 3.

発明の効果 以上の説明から明らかなように、本発明により、高解像
力7有する電子線用レジストであるPMMA系のレジス
ト!マスクとして行なうプラズマエツチングにおいても
、レジストの灰[ヒ速度ン低減せしめ、被エツチング物
の形状不良、ピンホール発生等の不都合ン除去すること
ができる。
Effects of the Invention As is clear from the above explanation, the present invention produces a PMMA-based resist that is an electron beam resist with a high resolution of 7! Even in plasma etching performed as a mask, it is possible to reduce resist ash [hypertonia] and remove inconveniences such as poor shape of the object to be etched and generation of pinholes.

【図面の簡単な説明】[Brief explanation of drawings]

第11¥1はエンチング処理前の被処理体の断面崗、第
2図は従来技術におけるエツチング処理後の被処理体の
断面図、第3図はエツチング装置の概念図、第4図は本
発明に依るエツチング処理後の被処理体の断面図である
。 3・・・・・・PSCI!、4・・・・・・PMMAf
&、5・・・・・・エツチング室、6,7・・・・・・
電極、8・・・・・・電源、9 ・・・・・・ウ ェ 
)1゜
No. 11¥1 is a cross-sectional view of the object to be processed before etching treatment, FIG. 2 is a cross-sectional view of the object to be processed after etching treatment in the conventional technology, FIG. 3 is a conceptual diagram of the etching apparatus, and FIG. 4 is the present invention. FIG. 3 is a cross-sectional view of the object to be processed after etching according to FIG. 3...PSCI! , 4...PMMAf
&, 5...Etching room, 6,7...
Electrode, 8... Power supply, 9... Wa
)1゜

Claims (1)

【特許請求の範囲】[Claims] 基板上にポリメチルメタアクリレート系レジストン塗布
し、パターニングした後、該レジストン塩素系プラズマ
で処理し、然る後該レジストをマスクとしてフレオン系
プラズマで基板を選択的にエツチングする工程を含むこ
とを特徴とするエツチング方法。
It is characterized by including the step of applying a polymethyl methacrylate resist on a substrate, patterning it, treating the resist with chlorine plasma, and then selectively etching the substrate with Freon plasma using the resist as a mask. Etching method.
JP24433283A 1983-12-26 1983-12-26 Etching method Pending JPS60137022A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24433283A JPS60137022A (en) 1983-12-26 1983-12-26 Etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24433283A JPS60137022A (en) 1983-12-26 1983-12-26 Etching method

Publications (1)

Publication Number Publication Date
JPS60137022A true JPS60137022A (en) 1985-07-20

Family

ID=17117130

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24433283A Pending JPS60137022A (en) 1983-12-26 1983-12-26 Etching method

Country Status (1)

Country Link
JP (1) JPS60137022A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04122773U (en) * 1991-04-19 1992-11-05 サンウエーブ工業株式会社 Bathroom unit inspection port structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04122773U (en) * 1991-04-19 1992-11-05 サンウエーブ工業株式会社 Bathroom unit inspection port structure

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