JPH01139646U - - Google Patents

Description

[Brief explanation of the drawing]

Figure 1 shows an embodiment of this invention, Figure 2 shows the format of a general command signal in command-response serial multiplex data transfer, and Figure 3 shows a conventional data bus terminal. It is a figure showing an apparatus. In the figure, 1 is the terminal address code,
2 is the sending/receiving code, 3 is the sub address code, 4
is a word count code, 5 is a serial multiplex data bus, 6 is a receiving circuit, 7 is a transmitting circuit, 8 is a control circuit, 9 is a command register, 10
1 is an external device, 11 is an interface circuit, and 12 is a terminal address register. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Scope of utility model registration request] a plurality of data bus terminal devices and at least one bus control device are connected via a serial data bus line, data transfer between the data bus terminal devices and the bus control device and between the data bus terminal devices; A command-response serial multiplex data transfer method in which the bus control device controls and executes a command signal transmitted from the bus control device and a response signal from the data bus terminal device that has received the command signal. 2. The data bus control device according to claim 1, further comprising a terminal address register that indicates the presence or absence of a corresponding data bus terminal device for each terminal address code of a command signal to be transmitted.