JPH01136356A - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JPH01136356A
JPH01136356A JP29576887A JP29576887A JPH01136356A JP H01136356 A JPH01136356 A JP H01136356A JP 29576887 A JP29576887 A JP 29576887A JP 29576887 A JP29576887 A JP 29576887A JP H01136356 A JPH01136356 A JP H01136356A
Authority
JP
Japan
Prior art keywords
semiconductor element
resin
sealed
semiconductor device
sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29576887A
Other languages
Japanese (ja)
Inventor
Katsushi Ito
勝志 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP29576887A priority Critical patent/JPH01136356A/en
Publication of JPH01136356A publication Critical patent/JPH01136356A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape

Abstract

PURPOSE:To improve heat emission properties by leaving an exposed hole not coated with a sealing resin in one region of a semiconductor element. CONSTITUTION:Connecting sections with bonding wires 3 in the surface of a semiconductor element 1, the bonding wires 3 and one parts of leads 2 are coated with a resin 4, and each one part of the circuit surface, rear or both surface and rear of the semiconductor element 1 is exposed through an exposed hole 5. The semiconductor element 1 is coated with a resin film 6 for coating having excellent adhesion with the sealing resin 4 and superior moisture resistance. Accordingly, stress applied to the semiconductor element 1, the sealing resin 4 and the leads 2 at the time of thermal expansion is reduced, thus preventing the generation of cracks in the semiconductor element 1 and the sealing resin 4.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は半導体素子とリードとがボンディングワイヤに
より結線され、この半導体素子及びリードが樹脂により
封止された樹脂封止型半導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a resin-sealed semiconductor device in which a semiconductor element and leads are connected by bonding wires, and the semiconductor element and leads are sealed with resin.

[従来の技術] 従来の樹脂封止型半導体装置においては、第5図に示す
ように、半導体素子1とリード2とがボンディングワイ
ヤ3により結線されており、半導体素子1の周囲、ボン
ディングワイヤ3及びリード2の一部が樹脂4により封
止されている。
[Prior Art] In a conventional resin-sealed semiconductor device, as shown in FIG. 5, a semiconductor element 1 and a lead 2 are connected by a bonding wire 3. A portion of the lead 2 is sealed with a resin 4.

つまり、ワイヤボンディング式で半導体素子の搭載部を
有しない樹脂封止型半導体装置においては、半導体素子
1と共に、半導体素子1とリード2との結線部分が樹脂
4に覆われて埋込まれている。
In other words, in a resin-sealed semiconductor device that uses wire bonding and does not have a mounting section for a semiconductor element, the connection portion between the semiconductor element 1 and the lead 2 is covered with the resin 4 and embedded together with the semiconductor element 1. .

[発明が解決しようとする問題点] しかしながら、上述した従来の樹脂封止型半導体装置に
おいては、半導体素子1の周囲に加えて゛半導体素子1
とリード2との結線部分が樹脂4により封止されている
ため、熱放散性が悪く、半導体装置の作動時に、半導体
素子1から発生する熱により回路特性に異常が発生する
ことがある。
[Problems to be Solved by the Invention] However, in the conventional resin-sealed semiconductor device described above, in addition to the surrounding area of the semiconductor element 1,
Since the connection portion between the lead 2 and the lead 2 is sealed with the resin 4, heat dissipation is poor, and when the semiconductor device is operated, the heat generated from the semiconductor element 1 may cause an abnormality in the circuit characteristics.

また、この熱により半導体素子1及びリード2と封止樹
脂4とが膨張すると、その相互間の熱膨張係数の差によ
り、これらの半導体素子1、リード2及び封止樹脂4に
応力が印加されるため、樹脂4及び半導体素子1にクラ
ックが発生しやすい。
Furthermore, when the semiconductor element 1, leads 2, and sealing resin 4 expand due to this heat, stress is applied to the semiconductor element 1, leads 2, and sealing resin 4 due to the difference in thermal expansion coefficients between them. Therefore, cracks are likely to occur in the resin 4 and the semiconductor element 1.

このため従来の樹脂封止型半導体装置は信頼性が劣ると
いう問題点がある。
For this reason, conventional resin-sealed semiconductor devices have a problem of poor reliability.

更に、半導体素子lはリード2に対してボンディングワ
イヤ3を介してのみ支持された状態で樹脂封止されるの
で、この封止時に注入樹脂により半導体素子1が押され
て移動し、半導体素子1とボンディングワイヤ3との間
、リード2とボンディングワイヤ3との間、及び隣接す
るボンディングワイヤ3同士の間で、接触又は結線部不
良等が発生するという欠点がある。
Furthermore, since the semiconductor element 1 is resin-sealed while being supported by the leads 2 only via the bonding wires 3, the semiconductor element 1 is pushed and moved by the injected resin at the time of sealing, and the semiconductor element 1 is There is a drawback that contact or connection defects may occur between the lead 2 and the bonding wire 3, between the lead 2 and the bonding wire 3, and between adjacent bonding wires 3.

本発明はかかる問題点に鑑みてなされたものであって、
樹脂又は半導体素子に熱応力によるクラックが発生する
ことがなく、また回路特性の異常発生が防止されて信頼
性が向上すると共に、樹脂の封止工程において半導体素
子を外部手段により支持することを可能としてその封止
時の移動が防止された樹脂封止型半導体装置を提供する
ことを目的とする。
The present invention has been made in view of such problems, and includes:
Cracks do not occur in the resin or semiconductor element due to thermal stress, and abnormalities in circuit characteristics are prevented, improving reliability, and the semiconductor element can be supported by external means during the resin sealing process. An object of the present invention is to provide a resin-sealed semiconductor device whose movement during sealing is prevented.

[問題点を解決するための手段] 本発明に係る樹脂封止型半導体装置は、半導体素子とリ
ードとがボンディングワイヤにより結線され、前記半導
体素子及びリードが樹脂で封止されている樹脂封止型半
導体装置において、前記半導体素子はその一部に前記封
止用樹脂に被覆されていない領域を有することを特徴と
する。
[Means for Solving the Problems] A resin-sealed semiconductor device according to the present invention is a resin-sealed semiconductor device in which a semiconductor element and a lead are connected by a bonding wire, and the semiconductor element and the lead are sealed with a resin. In the type semiconductor device, the semiconductor element is characterized in that a portion thereof has a region not covered with the sealing resin.

[作用] 本発明においては、半導体素子がその一部の領域におい
て、封止用樹脂に被覆されていない、このため、樹脂封
止時には、この露出領域となる部分を介して半導体素子
を支持することにより、封止樹脂により半導体素子が押
されて移動してしまうという事態が回避される。また、
樹脂封止されて製品として組立てられた後は、この露出
領域を介して、半導体素子から発生する熱を離散させる
ことができ、更に、積極的に半導体素子を冷却すること
ができる。従って、熱膨張差に起因する半導体素子又は
封止樹脂のクラックの発生及び熱に起因する半導体素子
の回路特性の異常発生を回避することができる。
[Function] In the present invention, a part of the semiconductor element is not covered with the sealing resin. Therefore, during resin sealing, the semiconductor element is supported through this exposed area. This prevents the semiconductor element from being pushed and moved by the sealing resin. Also,
After being resin-sealed and assembled as a product, the heat generated from the semiconductor element can be dispersed through this exposed region, and furthermore, the semiconductor element can be actively cooled. Therefore, it is possible to avoid the occurrence of cracks in the semiconductor element or the sealing resin due to the difference in thermal expansion, and the occurrence of abnormalities in the circuit characteristics of the semiconductor element due to heat.

[実施例] 次に、本発明の実施例について、添付の図面を参照して
説明する。
[Example] Next, an example of the present invention will be described with reference to the attached drawings.

第1図(a)乃至(c)は本発明の第1の実施例を示す
部分断面図であり、夫々その変形例を示、す。半導体素
子1は、リード2に対して、ボンディングワイヤ3によ
り結線されている。そして、第1図(a)に示す樹脂封
止型半導体装置においては、半導体素子1の表面におけ
るボンディングワイヤ3との接続部分、ボンディングワ
イヤ3、リード2の一部及び半導体素子1の裏面が樹脂
4により被覆されて、半導体素子1及びリード2が樹脂
封止されている。つまり、樹脂4は、半導体素子1の表
面に露出孔5を有し、この露出孔5において、半導体素
子1の回路表面の一部分が露出している。
FIGS. 1(a) to 1(c) are partial sectional views showing a first embodiment of the present invention, each showing a modification thereof. The semiconductor element 1 is connected to the leads 2 by bonding wires 3. In the resin-sealed semiconductor device shown in FIG. 1(a), the connection portion with the bonding wire 3 on the surface of the semiconductor element 1, the bonding wire 3, a part of the lead 2, and the back surface of the semiconductor element 1 are made of resin. 4, and the semiconductor element 1 and leads 2 are sealed with resin. That is, the resin 4 has an exposure hole 5 on the surface of the semiconductor element 1, and a part of the circuit surface of the semiconductor element 1 is exposed in the exposure hole 5.

一方、第1図(b)に示す樹脂封止型半導体装置におい
ては、樹脂4は半導体素子1の裏面に露出孔5を有し、
半導体素子1の裏面の一部の領域が露出している。
On the other hand, in the resin-sealed semiconductor device shown in FIG. 1(b), the resin 4 has an exposure hole 5 on the back surface of the semiconductor element 1,
A part of the back surface of the semiconductor element 1 is exposed.

また、第1図(C)に示す樹脂封止型半導体装置におい
ては、半導体素子1の表面及び裏面の双方の一部の領域
に整合して露出孔5が形成されており、この領域にて半
導体素子1が露出している。
Furthermore, in the resin-sealed semiconductor device shown in FIG. 1(C), an exposure hole 5 is formed in alignment with a partial region on both the front and back surfaces of the semiconductor element 1. Semiconductor element 1 is exposed.

このように、本発明の実施例に係る樹脂封止型半導体装
置においては、半導体素子1の表面の一部分に外部に露
出した露出領域を有する。
As described above, in the resin-sealed semiconductor device according to the embodiment of the present invention, a portion of the surface of the semiconductor element 1 has an exposed region exposed to the outside.

このため、金型に半導体素子1を設置しその周囲に樹脂
を供給して半導体素子1を樹脂封止する半導体装置の組
立工程においては、例えば、第3図に示すように、半導
体素子1の露出孔5を形成すべき領域を介して、真空吸
着管7により半導体素子1を吸着固定することができる
。つまり、樹脂封止用金型の下型を挿通してこの下型外
部から半導体素子1の裏面まで到達するようにして真空
吸着管7を設置し、この吸着管7の吸引孔8を介して半
導体素子1を真空吸引する。これにより、樹脂封止工程
において、半導体素子1はボンディングワイヤ3以外に
、外部支持手段(吸着管7)によっても支持されること
になる。
For this reason, in the assembly process of a semiconductor device in which the semiconductor element 1 is placed in a mold and the semiconductor element 1 is sealed with resin by supplying resin around the mold, for example, as shown in FIG. The semiconductor element 1 can be suctioned and fixed by the vacuum suction tube 7 through the area where the exposure hole 5 is to be formed. That is, the vacuum suction tube 7 is installed so as to pass through the lower mold of the resin sealing mold and reach the back surface of the semiconductor element 1 from the outside of the lower mold, and the vacuum suction tube 7 is inserted through the suction hole 8 of the suction tube 7. The semiconductor element 1 is vacuum-suctioned. Thereby, in the resin sealing process, the semiconductor element 1 is supported not only by the bonding wire 3 but also by the external support means (suction tube 7).

従って、この状態で半導体素子1を樹脂封止す、ると、
樹脂封止時の半導体素子1の位置ずれがなくなり、この
位置ずれに起因するボンディングワイヤの結線不良を防
止することができる。更に、この真空吸着管7を上・下
方向に移動することができるようにすると、リード2の
位置に対する半導体素子1の高・低位置関係も調節する
ことができ、半導体素子1の周辺部とボンディングワイ
ヤ3との間の接触による結線不良も減少し、半導体装置
の組立歩留が向上する。
Therefore, if the semiconductor element 1 is sealed with resin in this state,
Misalignment of the semiconductor element 1 during resin sealing is eliminated, and poor connection of bonding wires caused by this misalignment can be prevented. Furthermore, by making the vacuum suction tube 7 movable in the upward and downward directions, the height and low positional relationship of the semiconductor element 1 with respect to the position of the leads 2 can also be adjusted, and the peripheral part of the semiconductor element 1 can be adjusted. Connection defects due to contact with the bonding wires 3 are also reduced, and the assembly yield of semiconductor devices is improved.

また、半導体素子を樹脂封止して組立てた後の製品にお
いては、露出孔5を介して半導体素子1の一部の領域が
露出しているため、その熱放散性が優れている。従って
、半導体素子1の回路動作時に熱が発生しても、それに
よるクラックの発生及び回路特性の異常発生が抑制され
る。
Further, in a product obtained by resin-sealing the semiconductor element and assembling the product, a part of the semiconductor element 1 is exposed through the exposure hole 5, so that its heat dissipation property is excellent. Therefore, even if heat is generated during circuit operation of the semiconductor element 1, the occurrence of cracks and abnormalities in circuit characteristics due to the heat is suppressed.

更に、第3図に示すように、半導体装置の露出孔5に冷
却部材、9等を取付けることができる。これにより、半
導体素子1を直接冷却することが可能である。このため
−半導体装置の動作時に熱が発生しても、この熱による
回路特性の異常を防止することができる。また、半導体
素子1の温度上昇を抑制することができるため、半導体
素子1、リード2及び封止用樹脂4の膨張を抑制するこ
とができる。従って、これらの半導体素子1、リード2
及び封止用樹脂4に印加される応力が小さくなり、クラ
ックの発生が回避されて半導体装置の信頼性が向上する
Furthermore, as shown in FIG. 3, a cooling member 9, etc. can be attached to the exposure hole 5 of the semiconductor device. Thereby, it is possible to directly cool the semiconductor element 1. Therefore, even if heat is generated during operation of the semiconductor device, abnormality in circuit characteristics due to this heat can be prevented. Moreover, since the temperature rise of the semiconductor element 1 can be suppressed, the expansion of the semiconductor element 1, the leads 2, and the sealing resin 4 can be suppressed. Therefore, these semiconductor elements 1, leads 2
Also, the stress applied to the sealing resin 4 is reduced, the occurrence of cracks is avoided, and the reliability of the semiconductor device is improved.

第4図(a)乃至(C)は本発明の第2の実施例を示す
部分断面図である。第4図(a)乃至(C)に示す樹脂
封止型半導体装置は、第1図(a)乃至(C)に示す樹
脂封止型半導体装置と同様に、夫々半導体素子1の回路
表面、半導体素子1の裏面及び半導体素子1の表裏両面
の夫々−部分が露出孔5を介して露出している。しかし
、この実施例においては、半導体素子1はコーティング
用樹脂膜6により極めて薄く被覆されている。
FIGS. 4(a) to 4(C) are partial sectional views showing a second embodiment of the present invention. The resin-sealed semiconductor device shown in FIGS. 4(a) to (C) is similar to the resin-sealed semiconductor device shown in FIGS. The back surface of the semiconductor element 1 and the front and back surfaces of the semiconductor element 1 are exposed through the exposure hole 5 . However, in this embodiment, the semiconductor element 1 is coated extremely thinly with the coating resin film 6.

このコーティング用樹脂膜6は封止用樹脂4との密着性
が良いと共に、耐湿性が優れた材料からなる。
This coating resin film 6 is made of a material that has good adhesion to the sealing resin 4 and has excellent moisture resistance.

このように、この第2の実施例においては、半導体装置
の半導体素子1には、封止用樹脂4との密着性が良いと
共に、耐湿性が優れた樹脂を極めて薄く被着することに
より、コーティング用樹脂膜6を被覆しであるから、半
導体素子1の表面にキズがつきにくくなるばかりでなく
、半導体素子1とリード2又は封止用樹脂4との間の熱
膨張の差が緩和される。このため、熱膨張時に半導体素
子1、封止用樹脂4及びリード2に印加される応力が更
に一層減少して、半導体素子1及び封止用樹脂4にクラ
ックが発生しにくくなるので、半導体装置の信頼性が更
に一層向上する。
As described above, in this second embodiment, the semiconductor element 1 of the semiconductor device is coated with an extremely thin layer of resin that has good adhesion with the sealing resin 4 and has excellent moisture resistance. Since the coating resin film 6 is coated, not only is the surface of the semiconductor element 1 less likely to be scratched, but also the difference in thermal expansion between the semiconductor element 1 and the leads 2 or the sealing resin 4 is alleviated. Ru. Therefore, the stress applied to the semiconductor element 1, the sealing resin 4, and the leads 2 during thermal expansion is further reduced, making it difficult for cracks to occur in the semiconductor element 1 and the sealing resin 4, so that the semiconductor device The reliability of the system is further improved.

[発明の効果] 本発明によれば、半導体素子の一部の領域が封止用樹脂
に被覆されていないから、半導体素子の熱放散性が向上
すると共に、この領域を介して半導体素子を強制冷却す
ることができ、回路動作時に発生する熱による種々の不
都合(半導体素子及び封止樹脂のクラック発生並びに半
導体素子の回路特性の異常発生)・を回避することがで
きる。また、半導体素子を樹脂封止する工程においては
、この領域を利用して半導体素子を支持固定することが
できるから、半導体素子の移動による結線不良の発生等
を防止することができる。
[Effects of the Invention] According to the present invention, since a part of the semiconductor element is not covered with the sealing resin, the heat dissipation of the semiconductor element is improved, and the semiconductor element is not forced through this area. This makes it possible to avoid various inconveniences caused by heat generated during circuit operation (creating cracks in the semiconductor element and sealing resin, and abnormalities in the circuit characteristics of the semiconductor element). Furthermore, in the step of resin-sealing the semiconductor element, this area can be used to support and fix the semiconductor element, so it is possible to prevent wiring failures due to movement of the semiconductor element.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)乃至(C)は本発明の第1の実施例を示す
樹脂封止型半導体装置の部分断面図、第2図及び第3図
は第1図(b)に示す樹脂封止型半導体装置を使用して
本発明の効果を示す部分断面図、第4図(a)乃至(C
)は本発明の第2の実施例を示す樹脂封止型半導体装置
の部分断面図、第5図は従来の樹脂封止型半導体装置を
示す部分断面図である。 1;半導体素子、2;リード、3;ボンディングワイヤ
、4;封止用樹脂、5;露出孔、6;コーティング用樹
脂、7;吸着管、8;吸引孔、9;冷却部材
1(a) to (C) are partial sectional views of a resin-sealed semiconductor device showing a first embodiment of the present invention, and FIGS. 2 and 3 are resin-sealed semiconductor devices shown in FIG. 1(b). FIGS. 4(a) to 4(C) are partial cross-sectional views showing the effects of the present invention using a stop type semiconductor device.
) is a partial sectional view of a resin-sealed semiconductor device according to a second embodiment of the present invention, and FIG. 5 is a partial sectional view of a conventional resin-sealed semiconductor device. 1; semiconductor element, 2; lead, 3; bonding wire, 4; sealing resin, 5; exposure hole, 6; coating resin, 7; suction tube, 8; suction hole, 9; cooling member

Claims (2)

【特許請求の範囲】[Claims] (1)半導体素子とリードとがボンディングワイヤによ
り結線され、前記半導体素子及びリードが樹脂で封止さ
れている樹脂封止型半導体装置において、前記半導体素
子はその一部に前記封止用樹脂に被覆されていない領域
を有することを特徴とする樹脂封止型半導体装置。
(1) In a resin-sealed semiconductor device in which a semiconductor element and a lead are connected by a bonding wire, and the semiconductor element and the lead are sealed with resin, the semiconductor element is partially covered with the sealing resin. A resin-sealed semiconductor device characterized by having an uncovered region.
(2)前記半導体素子には、コーティング用樹脂の薄膜
が被着されていることを特徴とする特許請求の範囲第1
項に記載の樹脂封止型半導体装置。
(2) Claim 1, characterized in that the semiconductor element is coated with a thin film of coating resin.
2. The resin-sealed semiconductor device described in 2.
JP29576887A 1987-11-24 1987-11-24 Resin-sealed semiconductor device Pending JPH01136356A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29576887A JPH01136356A (en) 1987-11-24 1987-11-24 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29576887A JPH01136356A (en) 1987-11-24 1987-11-24 Resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JPH01136356A true JPH01136356A (en) 1989-05-29

Family

ID=17824917

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29576887A Pending JPH01136356A (en) 1987-11-24 1987-11-24 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPH01136356A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0582705A1 (en) * 1992-03-02 1994-02-16 Motorola, Inc. Molded ring integrated circuit package
EP0566872A3 (en) * 1992-04-21 1994-05-11 Motorola Inc A thermally enhanced semiconductor device and method for making the same
EP0690499A3 (en) * 1994-06-30 1997-05-28 Digital Equipment Corp Paddleless molded plastic semiconductor chip package
US5776800A (en) * 1994-06-30 1998-07-07 Hamburgen; William Riis Paddleless molded plastic semiconductor chip package
WO2014188632A1 (en) * 2013-05-23 2014-11-27 パナソニック株式会社 Semiconductor device having heat dissipation structure and laminate of semiconductor devices

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS552112B2 (en) * 1976-01-14 1980-01-18
JPS5577160A (en) * 1978-12-07 1980-06-10 Nec Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS552112B2 (en) * 1976-01-14 1980-01-18
JPS5577160A (en) * 1978-12-07 1980-06-10 Nec Corp Semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0582705A1 (en) * 1992-03-02 1994-02-16 Motorola, Inc. Molded ring integrated circuit package
EP0582705A4 (en) * 1992-03-02 1995-02-22 Motorola Inc Molded ring integrated circuit package.
EP0566872A3 (en) * 1992-04-21 1994-05-11 Motorola Inc A thermally enhanced semiconductor device and method for making the same
US5483098A (en) * 1992-04-21 1996-01-09 Motorola, Inc. Drop-in heat sink package with window frame flag
EP0690499A3 (en) * 1994-06-30 1997-05-28 Digital Equipment Corp Paddleless molded plastic semiconductor chip package
US5776800A (en) * 1994-06-30 1998-07-07 Hamburgen; William Riis Paddleless molded plastic semiconductor chip package
WO2014188632A1 (en) * 2013-05-23 2014-11-27 パナソニック株式会社 Semiconductor device having heat dissipation structure and laminate of semiconductor devices

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