JP2628412B2 - Lead frame and semiconductor device using the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a lead frame and a semiconductor device using the same, and more particularly, to a structure of a die pad for supporting a semiconductor chip.

[0002]

2. Description of the Related Art In recent years, in the field of semiconductor devices, reductions in package size and thickness have been promoted. On the other hand, high integration is progressing in response to demands for higher functionality of semiconductor devices, and semiconductor chips are also increasing in size.
Under such circumstances, the area of the semiconductor chip occupying the area of the die pad has become larger, and the size of the die pad with respect to the package size has also become larger.

Conventionally, the resin-encapsulated semiconductor device has a problem that a semiconductor chip is cracked (chip crack) due to a difference in a coefficient of thermal expansion between the die pad and the semiconductor chip, and an outer package due to warpage of the package. There is a problem that the coplanarity (flatness) of the lead is deteriorated and a connection failure occurs when connecting to an external circuit.

[0004] Such a problem has become more serious with the increase in the die pad size with respect to the package size as described above.

In order to solve this problem, as shown in FIG. 5, a concave portion or a long groove (slit) is formed on the back side of the die pad 11.
Is formed to increase the adhesion between the mold resin 19 and the die pad, and to forcibly restrain the thermal expansion of the die pad with the surrounding resin, or to adjust the molding time in the semiconductor device assembly process and the curing time after molding. Such,
Extremely strict manufacturing environment management is performed.

[0006]

However, in these methods, since the molding process of the lead frame is complicated and the thermal expansion is forcibly restrained, the reliability is reduced due to the generated stress. there were. Another problem is that the manufacturing environment management equipment must be enhanced.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor device which is easy to manufacture and has high reliability, while reducing the occurrence of chip cracks even when the size of a semiconductor chip is increased. I do.

[0008]

[Means for Solving the Problems]

[0009]

[0010]

Therefore, in the semiconductor device of the present invention, the die pad is formed of a material having a thermal expansion coefficient substantially equal to that of the sealing resin, and is formed of a ring-shaped body having an opening in the center.
Preferably, the die pad is configured to support the semiconductor chip at three or four spaced apart points on the periphery of the semiconductor chip. More preferably, the ring-shaped body has a width substantially equal to that of the lead, and a semiconductor chip is mounted on the ring-shaped body so as to overlap the ring-shaped body, and supports a peripheral portion of the semiconductor chip. . More preferably, the ring-shaped body is provided with a step on the semiconductor chip mounting surface, the step corresponding to the periphery of the semiconductor chip. Preferably, the ring-shaped body is configured to support a peripheral edge of the semiconductor chip by a tapered portion formed on an inner wall surface of the semiconductor chip mounting surface.

[0012]

According to the above construction, the die pad is made of a material having substantially the same coefficient of thermal expansion as the sealing resin;
By being formed of a ring-shaped body, most of the front and rear surfaces of the semiconductor chip are in contact with the sealing resin, and the region connected to the die pad has a thermal expansion coefficient substantially equal to that of the sealing resin. doing. As a result,
There is no difference between the thermal expansion coefficient and the contraction coefficient between the front surface and the back surface, and there is no chip crack, package crack, package warpage, or the like. That is, the semiconductor chip is all surrounded by a material having substantially the same coefficient of thermal expansion, and cracks due to temperature changes are almost completely eliminated. In addition, the semiconductor chip is placed on the ring-shaped body and is supported only at the peripheral portion, and the contact area between the semiconductor chip and the die pad is extremely small despite the extremely stable support. Thus, a highly reliable semiconductor device without chip cracks can be obtained. In addition, by forming the die pad so as to have the same width as the lead, in the case of pressing, the occurrence of distortion is small,
Also in the case of etching, high-precision etching can be achieved, and the shape processing of the lead frame is easy.

Further, by forming the ring-shaped body so as to have a step corresponding to the peripheral edge of the semiconductor chip,
In the die bonding, the chip can be easily positioned, and the chip is supported from two sides of the periphery, so that the support is firm. In addition, the step serves as a stopper, which can prevent the semiconductor chip from being displaced.

Preferably, the ring-shaped body is supported on the periphery of the semiconductor chip by a tapered portion formed on the inner wall surface of the semiconductor chip mounting surface. Even if the size of the chip changes, it can be supported at any position of the taper, so that it is versatile.

[0015]

Embodiments of the present invention will be described below in detail with reference to the drawings.

The lead frame according to the embodiment of the present invention is shown in FIG.
As shown in (a) and (b), the die pad 11 is formed of a ring-shaped body having an opening H at the center. FIG. 1 (b) is a perspective view of a main part of FIG. 1 (a).

That is, in this lead frame, inner leads 12 are radially arranged around a die pad 11 and are integrally connected by a tie bar 13, and an outer lead 14 is connected to each inner lead. The tips are supported by 15, 16. Here, reference numeral 17 denotes a support bar for supporting the die pad.

The semiconductor chip 1 is connected to the die frame 11 of the lead frame, and a resin bonding is performed through a wire bonding step of connecting the semiconductor chip and the inner leads using the wires 18. 16 is cut off and the outer leads are bent for surface mounting, and the semiconductor device is completed as shown in the sectional view of FIG. 19 is a sealing resin.

The connection of the semiconductor chip 1 to the die pad 11 is made via a conductive adhesive formed by a usual syringe method, printing method or the like.

According to this lead frame, chip cracks are not generated even by heating during use, not to mention the molding step and the curing step after molding, and a highly reliable semiconductor device is obtained. be able to.

Further, since most areas of the front and back surfaces of the semiconductor chip are in contact with the mold resin, there is no difference in the thermal expansion coefficient and the contraction rate between the front and back surfaces, and chip cracks, package cracks and package warpage are eliminated. Etc. are greatly reduced.

Further, the lead frame is positioned on the wiring pattern of the mounting substrate, and is fixed by heating the mounting substrate side. However, since the outer leads do not warp, poor contact with the wiring substrate may occur. And good mounting can be performed.

As described above, a semiconductor device using a large-sized semiconductor chip with a high degree of integration can be mounted very easily and with high reliability without requiring any special manufacturing equipment. .

The material of the lead frame is not limited to the alloy 42, but other materials such as copper may be used.

In the above embodiment, the die pad 11 is formed integrally with a lead portion such as an inner lead. However, the same material or different materials having different thicknesses may be used.
It may be formed separately and connected. In this case, for example, the die pad may be formed of a resin having a coefficient of thermal expansion close to that of the mold resin, so that the reliability can be further improved. Further, a plurality of types of die pads alone may be prepared and combined according to the chip size. Furthermore, in the above-described embodiment, the die pad is formed in a ring shape so as to be supported on the entire periphery of the semiconductor chip. However, it is not always necessary to support the die pad on the entire periphery of the semiconductor chip. For example, a part may be supported.

Further, as shown in FIG. 3, a step may be formed along the periphery of the semiconductor chip of the die pad 11, so that the semiconductor chip mounting area is a thin area 11s.

This makes it possible to prevent misalignment of the semiconductor chip.

If the step of the die pad is formed in a tapered shape as shown in FIG. 4, the positioning of the semiconductor chip can be facilitated.

[0029]

As described above, according to the present invention, the die pad is made of a material having substantially the same thermal expansion coefficient as the sealing resin, and is made of a ring-shaped body having an opening at the center. Therefore, a highly reliable semiconductor device can be obtained without occurrence of cracks due to a difference in coefficient of thermal expansion.

[Brief description of the drawings]

FIG. 1 is a diagram showing a lead frame according to an embodiment of the present invention.

FIG. 2 is a diagram showing a semiconductor device using a lead frame according to an embodiment of the present invention;

FIG. 3 is a diagram showing a semiconductor device using a lead frame according to another embodiment of the present invention;

FIG. 4 is a diagram showing a semiconductor device using a lead frame according to another embodiment of the present invention;

FIG. 5 is a diagram showing a semiconductor device using a conventional lead frame.

[Explanation of symbols]

 11 die pad 12 inner lead 13 tie bar 14 outer lead 15 side bar 16 side bar 17 support bar

Claims (5)

(57) [Claims] 1. A semiconductor device having a semiconductor chip mounted on a die pad, comprising a lead extending around the semiconductor chip, and formed so as to cover the semiconductor chip with a sealing resin, wherein the die pad is A semiconductor device comprising a material having substantially the same thermal expansion coefficient as that of a sealing resin and comprising a ring-shaped body having an opening in the center. 2. The semiconductor device according to claim 1, wherein the die pad is configured to support the semiconductor chip at three or four points apart from each other at a periphery of the semiconductor chip.
(1) The semiconductor device according to (1). 3. The ring-shaped body has a width substantially equal to the width of the lead, a semiconductor chip is mounted on the ring-shaped body so as to overlap the ring-shaped body, and a peripheral portion of the semiconductor chip is supported. The semiconductor device according to claim 1, wherein: 4. The semiconductor device according to claim 1, wherein the ring-shaped member has a step on a surface on which the semiconductor chip is mounted, the step corresponding to a periphery of the semiconductor chip. 5. The semiconductor device according to claim 1, wherein the ring-shaped member is configured to support a peripheral edge of the semiconductor chip by a tapered portion formed on an inner wall surface of the semiconductor chip mounting surface. Semiconductor device.