JPH01132178A - Superconducting transistor and manufacture thereof - Google Patents

Superconducting transistor and manufacture thereof

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Publication number
JPH01132178A
JPH01132178A JP62289624A JP28962487A JPH01132178A JP H01132178 A JPH01132178 A JP H01132178A JP 62289624 A JP62289624 A JP 62289624A JP 28962487 A JP28962487 A JP 28962487A JP H01132178 A JPH01132178 A JP H01132178A
Authority
JP
Japan
Prior art keywords
superconducting
semiconductor substrate
electrodes
transistor
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62289624A
Other languages
Japanese (ja)
Inventor
Norio Kaneko
典夫 金子
Nobuhiko Sato
信彦 佐藤
Masahiro Nakanishi
中西 正浩
Kumiko Hiramatsu
久美子 平松
Toru Koizumi
徹 小泉
Yasuko Motoi
泰子 元井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP62289624A priority Critical patent/JPH01132178A/en
Publication of JPH01132178A publication Critical patent/JPH01132178A/en
Pending legal-status Critical Current

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  • Superconductor Devices And Manufacturing Methods Thereof (AREA)

Abstract

PURPOSE:To obtain a superconducting transistor capable of forming a multilayer structure and an arbitrary shape by a method wherein at least two facing superconducting electrodes, at least one control electrode used to control an electric current flowing between the superconducting electrodes and an insulating layer are formed on a semiconductor substrate so as to come into contact with it. CONSTITUTION:The following are provided: a semiconductor substrate 1; at least two facing superconducting electrodes 2 formed on the semiconductor substrate 1 so as to come into contact with it; at least one control electrode 3 which has been formed on the semiconductor substrate 1 so as to come into contact with it and which controls an electric current flowing between the superconducting electrodes 2; an insulating layer 4 which has been formed on the semiconductor substrate 1 so as to come into contact with it and which has been formed on one face where said superconducting electrodes 2 and said control electrode 3 have not been formed. For example, a superconducting transistor is constituted by forming the following: one pair of facing superconducting electrodes 2 partitioned by an insulating layer 4 formed perpendicularly to a semiconductor substrate 1 on the surface of the semiconductor substrate 1; one pair of control electrodes 3. When a voltage is impressed on the control electrodes 3, a superconducting weak coupling state between the superconducting electrodes 2 can be controlled.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は超伝導デバイスに関し、特に半導体中をトンネ
ルする超伝導電子の数を制御電極に印加する電圧により
制御する超伝導トランジスタおよびその製造方法に関す
る。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to superconducting devices, and particularly to a superconducting transistor in which the number of superconducting electrons tunneling through a semiconductor is controlled by a voltage applied to a control electrode, and a method for manufacturing the same. Regarding.

〔従来の技術〕[Conventional technology]

従来、半導体と超伝導体を組み合わせた超伝導素子とし
て、例えば特開昭62−122287号と特開昭62−
18776号に開示されたものとがある。
Conventionally, as a superconducting element that combines a semiconductor and a superconductor, for example, Japanese Patent Laid-Open Nos. 122287-1987 and 1983-
There is one disclosed in No. 18776.

前者の超伝導素子は、第5図に示すように、半導体基板
la上に絶縁層4aを介して1対の超伝導電極2aが対
向して形成され、さらにその対向部に絶縁物7、絶縁層
4bを介して制御電極3aが形成されている積層構造で
ある。
In the former superconducting element, as shown in FIG. 5, a pair of superconducting electrodes 2a are formed facing each other on a semiconductor substrate la with an insulating layer 4a interposed therebetween. It has a laminated structure in which a control electrode 3a is formed with a layer 4b interposed therebetween.

一方、後者の超伝導素子は、第6図に示すように、半導
体基板1bの上に形成された超伝導電極2bと、その上
に絶縁層4c、制御電極3bを介して形成された超伝導
電極2Cとが弱結合体8によって接続された段構造であ
る。
On the other hand, the latter superconducting element, as shown in FIG. It has a stepped structure in which the electrode 2C is connected by a weak linker 8.

(発明が解決しようとする問題点) しかしながら、上記従来例のうち第5図に示した超伝導
素子はりソグラフィ技術およびエツチング技術を用い、
多数の工程を経て作製される。このため積層あるいはエ
ツチングのためのマスクの位置合わせに精度が要求され
素子の性能の制御性および歩留まりに問題がある。また
第6図に示した超伝導素子においては、弱結合体部は段
差部に411層されろために、断線等の問題がある。
(Problems to be Solved by the Invention) However, among the above conventional examples, using the superconducting element beam lithography technique and etching technique shown in FIG.
It is manufactured through many steps. For this reason, precision is required for mask positioning for lamination or etching, resulting in problems in controllability of device performance and yield. Further, in the superconducting element shown in FIG. 6, since the weak coupler portion is formed in 411 layers in the stepped portion, there are problems such as wire breakage.

本発明の目的は、上記問題を解決するとともに、さらに
従来の超伝導素子と異なり、多層構造が可能で、任意の
形状が可能な超伝導トランジスタおよびその製造方法を
提供することである。
An object of the present invention is to solve the above-mentioned problems, and further to provide a superconducting transistor that can have a multilayer structure and any shape, unlike conventional superconducting elements, and a method for manufacturing the same.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、半導体基板と、 inn主半導体基板上接して設けられ、少なくとも2つ
の対向する超伝導電極と、 前記半導体基板上に接して設けられ、前記超伝導電極間
を流れる電流を制御する少なくとも1つの制御電極と、 前記半導体基板上に接して、前記超伝導電極、前記制御
電極が設けられていない一面に設けられている絶縁層と
を有する超伝導トランジスタおよび 半導体基板上に酸化物超伝導薄膜を形成した後、前記酸
化物超伝導薄膜を相変化あるいは組成変化させることに
より絶縁層を形成する工程を含むことを特徴とする超伝
導トランジスタの製造方法である。
The present invention includes: a semiconductor substrate; at least two opposing superconducting electrodes provided on and in contact with the main semiconductor substrate; and at least one superconducting electrode provided on and in contact with the semiconductor substrate for controlling a current flowing between the superconducting electrodes. A superconducting transistor having one control electrode and an insulating layer provided on one surface in contact with the semiconductor substrate where the superconducting electrode and the control electrode are not provided, and an oxide superconductor on the semiconductor substrate. This method of manufacturing a superconducting transistor includes the step of forming an insulating layer by changing the phase or composition of the oxide superconducting thin film after forming the thin film.

第1図は、本発明の超伝導トランジスタの一例を示す模
式上面図、第2図は第1図におけるA−B断面図である
FIG. 1 is a schematic top view showing an example of a superconducting transistor of the present invention, and FIG. 2 is a sectional view taken along line AB in FIG.

本発明の超伝導トランジスタは半導体基板1の上面に半
導体基板1に対して垂直に設けられた絶縁層4によって
隔てられている一対の対向する超伝導電極2と、一対の
制御電極3とを有している。さらに、超伝導電極2、制
御電極3、および絶縁層4は半導体基板1の同一平面上
に形成されている平坦構造である。制御電極3に印加す
る電圧により超伝導電極2間の超伝導弱結合状態を制御
することを特徴としている。なお、制御電極3は1つで
もよいが、特性の安定化のためには、制御電極を一対に
することが望ましい。
The superconducting transistor of the present invention has a pair of opposing superconducting electrodes 2 and a pair of control electrodes 3 separated by an insulating layer 4 provided perpendicularly to the semiconductor substrate 1 on the upper surface of the semiconductor substrate 1. are doing. Further, the superconducting electrode 2, the control electrode 3, and the insulating layer 4 have a flat structure formed on the same plane of the semiconductor substrate 1. It is characterized in that the superconducting weak coupling state between the superconducting electrodes 2 is controlled by the voltage applied to the control electrode 3. In addition, although the number of control electrodes 3 may be one, it is desirable to use a pair of control electrodes in order to stabilize the characteristics.

次に、本発明の超伝導トランジスタの製造方法を説明す
る。第3図に示すように半導体基板1に酸化物超伝導@
膜9を蒸着しく第3図(1)、(2))、この一部に相
変化あるいは組成変化を起こすことにより、絶縁体化し
、超伝導電極および制御電極である酸化物超伝導薄膜9
を隔てる絶縁層4を形成することができる(第3図(3
)、(4))。
Next, a method for manufacturing a superconducting transistor according to the present invention will be explained. As shown in FIG. 3, the semiconductor substrate 1 has an oxide superconductor @
When the film 9 is deposited (Figs. 3 (1) and (2)), a part of it undergoes a phase change or a composition change to become an insulator, forming the oxide superconducting thin film 9 that serves as the superconducting electrode and the control electrode.
It is possible to form an insulating layer 4 that separates the
), (4)).

なお、蒸着方法としては真空蒸着法、スパッタリング法
、イオンブレーティング法、電子ビーム蒸着法等その他
特に限定されない。
Note that the vapor deposition method may be a vacuum vapor deposition method, a sputtering method, an ion blating method, an electron beam vapor deposition method, etc., and is not particularly limited.

相変化あるいは組成変化は例えば、エレクトロンビーム
(電子ビーム)やイオンビームを照射することにより生
じさせることができる。
A phase change or a composition change can be caused, for example, by irradiation with an electron beam or an ion beam.

上記製造方法によれば、複数回のマスク合わせ、および
段差部への蒸着が不要となり単純な工程により、本発明
の超伝導トランジスタを得ることが可能となる。このた
め歩留まりが向上し、断線等の問題点を解決できる。
According to the above manufacturing method, multiple mask alignments and vapor deposition on stepped portions are not required, and the superconducting transistor of the present invention can be obtained through simple steps. Therefore, the yield is improved and problems such as wire breakage can be solved.

(実施例) 以下、実施例に基づいて本発明を説明する。(Example) Hereinafter, the present invention will be explained based on Examples.

実施例1 第1図は本発明の超伝導トランジスタの一例を示す模式
上面図である。超伝導電極2および制御電極3がそれぞ
れ幅50人の絶縁層4によって隔てられて形成されてい
る。これら超伝導電極2、制御電極3、絶縁層4は半導
体基板1上に形成されているので、超伝導電極2間は超
伝導弱結合状態を有している。本実施例はこの超伝導弱
結合状態を制御電極3に印加する電圧で制御できる電界
効果トランジスタ構成である。超伝導弱結合状態を制御
できれば超伝導電極2間を流れる超伝導電流を変化させ
ることができる。
Example 1 FIG. 1 is a schematic top view showing an example of a superconducting transistor of the present invention. A superconducting electrode 2 and a control electrode 3 are formed separated from each other by an insulating layer 4 having a width of 50 mm. Since these superconducting electrodes 2, control electrodes 3, and insulating layer 4 are formed on the semiconductor substrate 1, there is a superconducting weak coupling state between the superconducting electrodes 2. This embodiment has a field effect transistor configuration in which this superconducting weakly coupled state can be controlled by a voltage applied to the control electrode 3. If the superconducting weak coupling state can be controlled, the superconducting current flowing between the superconducting electrodes 2 can be changed.

次に、この超伝導トランジスタの製造方法を第3図によ
り説明する。
Next, a method for manufacturing this superconducting transistor will be explained with reference to FIG.

不純物濃度7X1013個/cm3のホウ素を不純物と
して含んだSrTiO3の半導体基板1の表面にスパッ
タリング法によりEr−Ba−Cu−0を成膜し、酸化
物超伝導薄膜9を厚さ7000人程度形成する。次にビ
ームを絞った電子ビームを加速電圧6keVで照射する
と、被照射部の酸化物超伝導体f!膜9の温度が450
℃程度に上昇し、相変化をおこし、比抵抗を示すように
なり、幅50人の絶縁層4が形成される。このように電
子ビームを、絶縁層4を形成すべき部分に照射すること
により、第1図に示すような形状の超伝導トランジスタ
を作製することができる。このとき酸化物超伝導薄膜9
の表面においてビーム径は約70人であるので、十分に
超伝導弱結合状態を形成できる。
A film of Er-Ba-Cu-0 is formed by sputtering on the surface of a semiconductor substrate 1 of SrTiO3 containing boron as an impurity at an impurity concentration of 7 x 1013 pieces/cm3 to form an oxide superconducting thin film 9 with a thickness of about 7000 layers. . Next, when the focused electron beam is irradiated with an acceleration voltage of 6 keV, the oxide superconductor in the irradiated area f! The temperature of membrane 9 is 450
The temperature rises to about .degree. C., a phase change occurs and a specific resistance is exhibited, and an insulating layer 4 having a width of 50 mm is formed. By irradiating the portion where the insulating layer 4 is to be formed with the electron beam in this manner, a superconducting transistor having a shape as shown in FIG. 1 can be manufactured. At this time, the oxide superconducting thin film 9
Since the beam diameter is approximately 70 mm at the surface of the beam, a sufficiently weak superconducting coupling state can be formed.

上記のように作製した超伝導トランジスタの動作温度は
85に以下であり、また、第5図のような電圧−電流特
性を示す。電圧−電流特性として、特性a、b、c、d
があるが、これは制御電極3に印加する電圧を変えて得
られるものである。
The superconducting transistor fabricated as described above has an operating temperature of 85° C. or less, and exhibits voltage-current characteristics as shown in FIG. As voltage-current characteristics, characteristics a, b, c, d
However, this can be obtained by changing the voltage applied to the control electrode 3.

なお、スパッタリング法の条件は次のようにした。The conditions for the sputtering method were as follows.

ターゲット : Er−Ba−Cu−0焼結体、スパッ
タガス:Ar:02=1:1、 蒸着速度  :3人/ s e c、 熱処理   : 800 ”Cの02中で1時間。
Target: Er-Ba-Cu-0 sintered body, sputtering gas: Ar:02=1:1, deposition rate: 3 people/sec, heat treatment: 1 hour in 02 at 800''C.

実施例2 超伝導薄膜材料としてY−Ba−Cu−0酸化物を用い
、電子ビーム蒸着法により酸化物超伝導薄膜9を厚さ6
000人程度形成した以外は実施例1と同じ工程で超伝
導トランジスタを作製した。こうして得られた超伝導ト
ランジスタの動作温度は80に以下であった。
Example 2 Using Y-Ba-Cu-0 oxide as a superconducting thin film material, an oxide superconducting thin film 9 was formed to a thickness of 6 by electron beam evaporation.
A superconducting transistor was manufactured using the same steps as in Example 1 except that about 1,000 transistors were formed. The operating temperature of the superconducting transistor thus obtained was below 80°C.

なお、電子ビーム蒸着法の条件は次のとおりである。Note that the conditions for the electron beam evaporation method are as follows.

蒸発材料: Y203 、Cu、BaOを3つの電子ビ
ーム銃を用いて独立に蒸発、 真空度 :2X10−’Torr、 熱処理 :蒸着後850℃の02中で1時間。
Evaporation materials: Y203, Cu, and BaO were evaporated independently using three electron beam guns, degree of vacuum: 2X10-'Torr, heat treatment: 1 hour in 02 at 850°C after evaporation.

実施例3 超伝導薄膜材料としてLa−5r−Cu−0酸化物を用
い、スパッタリング法により酸化物超伝導薄膜9を厚さ
5000人程度形成した以外は実施例1と同じ工程で超
伝導トランジスタを作製した。こうして得られた超伝導
トランジスタの動作温度は20に以下であった。
Example 3 A superconducting transistor was manufactured using the same process as in Example 1, except that La-5r-Cu-0 oxide was used as the superconducting thin film material and an oxide superconducting thin film 9 was formed to a thickness of about 5000 by sputtering. Created. The operating temperature of the superconducting transistor thus obtained was below 20°C.

なお、スパッタリング法の条件は次のとおりである。Note that the conditions for the sputtering method are as follows.

ターゲット ニLa−3r−Cu−0焼結体、スパッタ
ガス:Ar :02 =l : 1、蒸着速度  :3
人/ s e c、 熱処理   7800℃の02中で1時間。
Target Ni La-3r-Cu-0 sintered body, Sputtering gas: Ar: 02 = l: 1, Vapor deposition rate: 3
Human/sec, heat treatment 1 hour in 02 at 7800°C.

(発明の効果) 以上詳細に説明したように、本発明の超伝導トランジス
タおよびその製造法では超伝導電極、制御電極および絶
縁層が半導体基板の同一平面上に形成され、任意の形状
が可能で、比較的単純な工程により作製できる。
(Effects of the Invention) As explained in detail above, in the superconducting transistor and the manufacturing method thereof of the present invention, the superconducting electrode, the control electrode, and the insulating layer are formed on the same plane of the semiconductor substrate, and any shape is possible. , can be manufactured by a relatively simple process.

このように、多数の工程を必要としないため、蒸着層の
絶線、複数回のマスクの位置合わせが不必要であり、歩
留りが向上する。また、平坦な構造であるため、多層構
造にして、縦方向の集積化が可能となり、小型化が達成
できる。
In this way, since a large number of steps are not required, there is no need for disconnection of the vapor deposited layer and multiple mask alignments, and the yield is improved. Furthermore, since it has a flat structure, it is possible to create a multilayer structure and integrate it in the vertical direction, thereby achieving miniaturization.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の超伝導トランジスタの一例を示す模式
上面図、第2図は第1図のA−B断面図、第3図は第1
図の超伝導トランジスタの製造工程を示す断面図、第4
図は本発明の超伝導トランジスタの電圧−電流特性図、
第5図は従来例の超伝導トランジスタを示す断面図、第
6図は他の従来例の超伝導トランジスタを示す断面図で
ある。 1、la、lb  ・・・・・・・・・・半導体基板、
2.2a、2b、2c  ・−−−超伝導電極、3.3
a、3b     ・・・・制御電極、4.4a、4b
、4c  −−−−絶縁層、5 ・・・・・・・・・・
・・・・・・・・不純物拡散層、6 ・・・・・・・・
・・・・・・・・・・チャネル層。 7 ・・・・・・・・・・・・・・・・・・絶縁物、8
 ・・・・・・・・・・・・・・・・・・弱結合体、9
 ・・・・・・・・・・・・・・・・・・酸化物超伝導
薄膜。
FIG. 1 is a schematic top view showing an example of a superconducting transistor of the present invention, FIG. 2 is a sectional view taken along line A-B in FIG. 1, and FIG.
Cross-sectional view showing the manufacturing process of the superconducting transistor shown in Figure 4.
The figure shows a voltage-current characteristic diagram of the superconducting transistor of the present invention.
FIG. 5 is a sectional view showing a conventional superconducting transistor, and FIG. 6 is a sectional view showing another conventional superconducting transistor. 1, la, lb ...... Semiconductor substrate,
2.2a, 2b, 2c ・---Superconducting electrode, 3.3
a, 3b...Control electrode, 4.4a, 4b
, 4c --- Insulating layer, 5 . . .
・・・・・・・・・Impurity diffusion layer, 6 ・・・・・・・・・
・・・・・・・・・Channel layer. 7 ・・・・・・・・・・・・・・・Insulator, 8
・・・・・・・・・・・・・・・Weak bond, 9
・・・・・・・・・・・・・・・ Oxide superconducting thin film.

Claims (1)

【特許請求の範囲】 1)半導体基板と、 前記半導体基板上に接して設けられ、少なくとも2つの
対向する超伝導電極と、 前記半導体基板上に接して設けられ、前記超伝導電極間
を流れる電流を制御する少なくとも1つの制御電極と、 前記半導体基板上に接して、前記超伝導電極、前記制御
電極が設けられていない一面に設けられている絶縁層と
を有する超伝導トランジスタ。 2)前記超伝導電極と前記制御電極が酸化物超伝導薄膜
から成る特許請求の範囲第1項記載の超伝導トランジス
タ。 3)半導体層上に酸化物超伝導薄膜を形成した後、前記
酸化物超伝導薄膜を相変化あるいは組成変化させること
により絶縁層を形成する工程を含むことを特徴とする超
伝導トランジスタの製造方法。
[Claims] 1) A semiconductor substrate, at least two opposing superconducting electrodes provided in contact with the semiconductor substrate, and a current flowing between the superconducting electrodes provided in contact with the semiconductor substrate. a superconducting transistor, comprising: at least one control electrode for controlling the semiconductor substrate; and an insulating layer provided on one surface of the semiconductor substrate in contact with the superconducting electrode and the control electrode. 2) The superconducting transistor according to claim 1, wherein the superconducting electrode and the control electrode are made of an oxide superconducting thin film. 3) A method for manufacturing a superconducting transistor, comprising the step of forming an oxide superconducting thin film on a semiconductor layer, and then forming an insulating layer by changing the phase or composition of the oxide superconducting thin film. .
JP62289624A 1987-11-18 1987-11-18 Superconducting transistor and manufacture thereof Pending JPH01132178A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62289624A JPH01132178A (en) 1987-11-18 1987-11-18 Superconducting transistor and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62289624A JPH01132178A (en) 1987-11-18 1987-11-18 Superconducting transistor and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH01132178A true JPH01132178A (en) 1989-05-24

Family

ID=17745643

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62289624A Pending JPH01132178A (en) 1987-11-18 1987-11-18 Superconducting transistor and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH01132178A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5442195A (en) * 1991-01-11 1995-08-15 Hitachi, Ltd. Superconducting device including plural superconducting electrodes formed on a normal conductor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5442195A (en) * 1991-01-11 1995-08-15 Hitachi, Ltd. Superconducting device including plural superconducting electrodes formed on a normal conductor

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