JPH01122128A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent bump electrodes from damaging or breaking due to a thermal stress at the time of a heat cycle by disposing the electrodes at the central part of a chip in such a manner that gaps of adjacent bump electrodes are substantially equal. CONSTITUTION:A plurality of bump electrodes 2 formed on one side face of a semiconductor chip 1 are so disposed that the intervals of the adjacent bump electrodes 2 are substantially equalized at the central part of the chip 1. That is, the electrodes 2 are disposed at the central part thereby to reduce the interval between the electrodes. Thus, a thermal stress due to the difference of the thermal expansion coefficients of the chip 1 and the substrate is reduced, and the intervals of the electrodes are equalized thereby to prevent local excess load from generating due to irregular distribution of the thermal stresses. Thus, it can prevent a wire bonding section from damaging or breaking due to a heat cycle.

Description

Detailed Description of the Invention [Industrial Field of Application] The present invention provides a method for mounting a semiconductor chip on a support substrate using a wire bonding method by applying a pancibasic film on a circuit element portion formed on a semiconductor chip. The present invention relates to a semiconductor device in which a wiring conductor and a bump electrode are provided through the semiconductor device.

[Conventional technology]

When a wire bonding method is used to mount a semiconductor chip on a support substrate using bump electrodes, bump electrodes are placed on pads (not shown) around the chip l as shown in Figure 2 for the purpose of stable support. It is well known that it is common to form 2. FIG. 3 shows a cross section of the bump part, and for connection of circuit elements formed in the semiconductor chip 1, a wiring conductor 5 is brought into contact with a contact hole 4 in a surface oxide film 3, and the wiring conductor 5 is covered. A pancibasic membrane 6 is provided. A band electrode 8i is placed on the pad 7 formed at the end of the wiring conductor 5 via the base metal film 21.
2 come into contact.

[Problem that the invention seeks to solve]

However, as chips become larger in area, the maximum distance between the bump electrodes 2 becomes larger, and thermal stress during heat cycles caused by the difference in thermal expansion between the semiconductor material and the substrate material such as ceramic increases the reliability of the semiconductor device. It had the disadvantage of reduced performance.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and to provide a semiconductor device which will not be damaged or destroyed by heat or force during one cycle even if there is a difference in coefficient of thermal expansion between the semiconductor material and the substrate material. There is a particular thing.

[Means for solving problems]

In order to achieve the above object, it is assumed that a plurality of bump electrodes are formed on one surface of a semiconductor chip and are arranged at approximately equal intervals to the bump electrodes adjacent to the center of the chip.

[Effect]

Placing the bump electrodes in the center reduces the electrode spacing, which reduces thermal stress due to the difference in thermal expansion coefficients between the chip and the substrate.Also, by making the electrode spacing equal, thermal stress is unevenly distributed, reducing localized thermal stress. There will be no excessive burden on the person.

〔Example〕

FIG. 1 shows an embodiment of the present invention in the case of multilayer wiring, and FIG. 4 shows a cross section of the bump portion of the second embodiment. Components common to those in FIG. 3 are given the same reference numerals. As is clear from FIG. 1, the bump electrodes 2 are provided in the center of the chip 1 at positions occupying the vertices of an equilateral triangle.

The process of forming such a bump electrode will be explained with reference to FIG. First, an insulating oxide film 3 is deposited on the semiconductor chip 1 including circuit elements by CVD or sputtering. Next, a wiring conductor 5, for example, a -5i alloy, is deposited by sputtering, and then the wiring conductor 5 is deposited by a known photoetching method. Formed by processing. The wiring conductor 5 is connected to the circuit element in the chip through the contact hole 41 of the oxide film 3. Next, a second insulating film 8, typically an oxide film, is formed, but a lower layer film is formed using the CVD method. After that, organic silicon, for example, Tokyo Ohka Co., Ltd. part name OCD? After applying the mold and heating it to flatten the surface, an upper layer film is formed again by the CVD method to obtain a flattened second insulating film 8. Another planarization method involves using bias sputtering to flatten the surface during film deposition. Second insulating film 8
For processing the contact hole 42 that is opened in the cup
Next, the second wiring conductor 9 is deposited by sputtering with M or U-St, and processed in the same manner as the first wiring conductor 5.

Both wiring conductors 5.9 are connected through a contact hole 42. As the passivation group 6 covering the second wiring conductor 9, a silicon oxynitride (SiON) film or a silicon nitride (SiN) film is formed by plasma CVD. The opening in the passivation film 6 above the puff door of the second wiring conductor 9 can be processed by dry etching using CF4. Subsequently, for example Cr, Cu is applied onto the opening.

A base metal film 21 is formed in the order of Au, and about 50-
A solder film of No. 1 is vacuum-deposited. In order to form a spherical bump electrode 2 using a solder film, it is sufficient to heat the solder film to about 350°C.

〔Effect of the invention〕

According to the present invention, by gathering a plurality of bump electrodes for semiconductor chip mounting in the center of the chip surface and making the spacing between adjacent electrodes equal, heat generated by the difference in thermal expansion coefficient between the semiconductor material and the mounting board material can be reduced. As the stress becomes smaller and its distribution becomes more uniform, there is no risk of damage or destruction of the wire bonding part due to thermal cycles, contributing to improved reliability. In addition, by gathering the bump electrodes in the center of the chip, extremely large effects can be obtained, such as reducing the chip size by shortening the wiring distance, or enabling high-density packaging by increasing the distance between the bump electrodes between adjacent chips.

[Brief explanation of the drawing]

Fig. 1 is a plan view of a chip according to an embodiment of the present invention, Fig. 2 is a plan view of a conventional chip, Fig. 3 is a sectional view of a conventional bump portion, and Fig. 4 is a plan view of a chip according to an embodiment of the present invention. FIG. 3 is a cross-sectional view of a bump portion. l: semiconductor chip, 2: bump electrode. Figure 1 Figure 3

Claims (1)

[Claims] 1) In a semiconductor chip equipped with a plurality of bump electrodes on one side of the semiconductor chip for mounting onto a support substrate using a wire bonding method, the distance between the bump electrodes and the bump electrodes adjacent to the center of the chip is approximately equal. A semiconductor device characterized in that: