JPH01121975U - - Google Patents

Info

Publication number
JPH01121975U
JPH01121975U JP1716188U JP1716188U JPH01121975U JP H01121975 U JPH01121975 U JP H01121975U JP 1716188 U JP1716188 U JP 1716188U JP 1716188 U JP1716188 U JP 1716188U JP H01121975 U JPH01121975 U JP H01121975U
Authority
JP
Japan
Prior art keywords
wiring layer
multilayer printed
wiring
display
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1716188U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1716188U priority Critical patent/JPH01121975U/ja
Publication of JPH01121975U publication Critical patent/JPH01121975U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図乃至第4図は本考案の多層印刷配線板の
一実施例を示し、第1図は部品面の平面図、第2
図は部品面の内側の配線層の平面図、第3図は半
田面の平面図、第4図は半田面の内側の配線層の
平面図である。 1……絶縁基板、2……部品取付穴、3……ス
ルーホール、4,5,6,7……信号線パターン
、5A,7A……表示線。
1 to 4 show an embodiment of the multilayer printed wiring board of the present invention, FIG. 1 is a plan view of the component side, and FIG.
3 is a plan view of the wiring layer inside the component surface, FIG. 3 is a plan view of the soldering surface, and FIG. 4 is a plan view of the wiring layer inside the soldering surface. 1...Insulating board, 2...Component mounting hole, 3...Through hole, 4, 5, 6, 7...Signal line pattern, 5A, 7A...Display line.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 配線層を多層に構成した多層印刷配線板におい
て、部品面や半田面等の表面配線層より内側の配
線層に形成された信号線パターンの形状を表示す
る表示線を、前記表面配線層に印刷したことを特
徴とする多層印刷配線板。
In a multilayer printed wiring board having multiple wiring layers, display lines are printed on the surface wiring layer to display the shape of a signal line pattern formed on a wiring layer inside the surface wiring layer such as a component surface or a solder surface. A multilayer printed wiring board characterized by:
JP1716188U 1988-02-12 1988-02-12 Pending JPH01121975U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1716188U JPH01121975U (en) 1988-02-12 1988-02-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1716188U JPH01121975U (en) 1988-02-12 1988-02-12

Publications (1)

Publication Number Publication Date
JPH01121975U true JPH01121975U (en) 1989-08-18

Family

ID=31230697

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1716188U Pending JPH01121975U (en) 1988-02-12 1988-02-12

Country Status (1)

Country Link
JP (1) JPH01121975U (en)

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