JPH01120039A - Connection of ic chip - Google Patents
Connection of ic chipInfo
- Publication number
- JPH01120039A JPH01120039A JP62275842A JP27584287A JPH01120039A JP H01120039 A JPH01120039 A JP H01120039A JP 62275842 A JP62275842 A JP 62275842A JP 27584287 A JP27584287 A JP 27584287A JP H01120039 A JPH01120039 A JP H01120039A
- Authority
- JP
- Japan
- Prior art keywords
- photoresist
- chip
- connection electrode
- conductive resin
- connection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims abstract description 48
- 239000000853 adhesive Substances 0.000 claims abstract description 34
- 230000001070 adhesive effect Effects 0.000 claims abstract description 34
- 229920005989 resin Polymers 0.000 claims abstract description 33
- 239000011347 resin Substances 0.000 claims abstract description 33
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 30
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims abstract description 12
- 239000002245 particle Substances 0.000 claims abstract description 8
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims abstract description 6
- 235000019441 ethanol Nutrition 0.000 claims abstract description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract 2
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 claims abstract 2
- 229910052799 carbon Inorganic materials 0.000 claims abstract 2
- SWXVUIWOUIDPGS-UHFFFAOYSA-N diacetone alcohol Natural products CC(=O)CC(C)(C)O SWXVUIWOUIDPGS-UHFFFAOYSA-N 0.000 claims abstract 2
- 239000003822 epoxy resin Substances 0.000 claims abstract 2
- 229920003986 novolac Polymers 0.000 claims abstract 2
- 239000003960 organic solvent Substances 0.000 claims abstract 2
- 229920000647 polyepoxide Polymers 0.000 claims abstract 2
- 229910052709 silver Inorganic materials 0.000 claims abstract 2
- 239000004332 silver Substances 0.000 claims abstract 2
- 229910052782 aluminium Inorganic materials 0.000 claims description 10
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 10
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 239000010931 gold Substances 0.000 claims description 7
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 6
- 229910052737 gold Inorganic materials 0.000 claims description 6
- 229910000679 solder Inorganic materials 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 239000002923 metal particle Substances 0.000 claims description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 2
- 238000004090 dissolution Methods 0.000 claims description 2
- 238000007654 immersion Methods 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 abstract description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 abstract description 2
- 239000000758 substrate Substances 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 208000025174 PANDAS Diseases 0.000 description 2
- 208000021155 Paediatric autoimmune neuropsychiatric disorders associated with streptococcal infection Diseases 0.000 description 2
- 240000004718 Panda Species 0.000 description 2
- 235000016496 Panda oleosa Nutrition 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000007664 blowing Methods 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 238000007781 pre-processing Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
Landscapes
- Laminated Bodies (AREA)
- Moulding By Coating Moulds (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、プリント基板、混成ＩＣ基板等の回路基板に
多数の接続電極を有するＩＣチップを実装接続するＩＣ
チップ接続法に関するものである。Detailed Description of the Invention [Field of Industrial Application] The present invention relates to an IC that mounts and connects an IC chip having a large number of connection electrodes to a circuit board such as a printed circuit board or a hybrid IC board.
It concerns chip connection methods.
ＩＣチップの接続電極を回路基板の電極に接続する場合
、従来よりワイヤポンディング法あるいはフィルムキャ
リア法が主として用いられてきた。When connecting the connection electrodes of an IC chip to the electrodes of a circuit board, the wire bonding method or the film carrier method has conventionally been mainly used.
ワイヤボンディング法は、金あるいはアルミニウムの細
線で電極間を接続する方法であ、９、ＩＣパッケージの
製造に用いられ、実績のある方法である方法である。し
かしながら、各電極間を順次接続してゆくため、端子数
の増大とともに接続の所要時間は比例して増大し、近年
のゲートアレイＬＳＩ＄るいはデイスプレィ駆動用ＬＳ
Ｉのよりな２００ピンを超える領域では問題が目立って
きている。The wire bonding method is a method of connecting electrodes with thin gold or aluminum wires, and is a proven method used in the manufacture of IC packages. However, since each electrode is connected sequentially, the time required for connection increases in proportion to the increase in the number of terminals.
The problem is becoming more noticeable in the region where I is more than 200 pins.
一方、フィルムキャリア法では、予めフィルム上に接続
リードが一括形成されているため、−度の作業で多数ビ
ンの接続が一挙にでき上がシ、上記ワイヤボンディング
法のような問題はガい。しかし、ＩＣチップの接続電極
上に金バングを形成しておく必要があること、リード材
強度の制約から微細化に限界があり、また接続所要面積
も大きいという問題がある。On the other hand, in the film carrier method, since the connection leads are formed on the film in advance, it is not possible to connect a large number of bottles at once in a single operation, and the problems of the wire bonding method mentioned above are avoided. However, there are problems in that there is a limit to miniaturization due to the necessity of forming gold bangs on the connection electrodes of the IC chip, restrictions on the strength of the lead material, and the required area for connection is large.
また、−括接続が可能であり、また接続所要面積も小さ
い方法としてスリップチップ法が知られている。フリッ
プチップ法は、ＩＣチップの接続電極を直接基板側の電
極に接合する方式である。In addition, a slip-chip method is known as a method that allows bulk connection and requires a small connection area. The flip-chip method is a method in which connection electrodes of an IC chip are directly bonded to electrodes on a substrate.
この方法でもフィルムキャリア法と同様にＩＣチップの
接続電極上に予めバンプを形成しておく必要がある。パ
ンダ形成法にも多数の方法が提案されているが、主とし
てハンダバンプおよび金バンプ法が用いられている。バ
ンプをＩＣチップのアルミニウム電極上に形成する場合
、接着性向上吹われ防止等を目的として各種のバリアメ
タル層を挿入しておく必要がある。例えば金バンプ形成
においては、先ずアルミニウム電極上にＴｉ、Ｃｒのよ
うなＡＩに対し接着性の良い金属を蒸着法等圧より堆積
し、つぎにＮｉ 、 Ｃｕ ｈＪＡｕに接着性の良い金
属を堆積する。これらをバタン加工した後、無電解メツ
キでＡｕを薄く堆積し、さらに電解メツキでＡｎを厚く
盛シ上げ、バンプを得る。ハンダバンプの場合も溶融ハ
ンダによる喰われ防止のため、Ｃｕ、Ｎｉ等のバリア層
を形成し、その後メツキ等によシ、バンプを形成する。Similarly to the film carrier method, this method also requires bumps to be formed in advance on the connection electrodes of the IC chip. Although many methods have been proposed for forming pandas, solder bump and gold bump methods are mainly used. When forming bumps on the aluminum electrodes of an IC chip, it is necessary to insert various barrier metal layers for the purpose of improving adhesion and preventing blowing. For example, in forming a gold bump, first a metal with good adhesion to AI, such as Ti or Cr, is deposited on an aluminum electrode using an equal pressure vapor deposition method, and then a metal with good adhesion to Ni or Cu hJAu is deposited. . After slamming these, a thin layer of Au is deposited by electroless plating, and then a thick layer of An is deposited by electrolytic plating to obtain a bump. In the case of solder bumps as well, a barrier layer of Cu, Ni, etc. is formed to prevent eating by molten solder, and then the bumps are formed by plating or the like.
前述のように７リツプチツプ法は、高密度実装には不可
欠な方法である。しかしながら、バンプ形成、特にその
九めの下地処理には幾多の工程を要している。その基本
的要因の１つは、バンプに通常のＬＳＩ形成技術にはそ
ぐわない分厚い金属層が要請され、メツキ等経済的な金
属付着技術を適用せざるを得す、金属間の接着性を先ず
第１に考慮しなければなら表い点にある。他の要因とし
ては、バンプの接続時に比較的高温に曝されるため、金
属間反応の防止を必要としたことが挙げられる。As mentioned above, the 7-lip chip method is an essential method for high-density packaging. However, many steps are required for bump formation, especially the ninth step, surface treatment. One of the fundamental reasons for this is that the bumps require a thick metal layer that is not suitable for normal LSI formation technology, which necessitates the application of economical metal adhesion techniques such as plating, which first requires the adhesion between metals. The first thing to consider is the first point. Another factor is that the bumps are exposed to relatively high temperatures during connection, which necessitates prevention of metal-to-metal reactions.
これらの点から従来のバンプ形成工程は、フリップチッ
プ法の接続コスト低減に対し本質的な障害となっている
。本発明はかかる問題を解決し、工程の少ない安価なバ
ンプ形成技術を提供しようとしたものである。From these points, the conventional bump forming process is an essential obstacle to reducing connection costs using the flip-chip method. The present invention aims to solve this problem and provide an inexpensive bump forming technique with fewer steps.
本発明は、バンプ材料として導電性樹脂接着剤を用い、
比較的低温の硬化、接着を可能とし、パンダ形成に係わ
る前述の下地処理工程を排除している。またバンプ形状
の形成にフォトレジストを用いることを特徴としている
。The present invention uses a conductive resin adhesive as a bump material,
It enables curing and adhesion at a relatively low temperature, and eliminates the above-mentioned base treatment process related to panda formation. Another feature is that a photoresist is used to form the bump shape.
すなわち、ＩＣチップの接続電極以外の領域をフォトレ
ジストで覆い、該接続電極開口部に導電性樹脂接着剤を
擦り込んだ後、該フォトレジストを溶解除去し、しかる
後、該ＩＣチップの接続電極上に形成されたバンプと回
路基板の接続電極を位置整合し、加熱圧着することによ
シ、接続される。That is, areas other than the connection electrodes of the IC chip are covered with photoresist, a conductive resin adhesive is rubbed into the openings of the connection electrodes, the photoresist is dissolved and removed, and then the connection electrodes of the IC chip are covered with a photoresist. The bumps formed on the circuit board and the connection electrodes of the circuit board are aligned and connected by heat and pressure bonding.
導電性樹脂接着剤は、ＩＣチップのダイボンド等に多用
されており、実装技術では有用な材料である。この接着
剤をバタンとして形成する場合、従来、印刷塗布法、特
にスクリーン印刷法が専ら用いられてきた。しかしなが
らこの方法では、位置精度、解像カバタン寸法の再現性
のどれ１つとしてバンプのような細かなバタン形成には
適用できない。したがって、これまでに導電性樹脂接着
剤をバンプ接着の補助として用いた例も報告されている
（飯島二半導体接続技術、第１７回Ｉ ＳＨＭＪＡＰＡ
Ｎ技術講演会）が、約２５０μｍピッチと荒いバタンに
適用されているに過ぎない。Conductive resin adhesives are frequently used for die bonding of IC chips, and are useful materials in mounting technology. When forming this adhesive into a baton, conventionally, printing coating methods, particularly screen printing methods, have been exclusively used. However, this method cannot be applied to forming fine bumps such as bumps due to neither the positional accuracy nor the reproducibility of the resolved cover dimensions. Therefore, there have been reports of cases in which conductive resin adhesives have been used as an aid for bump adhesion (Iijima 2 Semiconductor Connection Technology, 17th ISHMJAPA
N Technology Lecture) has only been applied to rough batons with a pitch of about 250 μm.
本発明では、前工程を経たウェハに先ずバンプの所望の
厚さにほぼ等しい膜厚のフォトレジストを塗布し、接続
電極部分のみを通常の７ォトプロセスで開口する。次に
導電性樹脂接着剤を開口部に擦シ込む。この時フォトレ
ジスト上部に残留する導電性樹脂接着剤はできる限シ除
去しておくことが望ましい。ついで該フォトレジストを
溶解し、導電性樹脂接着剤を接続電極部分にのみ残留さ
せ、バンプとしての作用をもたせる。このようにしてバ
ンプを形成したＩＣチップを回路基板上に通例のフェイ
スダウンボンディング技術により位置整合し、加熱圧着
する。この時、導電性樹脂接着剤は接着、硬化し、接続
が完成される。In the present invention, a photoresist having a thickness approximately equal to the desired thickness of the bumps is first applied to a wafer that has undergone a pre-processing process, and only the connection electrode portions are opened by a normal 7-photo process. Next, rub the conductive resin adhesive into the opening. At this time, it is desirable to remove as much of the conductive resin adhesive remaining on the photoresist as possible. Next, the photoresist is dissolved, and the conductive resin adhesive remains only on the connecting electrode portions to function as bumps. The IC chip with the bumps formed in this manner is aligned on the circuit board by a common face-down bonding technique, and is bonded under heat and pressure. At this time, the conductive resin adhesive adheres and hardens, completing the connection.
以上のように本発明の方法では、導電性樹脂接着剤のバ
タン形成に通常のフォトプロセス技術を用いる丸め、バ
タン寸法、位置精度の点で問題を起こすことはない。ま
た導電性樹脂接着剤であるため、接着力に優れ、また約
１５０℃以下の低温で接着させることができ１．余計な
金属間反応を引き起こすこともない。As described above, the method of the present invention does not cause problems in terms of rounding, batten dimensions, and positional accuracy when ordinary photoprocessing techniques are used to form battens using conductive resin adhesive. In addition, since it is a conductive resin adhesive, it has excellent adhesive strength and can be bonded at a low temperature of about 150°C or less.1. It does not cause unnecessary metal-to-metal reactions.
上記説明から判るとおシ、本方法ではフォトレジストを
溶解するとき、導電性樹脂接着剤が侵食されない条件を
選択することが肝要である。このため、フォトレジスト
材料、導電性樹脂接着剤および重合度、溶媒等を最適化
する必要がある。以下実施例により本発明の方法を詳細
に述べる。As can be seen from the above description, when dissolving the photoresist in this method, it is important to select conditions that will not erode the conductive resin adhesive. Therefore, it is necessary to optimize the photoresist material, conductive resin adhesive, degree of polymerization, solvent, etc. The method of the present invention will be described in detail with reference to Examples below.
第１図〜第４図は本発明によるＩＣチップ接続法の実施
例を説明する工程の要部断面図である。1 to 4 are cross-sectional views of main parts of steps for explaining an embodiment of the IC chip connection method according to the present invention.
（実施例１）
まず、第１図に示すように前工程で例えばＳｔなどのＩ
Ｃ用基板１上に例えばアルミニウムからなる膜厚的１μ
ｍの配線２ａおよび接続電極２ｂを形成し、さらに窒化
シリコンを主体とした膜厚的１μｍのパッシベーション
膜３を形成した後、このＳＮ基板１上にフォトレジスト
４を塗布し、通常のフォトプロセスにより開口部５を形
成した。(Example 1) First, as shown in FIG. 1, in the previous step, for example, I
For example, a film made of aluminum with a thickness of 1μ is formed on the C substrate 1.
After forming the wiring 2a and the connection electrode 2b, and further forming a passivation film 3 mainly made of silicon nitride with a thickness of 1 μm, a photoresist 4 is applied on the SN substrate 1, and a photoresist 4 is applied by a normal photo process. An opening 5 was formed.
この場合、フォトレジスト４は、ポジレジストＡＺ−４
０９３（ヘキスト社製）を用い、レジスト膜厚は約２０
μｍに設定し、開口部５０寸法は約８０μｍ角である。In this case, the photoresist 4 is a positive resist AZ-4.
093 (manufactured by Hoechst), the resist film thickness was approximately 20
The size of the opening 50 is approximately 80 μm square.
次に開口部５内に第２図に示すように導電性樹脂接着剤
６を擦り込んだ。このとき、フォトレジスト４上にも導
電性樹脂接着剤Ｔが僅かに残留したが、後述のように以
降の工程に悪影響はおよぼさなかった。また、導電性樹
脂接着剤６としては、銀粉末入シの１液性加熱硬化型樹
脂３３０１（スリーボンド社１１）を用いた。この系の
樹脂はエポキシ系であゆ、約１５０℃程度の加熱で完全
硬化し、接着力は最大となる。次に約１００℃程度で仮
硬化処理を行ない、フォトレジスト４の溶解除去時の耐
性向上を図り、さらに導電性樹脂接着剤６上にポジレジ
スト１４００−２７（シップレイ社製）を約１βｍ程度
塗布して導電性樹脂接着剤６を保護しつつ、ダイシング
を行ない、個々のＩＣチップに切シ離した。次にこのＩ
Ｃチップをアセトンに浸漬し、フォトレジスト４を溶解
、除去し、第３図に示す構造を得た。このとき、仮硬化
状態の導電性樹脂接着剤６は僅かにアセトンに溶解され
るため、第２図に示した残留導電性樹脂接着剤Ｔは孤立
し、フォトレジスト４の溶解とともに除去されてしまう
。なお、ポジレジストのベーク条件によってはアセトン
の・代りにエチルアルコールを用いても良い。このよう
にして得た第３図の導電性樹脂接着剤６が接着のための
バンプ６′となる。このバンプ６′の高さは約１８±２
μｍで６つ九。次に第４図に示すようにこのバンプ６′
が形成されたＩＣチップを通常のフェイスダウンボンデ
ィング技術によシ、セラミック回路基板８上の接続電極
Ｔに位置合わせを行い、貼り合わせた後、約１５０℃、
３０分の炉中加熱により、最終的に硬化させ、第４図の
構造を得た。なお、貼シ合わせ時の圧力によシ、バンプ
Ｃは変形し、バンプ寸法は約１００μｍ角に広がった。Next, a conductive resin adhesive 6 was rubbed into the opening 5 as shown in FIG. At this time, a small amount of the conductive resin adhesive T remained on the photoresist 4, but as will be described later, it did not adversely affect the subsequent steps. Further, as the conductive resin adhesive 6, one-component heat-curable resin 3301 (manufactured by Three Bond Co., Ltd. 11) containing silver powder was used. This type of resin is an epoxy-based resin, which is completely cured by heating to about 150°C, and its adhesive strength is maximized. Next, a temporary curing process is performed at about 100°C to improve the resistance during dissolution and removal of the photoresist 4, and furthermore, positive resist 1400-27 (manufactured by Shipley) is applied to about 1βm on the conductive resin adhesive 6. While protecting the conductive resin adhesive 6, dicing was performed to cut into individual IC chips. Next this I
The C chip was immersed in acetone, and the photoresist 4 was dissolved and removed to obtain the structure shown in FIG. At this time, the temporarily cured conductive resin adhesive 6 is slightly dissolved in acetone, so the residual conductive resin adhesive T shown in FIG. 2 is isolated and removed as the photoresist 4 is dissolved. . Note that ethyl alcohol may be used instead of acetone depending on the baking conditions of the positive resist. The conductive resin adhesive 6 shown in FIG. 3 thus obtained becomes the bump 6' for adhesion. The height of this bump 6' is approximately 18±2
Six nine in μm. Next, as shown in Fig. 4, this bump 6'
The IC chip formed with the above is aligned with the connection electrode T on the ceramic circuit board 8 using the normal face-down bonding technique, and after bonding, the IC chip is heated at about 150°C.
It was finally cured by heating in a furnace for 30 minutes, and the structure shown in FIG. 4 was obtained. Note that the bump C was deformed due to the pressure during bonding, and the bump size expanded to about 100 μm square.
測定の結果、この接続１箇所あたシの抵抗は約０．５Ω
以下であった。As a result of measurement, the resistance of each connection is approximately 0.5Ω.
It was below.
（実施例２）
実施例１と同様にして、ガラス基板上に形成されたＴＰ
Ｔプレイを用いて第１図の構造を得た後、導電性樹脂接
着剤６を擦シ込んだ。ただし、導電性樹脂接着剤６には
アルミニウムの粒子を練り込んでおいた。アルミニウム
の粒子は最大径がレジスト厚にほぼ等しい約２０μｍの
ものを用い九。仮硬化、保護レジスト塗布後にガラス基
板の上下から紫外線照射を行った。ダイシング後、ポジ
レジスト用現像液ＡＺ−４００Ｋ （シップレイ社製）
に浸漬し、ポジレジストを現像し除去した。導電性樹脂
接着剤６は現像液にはアセトンの場合よシ侵され方がす
くないため、バンプ高さの再現性がよい。得られたｒｃ
チップを前述した実施例１と同様に回路基板に貼り合わ
せ、約Ｉ Ｋｐ ／ｃｔ／ｌの圧力で加圧しながら約１
５０℃、３０分の加熱を行い、接続を完了した。本実施
例の場合、導電性樹脂接着剤中にバンプ厚さにほぼ等し
い粒径のアルミニウム粒子を練り込んであるため、スペ
ーサとして作用し、十分に加圧してもバンプが崩れるこ
とは力かった。アルミニウム等の金属粒子の径は一般に
不揃いであるが、加圧時に潰されて変形し自ずから一定
のギャップとなυ、接続に支障は生じなかった占
なお、本実施例では、スペーサとしてアルミニウム粒子
を用いたが、金、銅もしくは半田等の軟質金属粒子であ
れば、いずれも問題なく機能することが確認できた。ま
た、本発明は、バンブ形成のみで々く、金属ペーストに
よる配線形成にも適用可能であることは自明である。(Example 2) TP formed on a glass substrate in the same manner as in Example 1
After obtaining the structure shown in FIG. 1 using T-play, a conductive resin adhesive 6 was rubbed in. However, aluminum particles were mixed into the conductive resin adhesive 6. The aluminum particles used had a maximum diameter of approximately 20 μm, which was approximately equal to the resist thickness. After temporary curing and coating of the protective resist, the glass substrate was irradiated with ultraviolet light from above and below. After dicing, use positive resist developer AZ-400K (manufactured by Shipley)
The positive resist was developed and removed. Since the conductive resin adhesive 6 is less likely to be eroded by the developer than acetone, the reproducibility of the bump height is good. Obtained rc
The chip was attached to a circuit board in the same manner as in Example 1, and the chip was heated at a pressure of about 1 Kp/ct/l while applying a pressure of about 1 Kp/ct/l.
The connection was completed by heating at 50° C. for 30 minutes. In the case of this example, aluminum particles with a particle size approximately equal to the thickness of the bump are kneaded into the conductive resin adhesive, so they act as a spacer and prevent the bump from collapsing even if sufficient pressure is applied. . Although the diameters of metal particles such as aluminum are generally irregular, they are crushed and deformed when pressurized and naturally form a certain gap υ, so there was no problem with the connection.In this example, aluminum particles were used as spacers. However, it was confirmed that any soft metal particles such as gold, copper, or solder would function without problems. Furthermore, it is obvious that the present invention is applicable not only to bump formation but also to wiring formation using metal paste.
〔発明の効果〕
以上説明したように本発明によれば、バンプの形状をフ
ォトプロセスで作製するため、微細なバンプも形成でき
、ＬＳＩの高密度実装が可能となる。[Effects of the Invention] As explained above, according to the present invention, since the shape of the bump is produced by a photo process, fine bumps can also be formed, and high-density packaging of LSIs becomes possible.
また比較的安価な材料のみを用いておシ、さらにメツキ
等を用いていないため、工程が短縮され、著しく低コス
トでＩＣチップが接続可能となるなどの極めて優れた効
果が得られる。In addition, since only relatively inexpensive materials are used and no plating or the like is used, the process is shortened, and extremely excellent effects such as the ability to connect IC chips at extremely low cost can be obtained.
第１図〜第４図は本発明によるＩＣチップ接続法の実施
例を説明する工程の要部断面図である。
１φ・−・Ｓｌｌガラス等のＩＣ用基板、２ａ・・・・
配線、２ｂ・・・・接続電極、３・・・・パッシベーシ
ョン膜、４１１ｅ１１・フォトレジスト、５・・・・接
続電極開口部、６・・・・導電性樹脂接着剤、６′・・
・・バンプ、７・・・・回路基板側接続電極、８・・・
・回路基板。1 to 4 are cross-sectional views of main parts of steps for explaining an embodiment of the IC chip connection method according to the present invention. 1φ... IC substrate such as Sll glass, 2a...
Wiring, 2b... Connection electrode, 3... Passivation film, 411e11, Photoresist, 5... Connection electrode opening, 6... Conductive resin adhesive, 6'...
...Bump, 7...Circuit board side connection electrode, 8...
・Circuit board.
Claims (4)
トで覆い、該接続電極開口部に導電性樹脂接着剤を擦り
込んだ後、該フォトレジストを溶解除去し、しかる後、
該ＩＣチップの接続電極上に形成されたバンプと回路基
板の接続電極とを位置整合し、加熱圧着することを特徴
としたＩＣチップ接続法。(1) Cover the area other than the connection electrode of the IC chip with photoresist, rub a conductive resin adhesive into the opening of the connection electrode, dissolve and remove the photoresist, and then,
An IC chip connection method characterized in that bumps formed on connection electrodes of the IC chip and connection electrodes of a circuit board are aligned and heat-pressed.
入されたエポキシ樹脂を用い、かつフォトレジスト溶解
除去工程前に６０℃〜１２０℃の温度範囲で仮硬化を行
なうことを特徴とした特許請求の範囲第１項記載のＩＣ
チップ接続法。(2) A patent claim characterized in that an epoxy resin mixed with silver or carbon particles is used as the conductive adhesive, and temporary curing is performed at a temperature range of 60°C to 120°C before the photoresist dissolution and removal step. IC described in item 1 within the scope of
Chip connection method.
系ポジレジストを用い、かつ該フォトレジストの溶解除
去をアセトン、エチルアルコールの有機溶媒への浸漬も
しくは紫外線露光後のアルカリ現像により行なうことを
特徴とした特許請求の範囲第１項記載のＩＣチップ接続
法。(3) A phenol novolak positive resist is used as the photoresist, and the photoresist is dissolved and removed by immersion in an organic solvent such as acetone or ethyl alcohol, or by alkaline development after exposure to ultraviolet light. The IC chip connection method described in Scope 1.
と同程度の最大径を有する金、銅、アルミニウムもしく
は半田の軟質金属からなる金属粒子を混入するととを特
徴とした特許請求の範囲第１項記載のＩＣチップ接続法
。(4) Metal particles made of soft metal such as gold, copper, aluminum, or solder having a maximum diameter comparable to the thickness of the photoresist are mixed into the conductive resin adhesive. The IC chip connection method described in Section 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62275842A JPH01120039A (en) | 1987-11-02 | 1987-11-02 | Connection of ic chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62275842A JPH01120039A (en) | 1987-11-02 | 1987-11-02 | Connection of ic chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01120039A true JPH01120039A (en) | 1989-05-12 |
Family
ID=17561194
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62275842A Pending JPH01120039A (en) | 1987-11-02 | 1987-11-02 | Connection of ic chip |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01120039A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5196371A (en) * | 1989-12-18 | 1993-03-23 | Epoxy Technology, Inc. | Flip chip bonding method using electrically conductive polymer bumps |
| US5611140A (en) * | 1989-12-18 | 1997-03-18 | Epoxy Technology, Inc. | Method of forming electrically conductive polymer interconnects on electrical substrates |
| US6137063A (en) * | 1998-02-27 | 2000-10-24 | Micron Technology, Inc. | Electrical interconnections |
| US6143639A (en) * | 1998-02-12 | 2000-11-07 | Micron Technology, Inc. | Methods of forming electrically conductive interconnections and electrically interconnected substrates |
| EP1503414A2 (en) * | 2003-07-31 | 2005-02-02 | CTS Corporation | Ball grid array package |
| US6920014B2 (en) * | 2001-12-28 | 2005-07-19 | Alps Electronic Co., Ltd. | Magnetic head comprising slider and flexure bonded with conductive resin |
| WO2022236750A1 (en) * | 2021-05-12 | 2022-11-17 | 重庆康佳光电技术研究院有限公司 | Chip temporary component, display panel and manufacturing method therefor |
-
1987
- 1987-11-02 JP JP62275842A patent/JPH01120039A/en active Pending
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5611140A (en) * | 1989-12-18 | 1997-03-18 | Epoxy Technology, Inc. | Method of forming electrically conductive polymer interconnects on electrical substrates |
| US5879761A (en) * | 1989-12-18 | 1999-03-09 | Polymer Flip Chip Corporation | Method for forming electrically conductive polymer interconnects on electrical substrates |
| EP1089331A3 (en) * | 1989-12-18 | 2004-06-23 | PFC Corporation | Flip chip technology using electrically conductive polymers and dieletrics |
| US6138348A (en) * | 1989-12-18 | 2000-10-31 | Polymer Flip Chip Corporation | Method of forming electrically conductive polymer interconnects on electrical substrates |
| US5196371A (en) * | 1989-12-18 | 1993-03-23 | Epoxy Technology, Inc. | Flip chip bonding method using electrically conductive polymer bumps |
| US6509256B2 (en) | 1998-02-12 | 2003-01-21 | Micron Technology, Inc. | Methods of forming electrically conductive interconnections and electrically interconnected substrates |
| US6143639A (en) * | 1998-02-12 | 2000-11-07 | Micron Technology, Inc. | Methods of forming electrically conductive interconnections and electrically interconnected substrates |
| US6355504B1 (en) | 1998-02-27 | 2002-03-12 | Micron Technology, Inc. | Electrical interconnections, methods of conducting electricity, and methods of reducing horizontal conductivity within an anisotropic conductive adhesive |
| US6365842B1 (en) | 1998-02-27 | 2002-04-02 | Micron Technology, Inc. | Electrical circuits, circuits, and electrical couplings |
| US6579744B1 (en) | 1998-02-27 | 2003-06-17 | Micron Technology, Inc. | Electrical interconnections, methods of conducting electricity, and methods of reducing horizontal conductivity within an anisotropic conductive adhesive |
| US6137063A (en) * | 1998-02-27 | 2000-10-24 | Micron Technology, Inc. | Electrical interconnections |
| US6920014B2 (en) * | 2001-12-28 | 2005-07-19 | Alps Electronic Co., Ltd. | Magnetic head comprising slider and flexure bonded with conductive resin |
| EP1503414A2 (en) * | 2003-07-31 | 2005-02-02 | CTS Corporation | Ball grid array package |
| EP1503414A3 (en) * | 2003-07-31 | 2007-05-30 | CTS Corporation | Ball grid array package |
| WO2022236750A1 (en) * | 2021-05-12 | 2022-11-17 | 重庆康佳光电技术研究院有限公司 | Chip temporary component, display panel and manufacturing method therefor |
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