JPH01117348A - Manufacture of semiconductor package - Google Patents

Manufacture of semiconductor package

Info

Publication number
JPH01117348A
JPH01117348A JP62274883A JP27488387A JPH01117348A JP H01117348 A JPH01117348 A JP H01117348A JP 62274883 A JP62274883 A JP 62274883A JP 27488387 A JP27488387 A JP 27488387A JP H01117348 A JPH01117348 A JP H01117348A
Authority
JP
Japan
Prior art keywords
package
glass plate
size
semiconductor
molded package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62274883A
Other languages
Japanese (ja)
Other versions
JP2540345B2 (en
Inventor
Hidehiro Iwase
岩瀬 英裕
Keiichi Habata
幅田 圭一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Chemical Corp
Original Assignee
Toshiba Chemical Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Chemical Corp filed Critical Toshiba Chemical Corp
Priority to JP62274883A priority Critical patent/JP2540345B2/en
Publication of JPH01117348A publication Critical patent/JPH01117348A/en
Application granted granted Critical
Publication of JP2540345B2 publication Critical patent/JP2540345B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To contrive the improvement of the humidity resistance and the reliability of a semiconductor package by a method wherein a glass plate is made to cover in the aperture of a premolded package and at the same time, the peripheral part of the glass plate and the upper end surface of the package are coated with a flexible bonding agent layer and a potting resin is poured and cured. CONSTITUTION:A premolded package 1 consists of a thermoplastic resin case body 4 with a die pad 2 formed for mounting a semiconductor light-receiving element in its interior and metallic lead frames 3 made to protrude from its side surfaces. A potting resin pouring hole 5 and an air vent hole 6 are formed on the side surface of this package 1. Moreover, a covering film 7, for example, is formed in such a way that a bonding agent layer 9 and a releasing paper are laminated on a base film 8, then the 3 layers are all punched in the size of a CCD element, this releasing paper is removed and a glass plate 10 is temporarily bonded. This plate 10 is formed in a size smallish slightly than the aperture of the package 1 and the layer 9 is temporarily bonded on the peripheral part of the plate 10 and at the same time, is formed in such a form and a size that it is adhered on the upper end surface of the package 1.

Description

【発明の詳細な説明】 [発明の目的] 〈産業上の利用分野) 本発明は、半導体パッケージの製造方法、特に受光素子
半導体や電荷結合素子(以下CODと略称する)等の半
導体素子を封止する方法に関する。
Detailed Description of the Invention [Objective of the Invention] (Industrial Field of Application) The present invention relates to a method for manufacturing a semiconductor package, particularly a method for sealing semiconductor elements such as a light-receiving element semiconductor or a charge-coupled device (hereinafter abbreviated as COD). Regarding how to stop.

(従来の技術) 従来から半導体素子を外部から保護するためこれらをプ
ラスチックやセラミックスのパッケージ内に実装し、封
止することが行われている。
(Prior Art) Conventionally, in order to protect semiconductor elements from the outside, semiconductor elements have been mounted in plastic or ceramic packages and sealed.

受光素子半導体やCODでは一般に画状のセラミックパ
ッケージ内にこれらを実装し、パッケージとほぼ同じ大
きさのガラス板をかぶせてエポキシ系接着剤により接着
して封止していた。
Generally, light-receiving device semiconductors and CODs are mounted in an image-shaped ceramic package, covered with a glass plate of approximately the same size as the package, and sealed with an epoxy adhesive.

(発明が解決しようとする問題点) このような封止方法ではエポキシ系接着剤が気密性に乏
しく、パッケージ内が中空であるため耐湿テスト等でパ
ッケージ内に水分が浸入し、ガラス板がくもって失透す
るという問題があった。
(Problems to be solved by the invention) In this type of sealing method, the epoxy adhesive has poor airtightness, and since the inside of the package is hollow, moisture infiltrates into the package during moisture resistance tests, etc., and the glass plate becomes cloudy. There was a problem with devitrification.

そのため、パッケージ内にボッティング樹脂を注入する
ことが考えられるが、ボッティング樹脂の加熱硬化時に
ガラス板が変形したり、ひびが入ったりして気密性を損
なうため実用化されていなかった。
For this reason, it has been considered to inject a botting resin into the package, but this has not been put to practical use because the glass plate deforms or cracks when the botting resin heats and hardens, impairing airtightness.

さらに、いずれもセラミックパッケージを使用するため
、高価になるという欠点もあった。
Furthermore, since both use ceramic packages, they also have the disadvantage of being expensive.

本発明はこのような問題を解決するなめなされたもので
、耐湿性に優れていて信頼性が高く、しかも安価な半導
体パッケージの製造方法を提供することを目的とする。
The present invention has been developed to solve these problems, and an object of the present invention is to provide a method for manufacturing a semiconductor package that is excellent in moisture resistance, highly reliable, and inexpensive.

[発明の構成コ (問題点を解決するための手段) 本発明は、パッケージとしてプラスチックプリモールド
パッケージを使用し、このプリモールドパッケージの開
口部内でガラス板の蓋をするとともにガラス板の周辺部
とパッケージを可撓性のある接着剤層で被覆してボッテ
ィング樹脂を注入し、硬化させるとともにこの接着剤層
を硬化して封止するものである。
[Structure of the Invention (Means for Solving the Problems)] The present invention uses a plastic pre-molded package as a package, and covers a glass plate within the opening of the pre-molded package and connects the peripheral part of the glass plate. The package is covered with a flexible adhesive layer, a botting resin is injected, and the adhesive layer is cured and sealed.

すなわち、本発明は内部に半導体素子を搭載し、側面か
ら前記素子に電気的に接続している金属リードフレーム
を突出させたプラスチックの筐体からなるプリモールド
パッケージにこのパッケージの開口部よりやや小さめの
ガラス板を周辺部において仮接着したカバーレイフィル
ムを、このガラス板が前記プリモールドパッケージの開
口部内にくるように貼着し、この状態でプリモールドパ
ッケージ内に透明なボッティング樹脂を注入し、加熱硬
化させるとともに前記カバーレイフィルムの接着剤層を
硬化させることを特徴としている。
That is, the present invention includes a pre-molded package consisting of a plastic casing with a semiconductor element mounted therein and a metal lead frame protruding from the side surface which is electrically connected to the element. A coverlay film with a glass plate temporarily attached at the periphery is pasted so that the glass plate is within the opening of the pre-molded package, and in this state transparent botting resin is injected into the pre-molded package. The method is characterized in that the adhesive layer of the coverlay film is cured by heating and curing.

本発明に使用するプラスチックプリモールドパッケージ
の材質としてはポリカーボネート、ポリブチレンテレフ
タレート、ポリスルホン、ポリフェニレンサルファイド
等の耐熱性に優れた熱可塑性樹脂が適している。
As the material for the plastic pre-molded package used in the present invention, thermoplastic resins with excellent heat resistance such as polycarbonate, polybutylene terephthalate, polysulfone, and polyphenylene sulfide are suitable.

本発明において金属リードフレームとしてはどのような
材質や形状であってもよいが、特に気゛密性を向上させ
るために金属リードフレームの表面にプライマー処理を
施すことが望ましい。
In the present invention, the metal lead frame may be made of any material or in any shape, but it is particularly desirable to apply a primer treatment to the surface of the metal lead frame in order to improve airtightness.

本発明に使用するカバーレイフィルムはベースフィルム
に可視性のある接着剤層と剥離紙を順に積層したもので
、接着剤層の形状、大きさは予めCOD素子やプリモー
ルドパッケージやガラス板の大きさを考慮にいれたもの
とする。
The coverlay film used in the present invention is a base film laminated with a visible adhesive layer and a release paper in order, and the shape and size of the adhesive layer are determined in advance by the size of the COD device, pre-molded package, or glass plate. shall be taken into account.

ベースフィルムとしてはパッケージに接着剤だけを接着
する場合は接着剤との剥離性の高いオリエンテッドポリ
プロピレン、ポリエチレン、セロファン、ポリフェニレ
ンサルファイド等があり、また、ベースフィルムをその
ままパッケージに接着する場合はポリエステル、ポリイ
ミドなどがある。
When attaching only adhesive to the package, the base film includes oriented polypropylene, polyethylene, cellophane, polyphenylene sulfide, etc., which have high releasability from the adhesive, and when attaching the base film to the package as is, polyester, Examples include polyimide.

接着剤層は耐湿性、耐熱性に優れたエポキシ樹脂やポリ
イミド樹脂等の硬化温度がボッティング樹脂より高いも
のが好ましいが、特に透明性は必要とされない、接着剤
層の厚さは30〜100μmが適しており、作業に適し
たタックを有していればよい。
The adhesive layer is preferably made of epoxy resin or polyimide resin with excellent moisture resistance and heat resistance, and the curing temperature is higher than that of the botting resin, but transparency is not particularly required, and the thickness of the adhesive layer is 30 to 100 μm. It is sufficient if the tack is suitable and has a tack suitable for the work.

本発明に使用するガラス板としてはどのような種類のも
のであってもよく、用途に応じて適宜選択する。その大
きさはプリモールドパッケージの開口部よりやや小さめ
の大きさとする。
The glass plate used in the present invention may be of any type and is appropriately selected depending on the intended use. Its size should be slightly smaller than the opening of the pre-molded package.

また、ボッティングFM詣としてはアクリル樹脂、エポ
キシ樹脂、シリコン樹脂などの透明性の高い熱硬化性樹
脂が適している。
Furthermore, highly transparent thermosetting resins such as acrylic resins, epoxy resins, and silicone resins are suitable for botting FM visits.

本発明においては半導体素子を搭載したプラスチックプ
リモールドパッケージに、予めCOD素子の大きさに打
抜き、剥離紙を取除いてガラス板を仮接着させたカバー
レイフィルムをガラス板がプリモールドパッケージの開
口部内にくるようにして貼りつけて蓋をし、この中にボ
ッティング樹脂を注入してカバーレイフィルムの接着剤
層とともに加熱硬化させて半導体パッケージを製造する
In the present invention, a coverlay film is prepared by punching out the size of the COD device in advance, removing the release paper, and temporarily adhering a glass plate to a plastic pre-molded package on which a semiconductor element is mounted, so that the glass plate is inside the opening of the pre-molded package. A semiconductor package is manufactured by pasting the film so that it is facing upwards and putting a lid on it, and then injecting a botting resin into the resin and heating and curing it together with the adhesive layer of the coverlay film.

(作用) このようにして製造した半導体パッケージにおいては、
カラス板がプリモールドパッケージの開口部内に位置し
ており、このカラス板の周辺部とパッケージを可撓性の
ある接着剤層で被覆しであるので、ポツティング樹脂の
加熱硬化時にガラス板が変形したり、ひびが入ったりす
ることがなくなる。
(Function) In the semiconductor package manufactured in this way,
A glass plate is located inside the opening of the pre-molded package, and the periphery of the glass plate and the package are covered with a flexible adhesive layer, so that the glass plate does not deform when the potting resin heats and hardens. No more scratches or cracks.

(実施例) 次に本発明方法について図面を参照して説明する。(Example) Next, the method of the present invention will be explained with reference to the drawings.

第1図は本発明にしようするプリモールドパッケージの
外観を示し、図においてプリモールドパッケージ1は内
部に受光素子半導体(図示せず)を搭載するためのダイ
パッド2が形成され、側面から金属リードフレーム3を
突出させた熱可塑性樹脂の筐体4からなる。このプリモ
ールドパッケージ1の側面にはボッティング樹脂の注入
口5と空気抜口6が形成されている。
FIG. 1 shows the appearance of a pre-molded package according to the present invention. In the figure, a pre-molded package 1 has a die pad 2 formed therein for mounting a light-receiving element semiconductor (not shown), and a metal lead frame from the side. It consists of a thermoplastic resin housing 4 from which 3 protrudes. A botting resin injection port 5 and an air vent 6 are formed on the side surface of the pre-molded package 1.

第2図は本発明に使用するカバーレイフィルムの一例を
示すもので、カバーレイフィルム7はベースフィルム8
に接着剤層9と剥離紙(図示せず)を積層させ、次にC
OD素子の大きさに三層と5も打抜き、この剥離紙を取
除いてガラス板10を仮接着させたものである。ガラス
板10はプリモールドパッケージ1の開口部よりやや小
さめに形成されており、接着剤層9はカラス板10の周
辺部仮接着させるとともに、プリモールドパッケージ1
の上部端面に貼着するような形状、大きさとなっている
FIG. 2 shows an example of a coverlay film used in the present invention, in which the coverlay film 7 is a base film 8.
The adhesive layer 9 and release paper (not shown) are laminated on the C.
Three layers and 5 were punched out to the size of the OD element, the release paper was removed, and a glass plate 10 was temporarily attached. The glass plate 10 is formed to be slightly smaller than the opening of the pre-molded package 1, and the adhesive layer 9 is temporarily attached to the peripheral portion of the glass plate 10, and the adhesive layer 9 is used to temporarily bond the periphery of the glass plate 10.
The shape and size are such that it can be attached to the upper end surface of the.

第3図は半導体パッケージの製造方法を示す断面説明図
で、図において受光素子半導体11をプリモールドパッ
ケージ1内のダイパッド2に搭載するとともに、金属リ
ードフレーム3にボンディングワイヤ12により接続し
ておく、このプリモールドパッケージ1の開口部に、ガ
ラス板10を仮接着させたカバーレイフィルム7をガラ
ス板10がプリモールドパッケージの開口部内にくるよ
うにして貼着させる。つづいて第4図に示すように、ポ
ツティング樹脂13を注入口5注入し、空気抜口6より
脱気しつつ、カバーレイフィルム7の接着剤R9ととも
に加熱硬化させる。最後にカバーレイフィルム7のベー
スフィルム8を除去して半導体パッケージを製造した。
FIG. 3 is a cross-sectional explanatory diagram showing a method for manufacturing a semiconductor package. In the figure, a light receiving element semiconductor 11 is mounted on a die pad 2 in a pre-molded package 1, and is connected to a metal lead frame 3 by a bonding wire 12. A coverlay film 7 to which a glass plate 10 is temporarily attached is pasted to the opening of the pre-molded package 1 so that the glass plate 10 is located within the opening of the pre-molded package. Subsequently, as shown in FIG. 4, the potting resin 13 is injected into the injection port 5, and heated and cured together with the adhesive R9 of the coverlay film 7 while being degassed through the air vent 6. Finally, the base film 8 of the coverlay film 7 was removed to produce a semiconductor package.

このようにして製造した半導体パッケージは、ガラス板
の変形やひび割れがなく、耐湿性に優れていて信頼性が
高く、また安価であった。
The semiconductor package manufactured in this way had no deformation or cracking of the glass plate, had excellent moisture resistance, was highly reliable, and was inexpensive.

[発明の効果] 以上説明したように本発明によれば、パッケージ内が中
空ではなく樹脂が充填されており、またこの樹脂の加熱
硬化時にガラス板に異常が生じるということがないので
、水分の浸入によりガラス板がくもったり、半導体素子
が損傷を受けたりすることがなくなる。またパッケージ
としてプラスチックプリモールドパッケージを使用する
ので、安価となる。
[Effects of the Invention] As explained above, according to the present invention, the inside of the package is filled with resin instead of being hollow, and since no abnormality occurs on the glass plate when the resin is heated and hardened, moisture can be removed. This prevents the glass plate from becoming cloudy or damaging the semiconductor elements due to infiltration. Furthermore, since a plastic pre-molded package is used as the package, it is inexpensive.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に使用するプリモールドパッケージの一
実施例を示す斜視図、第2図は本発明に使用するガラス
板を仮接着させたカバーレイフィルムのガラス板を上に
した斜視図、第3図はガラス板を仮接着させたカバーレ
イフィルムをプリモールドパッケージに貼着させるとこ
ろを示す断面図、第4図は本発明方法により製造した半
導体パッケージの断面図である。 1・・・・・・・・・プリモールドパッケージ2・・・
・・・・・・ダイパッド 3・・・・・・・・・金属リードフレーム4・・・・・
・・・・ボッティング樹脂の注入口6・・・・・・・・
・空気抜きロ ア・・・・・・・・・カバーレイフィルム8・・・・・
・・・・ベースフィルム 9・・・・・・・・・接着剤層 10・・・・・・・・・カラス板 11・・・・・・・・・受光素子半導体12・・・・・
・・・・ボンディングワイヤ13・・・・・・・・・ボ
ッティング樹脂出願人      東芝ケミカル株式会
社代理人 弁理士  須 山 佐 −
FIG. 1 is a perspective view showing an example of a pre-molded package used in the present invention, FIG. 2 is a perspective view of a coverlay film to which a glass plate used in the present invention is temporarily attached, with the glass plate facing upward; FIG. 3 is a sectional view showing how a coverlay film to which a glass plate is temporarily attached is attached to a pre-molded package, and FIG. 4 is a sectional view of a semiconductor package manufactured by the method of the present invention. 1... Pre-mold package 2...
...Die pad 3...Metal lead frame 4...
... Botting resin injection port 6 ...
・Air vent lower・・・・・・・・・Coverlay film 8・・・・・・
. . . Base film 9 . . . Adhesive layer 10 . . . Glass plate 11 . . . Light receiving element semiconductor 12 .
...Bonding wire 13 ...Botting resin applicant Toshiba Chemical Co., Ltd. agent Patent attorney Satoshi Suyama -

Claims (1)

【特許請求の範囲】[Claims] (1)内部に半導体素子を搭載し、側面から前記素子に
電気的に接続している金属リードフレームを突出させた
プラスチックの筐体からなるプリモールドパッケージに
、このパッケージの開口部よりやや小さめのガラス板を
周辺部において仮接着部したカバーレイフィルムを、こ
のガラス板が前記プリモールドパッケージの開口部内に
くるように貼着し、この状態でプリモールドパッケージ
内に透明なボッティング樹脂を注入し、加熱硬化させる
とともに前記カバーレイフィルムの接着剤層を硬化させ
ることを特徴とする半導体パッケージの製造方法。
(1) A pre-molded package consisting of a plastic casing with a semiconductor element mounted inside and a metal lead frame protruding from the side that is electrically connected to the element, has an opening slightly smaller than the opening of the package. A coverlay film with a glass plate temporarily bonded at its periphery is pasted so that the glass plate is within the opening of the pre-molded package, and in this state transparent botting resin is injected into the pre-molded package. . A method for manufacturing a semiconductor package, comprising heating and curing the adhesive layer of the coverlay film.
JP62274883A 1987-10-30 1987-10-30 Manufacturing method of semiconductor package Expired - Lifetime JP2540345B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62274883A JP2540345B2 (en) 1987-10-30 1987-10-30 Manufacturing method of semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62274883A JP2540345B2 (en) 1987-10-30 1987-10-30 Manufacturing method of semiconductor package

Publications (2)

Publication Number Publication Date
JPH01117348A true JPH01117348A (en) 1989-05-10
JP2540345B2 JP2540345B2 (en) 1996-10-02

Family

ID=17547867

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62274883A Expired - Lifetime JP2540345B2 (en) 1987-10-30 1987-10-30 Manufacturing method of semiconductor package

Country Status (1)

Country Link
JP (1) JP2540345B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6013184A (en) * 1995-09-19 2000-01-11 Asahi Medical Co., Ltd. Device for depletion of leukocytes
KR20030001039A (en) * 2001-06-28 2003-01-06 동부전자 주식회사 Semiconductor encapsulation structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6013184A (en) * 1995-09-19 2000-01-11 Asahi Medical Co., Ltd. Device for depletion of leukocytes
KR20030001039A (en) * 2001-06-28 2003-01-06 동부전자 주식회사 Semiconductor encapsulation structure

Also Published As

Publication number Publication date
JP2540345B2 (en) 1996-10-02

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