JPH01113793U - - Google Patents
Info
- Publication number
- JPH01113793U JPH01113793U JP734888U JP734888U JPH01113793U JP H01113793 U JPH01113793 U JP H01113793U JP 734888 U JP734888 U JP 734888U JP 734888 U JP734888 U JP 734888U JP H01113793 U JPH01113793 U JP H01113793U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- flip
- terminal
- output
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Emergency Alarm Devices (AREA)
Description
第１図は本考案の実施例の回路図、第２図は本
考案の他の実施例の回路図、第３図は第１図の説
明のための波形図、第４図は従来の警報送出回路
の回路図である。
１，１１，１２，…１ｎ……障害検出信号、２
，２１，２２，…２ｎ……ＡＮＤ回路、３，３１
，３２，…３ｎ……フリツプフロツプ回路、４，
４１，４２，…４ｎ……制御信号、５，５１，５
２，…５ｎ……出力信号、６……ＯＲ回路、７…
…出力信号、ＣＬＫ……クロツク端子、Ｄ……デ
ータ入力端子、Ｑ……出力端子、……反転出力
端子、Ｓ……セツト端子。
Fig. 1 is a circuit diagram of an embodiment of the present invention, Fig. 2 is a circuit diagram of another embodiment of the invention, Fig. 3 is a waveform diagram for explaining Fig. 1, and Fig. 4 is a conventional alarm. FIG. 3 is a circuit diagram of a sending circuit. 1, 1 1 , 1 2 ,...1 n ...fault detection signal, 2
,2 1 ,2 2 ,...2 n ...AND circuit, 3,3 1
,3 2 ,...3 n ...flip-flop circuit, 4,
4 1 , 4 2 , ... 4 n ... control signal, 5, 5 1 , 5
2 ,...5 n ...Output signal, 6...OR circuit, 7...
...output signal, CLK...clock terminal, D...data input terminal, Q...output terminal, ...inverting output terminal, S...set terminal.
Claims (1)
リツプフロツプ回路とＡＮＤ回路（論理積回路）
とから成り、障害検出信号を前記フリツプフロツ
プ回路のセツト端子につなぎ、このフリンプフロ
ツプ回路の出力端子を前記ＡＮＤ回路の一方の入
力端子につなぎ、連続した２つのパルス信号によ
つて構成される制御信号を前記フリツプフロツプ
回路のクロツク端子および前記ＡＮＤ回路の他方
の入力端子につなぎ、このＡＮＤ回路の出力から
出力信号を得るように構成された警報送出回路。 Flip-flop circuit and AND circuit (logical product circuit) in which the inverted output terminal is connected to the data input terminal
A fault detection signal is connected to the set terminal of the flip-flop circuit, an output terminal of the flip-flop circuit is connected to one input terminal of the AND circuit, and a control signal consisting of two consecutive pulse signals is generated. An alarm sending circuit connected to a clock terminal of the flip-flop circuit and the other input terminal of the AND circuit, and configured to obtain an output signal from the output of the AND circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP734888U JPH01113793U (en) | 1988-01-22 | 1988-01-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP734888U JPH01113793U (en) | 1988-01-22 | 1988-01-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01113793U true JPH01113793U (en) | 1989-07-31 |
Family
ID=31212284
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP734888U Pending JPH01113793U (en) | 1988-01-22 | 1988-01-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01113793U (en) |
-
1988
- 1988-01-22 JP JP734888U patent/JPH01113793U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH01113793U (en) | ||
| JPH01172199U (en) | ||
| JPS60102690U (en) | Radiation measuring instrument noise prevention circuit | |
| JPH0163224U (en) | ||
| JPH0223725U (en) | ||
| JPH0262832U (en) | ||
| JPS63192747U (en) | ||
| JPS5882039U (en) | phase comparison circuit | |
| JPH0172736U (en) | ||
| JPH0216617U (en) | ||
| JPH0163225U (en) | ||
| JPH02101283U (en) | ||
| JPH01107224U (en) | ||
| JPS63131228U (en) | ||
| JPH021961U (en) | ||
| JPS5988946U (en) | input circuit | |
| JPH02120925U (en) | ||
| JPS60181697U (en) | alarm clock | |
| JPS6347625U (en) | ||
| JPS5957033U (en) | Specified number pulse generation circuit | |
| JPH0268542U (en) | ||
| JPS62158535U (en) | ||
| JPS6237495U (en) | ||
| JPS60100689U (en) | Clock with alarm | |
| JPS5889006U (en) | Transducer array converter circuit |