JPH01113362U - - Google Patents
Info
- Publication number
- JPH01113362U JPH01113362U JP1988008662U JP866288U JPH01113362U JP H01113362 U JPH01113362 U JP H01113362U JP 1988008662 U JP1988008662 U JP 1988008662U JP 866288 U JP866288 U JP 866288U JP H01113362 U JPH01113362 U JP H01113362U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor integrated
- integrated circuit
- chip
- pads
- circuit chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 9
- 238000010586 diagram Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988008662U JPH01113362U (ko) | 1988-01-25 | 1988-01-25 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988008662U JPH01113362U (ko) | 1988-01-25 | 1988-01-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01113362U true JPH01113362U (ko) | 1989-07-31 |
Family
ID=31214738
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1988008662U Pending JPH01113362U (ko) | 1988-01-25 | 1988-01-25 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01113362U (ko) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5598841A (en) * | 1979-01-23 | 1980-07-28 | Nec Corp | Electroconductive structure for semiconductor device |
-
1988
- 1988-01-25 JP JP1988008662U patent/JPH01113362U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5598841A (en) * | 1979-01-23 | 1980-07-28 | Nec Corp | Electroconductive structure for semiconductor device |
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