JPH01100470U - - Google Patents
Info
- Publication number
- JPH01100470U JPH01100470U JP19631687U JP19631687U JPH01100470U JP H01100470 U JPH01100470 U JP H01100470U JP 19631687 U JP19631687 U JP 19631687U JP 19631687 U JP19631687 U JP 19631687U JP H01100470 U JPH01100470 U JP H01100470U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- printed circuit
- multilayer printed
- layers
- wiring layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Description
第１図は本考案の多層プリント基板の各層のパ
ターン方向を示すための斜視図、第２図は従来の
多層プリント基板の各層のパターン方向を示すた
めの斜視図、第３図は多層プリント基板上の一般
的な部品配置を示す平面図、第４図は従来基板の
上側の表面配線層とその対応内層とにおける配線
パターンを示す平面図である。
１１……多層プリント基板、１２ａ，１２ｄ…
…外側信号配線層、１２ｂ，１２ｃ……内側信号
配線層、１３ａ，１３ｂ……電源配線層、１４…
…パターン。
Figure 1 is a perspective view showing the pattern direction of each layer of the multilayer printed circuit board of the present invention, Figure 2 is a perspective view showing the pattern direction of each layer of the conventional multilayer printed circuit board, and Figure 3 is the multilayer printed circuit board. FIG. 4 is a plan view showing the above general component arrangement, and FIG. 4 is a plan view showing the wiring pattern in the upper surface wiring layer and its corresponding inner layer of the conventional board. 11...Multilayer printed circuit board, 12a, 12d...
...Outer signal wiring layer, 12b, 12c...Inner signal wiring layer, 13a, 13b...Power wiring layer, 14...
…pattern.
Claims (1)
る外側の２つの配線層のパターンを同一方向に、
かつこの多層プリント基板に搭載する主要部品の
ピン配列方向と直交する方向に走らせるとともに
、前記２つの配線層に各々対応する内部配線層の
パターンを前記主要部品のピン配列方向と平行に
走らせたことを特徴とする多層プリント基板。 The patterns of the two outer wiring layers exposed to the outside of a multilayer printed circuit board with four or more layers are aligned in the same direction.
In addition, the pattern of the internal wiring layer corresponding to each of the two wiring layers was run parallel to the direction of the pin arrangement of the main components. A multilayer printed circuit board characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19631687U JPH01100470U (en) | 1987-12-24 | 1987-12-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19631687U JPH01100470U (en) | 1987-12-24 | 1987-12-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01100470U true JPH01100470U (en) | 1989-07-05 |
Family
ID=31486940
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19631687U Pending JPH01100470U (en) | 1987-12-24 | 1987-12-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01100470U (en) |
-
1987
- 1987-12-24 JP JP19631687U patent/JPH01100470U/ja active Pending