JP7666617B2 - 量子ビット、量子演算装置及び量子ビットの製造方法 - Google Patents

量子ビット、量子演算装置及び量子ビットの製造方法 Download PDF

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JP7666617B2
JP7666617B2 JP2023549195A JP2023549195A JP7666617B2 JP 7666617 B2 JP7666617 B2 JP 7666617B2 JP 2023549195 A JP2023549195 A JP 2023549195A JP 2023549195 A JP2023549195 A JP 2023549195A JP 7666617 B2 JP7666617 B2 JP 7666617B2
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淳一 山口
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Fujitsu Ltd
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JPWO2023181247A1 (https=) * 2022-03-24 2023-09-28

Citations (2)

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JP2020511780A (ja) 2017-03-20 2020-04-16 フォルシュングスツェントルム・ユーリッヒ・ゲゼルシャフト・ミット・ベシュレンクテル・ハフツング マヨラナ材料と超伝導体のハイブリッド網構造のインサイチュによる製造方法及びその方法により製造されたハイブリッド構造
JP2020096107A (ja) 2018-12-13 2020-06-18 株式会社日立製作所 量子ビット及びその制御方法

Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
JP2020511780A (ja) 2017-03-20 2020-04-16 フォルシュングスツェントルム・ユーリッヒ・ゲゼルシャフト・ミット・ベシュレンクテル・ハフツング マヨラナ材料と超伝導体のハイブリッド網構造のインサイチュによる製造方法及びその方法により製造されたハイブリッド構造
JP2020096107A (ja) 2018-12-13 2020-06-18 株式会社日立製作所 量子ビット及びその制御方法

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
FEI et.al.，Edge conduction in monolayer WTe2，Nature Physics，英国，Nature Publishing Group，2017年04月10日，Volume 13，pp.677-682，doi:10.1038/s41567-020-0816＼x
HSU et.al.，Majorana Kramers Pairs in Higher-Order Topological Insulators，PHYSICAL REVIEW LETTERS，米国，American Physical Society，2018年11月06日，Volume 121，196801-1～196801-8，DOI:10.1103/PhysRevLett.121.196801

Cited By (1)

* Cited by examiner, † Cited by third party
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JPWO2023181247A1 (https=) * 2022-03-24 2023-09-28

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