JP7617954B2 - 半導体装置とその製造方法、および半導体パッケージ - Google Patents
半導体装置とその製造方法、および半導体パッケージ Download PDFInfo
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Description
図1は、本実施の形態の半導体装置1の概略構成を示す模式図である。半導体装置1は、ベース板2の上に絶縁部材3を介して半導体パッケージ4が固定され、半導体パッケージ4の導電部材5の先端部5aと制御基板7の制御電極7bとを可撓性配線8で接続した構成である。半導体パッケージ4および制御基板7の詳細については後述するが、ここでは半導体パッケージ4に形成した突出部6aは、制御基板7の貫通孔7aに挿入された状態となっている。
実施の形態1では、半導体パッケージ4の突出部6aの形状は直方体である例を示したが、本実施の形態では、突出部6aは階段状の形状である例について説明する。これ以外の構成は実施の形態1と同様である。
Claims (14)
- 半導体素子と、
前記半導体素子と電気的に接続され、上方に向かって伸びる、複数の導電部材と、
前記半導体素子と前記導電部材とを封止するとともに、前記複数の導電部材の先端部の周囲を覆う突出部を形成する封止樹脂と、
前記突出部が挿入される貫通孔が形成され、制御電極を有する制御基板と、
前記制御電極と前記導電部材の前記先端部とを接続し、可撓性を有する可撓性配線と
を備える半導体装置。 - 前記突出部の下端から前記突出部の上端までの長さである前記突出部の高さは、前記制御基板の厚み以上であり、前記突出部の上端が前記制御基板の上面よりも上方にあることを特徴とする、請求項1に記載の半導体装置。
- 前記突出部は、前記制御基板の下面を支持する支持部を有する下段と、前記貫通孔に挿入する挿入部を有する上段とを備え、前記挿入部の高さは、前記制御基板の厚み以上であり、前記挿入部の上端が前記制御基板の上面よりも上方にあることを特徴とする、請求項1に記載の半導体装置。
- 前記封止樹脂の前記突出部以外の上面は平坦であることを特徴とする、請求項1から請求項3のいずれか一項に記載の半導体装置。
- 前記可撓性配線と前記先端部との接続点である第一接続点および前記可撓性配線と前記制御電極との接続点である第二接続点の間の長さである接続点間距離と、前記第一接続点から前記第二接続点までの前記可撓性配線の長さと、前記突出部の側部と前記貫通孔の開口端との幅である許容幅との関係において、前記可撓性配線の長さは前記接続点間距離と前記許容幅との和よりも長いことを特徴とする、請求項1から請求項4のいずれか一項に記載の半導体装置。
- さらに、前記先端部、前記制御電極および前記可撓性配線を覆い、
これらの間を電気的に絶縁する接合保護部材が前記制御基板上に形成されていることを特徴とする、請求項1から請求項5のいずれか一項に記載の半導体装置。 - 前記封止樹脂の前記突出部以外の上面に、前記導電部材を含まない前記封止樹脂からなる第二突出部が備えられ、前記第二突出部に対応して設けられた前記制御基板の第二貫通孔に前記第二突出部が挿入された構造を有することを特徴とする、請求項1から請求項6のいずれか一項に記載の半導体装置。
- 複数の導電部材の先端部の周囲を覆う突出部を形成する封止樹脂を有した半導体パッケージを、ベース板に固定する半導体パッケージ固定工程と、
前記突出部を制御基板に設けた貫通孔に挿入する突出部挿入工程と、
前記先端部と前記制御基板に設けた制御電極とを、ワイヤボンディングにより可撓性配線で接続する可撓性配線接続工程と
を備える半導体装置の製造方法。 - さらに、前記制御基板の上に、前記先端部、前記制御電極および前記可撓性配線を覆い、これらの間を電気的に絶縁する接合保護部材を形成する接合保護部材形成工程を備えることを特徴とする、請求項8に記載の半導体装置の製造方法。
- 半導体素子と、
前記半導体素子と電気的に接続され、上方に向かって伸びる、複数の導電部材と、
前記半導体素子と前記導電部材とを封止するとともに、前記複数の導電部材の先端部の周囲の一周分を覆う突出部とを形成する封止樹脂と
を備える半導体パッケージ。 - 前記突出部は、支持部を有する下段と、前記下段の上に挿入部を有する上段とで構成され、前記下段の径は前記上段の径よりも大きいことを特徴とする、請求項10に記載の半導体パッケージ。
- 前記封止樹脂の前記突出部以外の上面は平坦であることを特徴とする、請求項10または請求項11に記載の半導体パッケージ。
- さらに、前記封止樹脂の前記突出部以外の上面に、前記導電部材を含まない前記封止樹脂からなる第二突出部が備えられたことを特徴とする、請求項10から請求項12のいずれか一項に記載の半導体パッケージ。
- 前記突出部は、前記複数の導電部材の先端部の上部の周囲を覆わない、請求項10から請求項13のいずれか一項に記載の半導体パッケージ。
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| JP2017059757A (ja) | 2015-09-18 | 2017-03-23 | 日本電気株式会社 | 半導体装置および半導体装置の製造方法 |
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| JP5525024B2 (ja) | 2012-10-29 | 2014-06-18 | 株式会社オクテック | 半導体装置及び半導体装置の製造方法 |
| JP5930070B2 (ja) | 2012-12-28 | 2016-06-08 | 富士電機株式会社 | 半導体装置 |
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| JP2006210941A (ja) | 2006-03-27 | 2006-08-10 | Renesas Technology Corp | 半導体装置 |
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