JP7609154B2 - 高周波デバイス用基板およびその製造方法 - Google Patents

高周波デバイス用基板およびその製造方法 Download PDF

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JP7609154B2
JP7609154B2 JP2022181395A JP2022181395A JP7609154B2 JP 7609154 B2 JP7609154 B2 JP 7609154B2 JP 2022181395 A JP2022181395 A JP 2022181395A JP 2022181395 A JP2022181395 A JP 2022181395A JP 7609154 B2 JP7609154 B2 JP 7609154B2
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Prior art keywords
substrate
layer
high frequency
soi
frequency device
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Japanese (ja)
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JP2024070722A5 (enExample
JP2024070722A (ja
Inventor
和徳 萩本
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Shin-Etsu Handotai Co Ltd
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Shin-Etsu Handotai Co Ltd
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Priority to JP2022181395A priority Critical patent/JP7609154B2/ja
Application filed by Shin-Etsu Handotai Co Ltd filed Critical Shin-Etsu Handotai Co Ltd
Priority to EP23888372.2A priority patent/EP4618154A1/en
Priority to PCT/JP2023/034915 priority patent/WO2024101019A1/ja
Priority to CN202380076157.XA priority patent/CN120092503A/zh
Priority to KR1020257014890A priority patent/KR20250109681A/ko
Priority to TW112137324A priority patent/TW202441040A/zh
Publication of JP2024070722A publication Critical patent/JP2024070722A/ja
Publication of JP2024070722A5 publication Critical patent/JP2024070722A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3214—Materials thereof being Group IIIA-VA semiconductors
    • H10P14/3216—Nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3244—Layer structure
    • H10P14/3251—Layer structure consisting of three or more layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
    • H10P14/3416—Nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3438—Doping during depositing
    • H10P14/3441—Conductivity type
    • H10P14/3442—N-type

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  • Recrystallisation Techniques (AREA)
JP2022181395A 2022-11-11 2022-11-11 高周波デバイス用基板およびその製造方法 Active JP7609154B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2022181395A JP7609154B2 (ja) 2022-11-11 2022-11-11 高周波デバイス用基板およびその製造方法
PCT/JP2023/034915 WO2024101019A1 (ja) 2022-11-11 2023-09-26 高周波デバイス用基板およびその製造方法
CN202380076157.XA CN120092503A (zh) 2022-11-11 2023-09-26 高频装置用基板及其制造方法
KR1020257014890A KR20250109681A (ko) 2022-11-11 2023-09-26 고주파 디바이스용 기판 및 그의 제조 방법
EP23888372.2A EP4618154A1 (en) 2022-11-11 2023-09-26 Substrate for high frequency devices and method for producing same
TW112137324A TW202441040A (zh) 2022-11-11 2023-09-28 高頻元件用基板及其製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2022181395A JP7609154B2 (ja) 2022-11-11 2022-11-11 高周波デバイス用基板およびその製造方法

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JP2024070722A JP2024070722A (ja) 2024-05-23
JP2024070722A5 JP2024070722A5 (enExample) 2024-06-06
JP7609154B2 true JP7609154B2 (ja) 2025-01-07

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EP (1) EP4618154A1 (enExample)
JP (1) JP7609154B2 (enExample)
KR (1) KR20250109681A (enExample)
CN (1) CN120092503A (enExample)
TW (1) TW202441040A (enExample)
WO (1) WO2024101019A1 (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN121240531B (zh) * 2025-12-01 2026-04-28 上海超硅半导体股份有限公司 绝缘体上半导体的制备方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017510055A (ja) 2013-12-13 2017-04-06 レイセオン カンパニー 薄いシリコンオン絶縁体（ｓｏｉ）ウェハー上にマイクロストリップ伝送ラインを形成するための方法及び構造体
JP2019517454A (ja) 2016-06-08 2019-06-24 グローバルウェーハズ カンパニー リミテッドＧｌｏｂａｌＷａｆｅｒｓ Ｃｏ．，Ｌｔｄ． 改善された機械的強度を有する高抵抗率単結晶シリコンインゴット及びウェハ
JP2019523994A (ja) 2016-06-14 2019-08-29 クロミス，インコーポレイテッド 電力およびｒｆ用途用の設計された基板構造
JP2021531645A (ja) 2018-07-13 2021-11-18 グローバルウェーハズ カンパニー リミテッドGlobalWafers Co., Ltd. 優れた性能、安定性および製造性を有する無線周波数シリコン・オン・インシュレータ・ウエハ・プラットフォーム
JP7142184B2 (ja) 2020-08-18 2022-09-26 信越半導体株式会社 窒化物半導体ウェーハの製造方法及び窒化物半導体ウェーハ

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015112308A1 (en) 2014-01-23 2015-07-30 Sunedison Semiconductor Limited High resistivity soi wafers and a method of manufacturing thereof
FR3062517B1 (fr) 2017-02-02 2019-03-15 Soitec Structure pour application radiofrequence

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017510055A (ja) 2013-12-13 2017-04-06 レイセオン カンパニー 薄いシリコンオン絶縁体（ｓｏｉ）ウェハー上にマイクロストリップ伝送ラインを形成するための方法及び構造体
JP2019517454A (ja) 2016-06-08 2019-06-24 グローバルウェーハズ カンパニー リミテッドＧｌｏｂａｌＷａｆｅｒｓ Ｃｏ．，Ｌｔｄ． 改善された機械的強度を有する高抵抗率単結晶シリコンインゴット及びウェハ
JP2019523994A (ja) 2016-06-14 2019-08-29 クロミス，インコーポレイテッド 電力およびｒｆ用途用の設計された基板構造
JP2021531645A (ja) 2018-07-13 2021-11-18 グローバルウェーハズ カンパニー リミテッドGlobalWafers Co., Ltd. 優れた性能、安定性および製造性を有する無線周波数シリコン・オン・インシュレータ・ウエハ・プラットフォーム
JP7142184B2 (ja) 2020-08-18 2022-09-26 信越半導体株式会社 窒化物半導体ウェーハの製造方法及び窒化物半導体ウェーハ

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WO2024101019A1 (ja) 2024-05-16
TW202441040A (zh) 2024-10-16
CN120092503A (zh) 2025-06-03
KR20250109681A (ko) 2025-07-17
JP2024070722A (ja) 2024-05-23
EP4618154A1 (en) 2025-09-17

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