JP7426874B2 - 基板処理装置、および、基板処理方法 - Google Patents

基板処理装置、および、基板処理方法 Download PDF

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Publication number
JP7426874B2
JP7426874B2 JP2020057540A JP2020057540A JP7426874B2 JP 7426874 B2 JP7426874 B2 JP 7426874B2 JP 2020057540 A JP2020057540 A JP 2020057540A JP 2020057540 A JP2020057540 A JP 2020057540A JP 7426874 B2 JP7426874 B2 JP 7426874B2
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Japan
Prior art keywords
substrate
outer edge
image data
section
substrate processing
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JP2020057540A
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English (en)
Japanese (ja)
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JP2021156741A (ja
Inventor
央章 角間
達哉 増井
裕一 出羽
英司 猶原
有史 沖田
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Screen Holdings Co Ltd
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Screen Holdings Co Ltd
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Priority to JP2020057540A priority Critical patent/JP7426874B2/ja
Priority to PCT/JP2021/005798 priority patent/WO2021192738A1/ja
Priority to TW110107805A priority patent/TWI813960B/zh
Publication of JP2021156741A publication Critical patent/JP2021156741A/ja
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B11/00—Measuring arrangements characterised by the use of optical techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Length Measuring Devices By Optical Means (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
JP2020057540A 2020-03-27 2020-03-27 基板処理装置、および、基板処理方法 Active JP7426874B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2020057540A JP7426874B2 (ja) 2020-03-27 2020-03-27 基板処理装置、および、基板処理方法
PCT/JP2021/005798 WO2021192738A1 (ja) 2020-03-27 2021-02-17 基板処理装置、および、基板処理方法
TW110107805A TWI813960B (zh) 2020-03-27 2021-03-05 基板處理裝置及基板處理方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2020057540A JP7426874B2 (ja) 2020-03-27 2020-03-27 基板処理装置、および、基板処理方法

Publications (2)

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JP2021156741A JP2021156741A (ja) 2021-10-07
JP7426874B2 true JP7426874B2 (ja) 2024-02-02

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JP2020057540A Active JP7426874B2 (ja) 2020-03-27 2020-03-27 基板処理装置、および、基板処理方法

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JP (1) JP7426874B2 (zh)
TW (1) TWI813960B (zh)
WO (1) WO2021192738A1 (zh)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013110270A (ja) 2011-11-21 2013-06-06 Tokyo Electron Ltd 基板処理装置及び基板処理方法並びに基板処理プログラムを記憶したコンピュータ読み取り可能な記憶媒体
JP2015096830A (ja) 2013-11-15 2015-05-21 株式会社Ｓｃｒｅｅｎホールディングス 基板処理装置および基板処理方法
JP2015152475A (ja) 2014-02-17 2015-08-24 株式会社Ｓｃｒｅｅｎホールディングス 変位検出装置、基板処理装置、変位検出方法および基板処理方法
JP2019148499A (ja) 2018-02-27 2019-09-05 株式会社Ｓｃｒｅｅｎホールディングス 芯ズレ検出装置および芯ズレ検出方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3430768B2 (ja) * 1996-01-17 2003-07-28 三菱電機株式会社 芯ずれ調整装置及び調整方法
JP3795820B2 (ja) * 2002-03-27 2006-07-12 株式会社東芝 基板のアライメント装置
US7547181B2 (en) * 2004-11-15 2009-06-16 Dainippon Screen Mfg. Co., Ltd. Substrate position correcting method and apparatus using either substrate radius or center of rotation correction adjustment sum
DE102009016288B4 (de) * 2009-01-02 2013-11-21 Singulus Technologies Ag Verfahren und Vorrichtung für die Ausrichtung von Substraten
WO2015115239A1 (ja) * 2014-01-28 2015-08-06 株式会社Ｓｃｒｅｅｎホールディングス 基板処理装置
US9704762B2 (en) * 2014-02-04 2017-07-11 Applied Materials, Inc. Application of in-line glass edge-inspection and alignment check in display manufacturing
JP6914143B2 (ja) * 2016-12-26 2021-08-04 東京エレクトロン株式会社 基板処理方法、基板処理装置、基板処理システム、基板処理システムの制御装置および半導体基板の製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013110270A (ja) 2011-11-21 2013-06-06 Tokyo Electron Ltd 基板処理装置及び基板処理方法並びに基板処理プログラムを記憶したコンピュータ読み取り可能な記憶媒体
JP2015096830A (ja) 2013-11-15 2015-05-21 株式会社Ｓｃｒｅｅｎホールディングス 基板処理装置および基板処理方法
JP2015152475A (ja) 2014-02-17 2015-08-24 株式会社Ｓｃｒｅｅｎホールディングス 変位検出装置、基板処理装置、変位検出方法および基板処理方法
JP2019148499A (ja) 2018-02-27 2019-09-05 株式会社Ｓｃｒｅｅｎホールディングス 芯ズレ検出装置および芯ズレ検出方法

Also Published As

Publication number Publication date
JP2021156741A (ja) 2021-10-07
TW202141672A (zh) 2021-11-01
TWI813960B (zh) 2023-09-01
WO2021192738A1 (ja) 2021-09-30

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