JP7337563B2 - 半導体装置、及び電子機器 - Google Patents

半導体装置、及び電子機器 Download PDF

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JP7337563B2
JP7337563B2 JP2019118472A JP2019118472A JP7337563B2 JP 7337563 B2 JP7337563 B2 JP 7337563B2 JP 2019118472 A JP2019118472 A JP 2019118472A JP 2019118472 A JP2019118472 A JP 2019118472A JP 7337563 B2 JP7337563 B2 JP 7337563B2
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circuit
terminal
transistor
input
output
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JP2020009432A5 (enExample
JP2020009432A (ja
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肇 木村
義元 黒川
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/048—Activation functions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/0499—Feedforward networks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/54—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/002—Switching arrangements with several input- or output terminals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D87/00—Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/80—Array wherein the substrate, the cell, the conductors and the access device are all made up of organic materials
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K2017/6878—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors using multi-gate field-effect transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/08—Manufacture or treatment characterised by using material-based technologies using combinations of technologies, e.g. using both Si and SiC technologies or using both Si and Group III-V technologies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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JP2019118472A 2018-06-29 2019-06-26 半導体装置、及び電子機器 Active JP7337563B2 (ja)

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Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11515873B2 (en) * 2018-06-29 2022-11-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and electronic device
US10924090B2 (en) * 2018-07-20 2021-02-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device comprising holding units
JP7441175B2 (ja) * 2018-11-08 2024-02-29 株式会社半導体エネルギー研究所 半導体装置、及び電子機器
CN113826103A (zh) * 2019-05-17 2021-12-21 株式会社半导体能源研究所 半导体装置及电子设备
WO2021038343A1 (ja) * 2019-08-23 2021-03-04 株式会社半導体エネルギー研究所 撮像装置、距離推定装置及び移動体
US12205019B2 (en) * 2019-11-19 2025-01-21 Alibaba Group Holding Limited Data layout conscious processing in memory architecture for executing neural network model
US20220261559A1 (en) * 2020-02-27 2022-08-18 Tdk Corporation Arithmetic circuit and neuromorphic device
US11218137B2 (en) * 2020-04-14 2022-01-04 Globalfoundries U.S. Inc. Low clock load dynamic dual output latch circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070022070A1 (en) 2005-03-15 2007-01-25 Wells Richard B Forgetful logic for artificial neural networks
JP2015195011A (ja) 2014-03-18 2015-11-05 パナソニックＩｐマネジメント株式会社 ニューラルネットワーク回路およびその学習方法
JP2017228295A (ja) 2016-06-20 2017-12-28 東芝メモリ株式会社 演算装置

Family Cites Families (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7592841B2 (en) 2006-05-11 2009-09-22 Dsm Solutions, Inc. Circuit configurations having four terminal JFET devices
WO2011070901A1 (en) 2009-12-11 2011-06-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
US8878589B2 (en) 2011-06-30 2014-11-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and driving method thereof
US8710505B2 (en) 2011-08-05 2014-04-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US8988152B2 (en) 2012-02-29 2015-03-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US8866510B2 (en) 2012-05-02 2014-10-21 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP5885719B2 (ja) 2013-09-09 2016-03-15 株式会社東芝 識別装置および演算装置
US9461126B2 (en) 2013-09-13 2016-10-04 Semiconductor Energy Laboratory Co., Ltd. Transistor, clocked inverter circuit, sequential circuit, and semiconductor device including sequential circuit
US8803591B1 (en) 2013-11-06 2014-08-12 Freescale Semiconductor, Inc. MOS transistor with forward bulk-biasing circuit
US9397637B2 (en) 2014-03-06 2016-07-19 Semiconductor Energy Laboratory Co., Ltd. Voltage controlled oscillator, semiconductor device, and electronic device
KR102352633B1 (ko) 2014-07-25 2022-01-17 가부시키가이샤 한도오따이 에네루기 켄큐쇼 발진 회로 및 그것을 포함하는 반도체 장치
JP6674838B2 (ja) 2015-05-21 2020-04-01 株式会社半導体エネルギー研究所 電子装置
US9666606B2 (en) 2015-08-21 2017-05-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and electronic device
SG10201607278TA (en) 2015-09-18 2017-04-27 Semiconductor Energy Lab Co Ltd Semiconductor device and electronic device
KR20180063084A (ko) 2015-09-30 2018-06-11 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 전자 기기
US10038402B2 (en) 2015-10-30 2018-07-31 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and electronic device
JP2017108397A (ja) 2015-11-30 2017-06-15 株式会社半導体エネルギー研究所 信号処理回路、及び該信号処理回路を有する半導体装置
JP6906978B2 (ja) 2016-02-25 2021-07-21 株式会社半導体エネルギー研究所 半導体装置、半導体ウェハ、および電子機器
TWI730091B (zh) 2016-05-13 2021-06-11 日商半導體能源研究所股份有限公司 半導體裝置
US10504204B2 (en) 2016-07-13 2019-12-10 Semiconductor Energy Laboratory Co., Ltd. Electronic device
US10410571B2 (en) 2016-08-03 2019-09-10 Semiconductor Energy Laboratory Co., Ltd. Display device and electronic device
DE112017003898B4 (de) 2016-08-03 2024-07-18 Semiconductor Energy Laboratory Co., Ltd. Abbildungsvorrichtungen und Bildsensor
CN109643514B (zh) 2016-08-26 2023-04-04 株式会社半导体能源研究所 显示装置及电子设备
US10319743B2 (en) 2016-12-16 2019-06-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, display system, and electronic device
JP7073090B2 (ja) 2016-12-28 2022-05-23 株式会社半導体エネルギー研究所 ニューラルネットワークを利用したデータ処理装置、電子部品、および電子機器
WO2018138603A1 (en) 2017-01-26 2018-08-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and electronic device including the semiconductor device
TW201837894A (zh) 2017-02-15 2018-10-16 日商半導體能源研究所股份有限公司 半導體裝置及顯示系統
TW201836020A (zh) 2017-02-17 2018-10-01 日商半導體能源研究所股份有限公司 半導體裝置及半導體裝置的製造方法
CN110832573B (zh) 2017-04-27 2023-07-18 株式会社半导体能源研究所 显示单元、显示装置及电子设备
KR20250078575A (ko) 2017-08-04 2025-06-02 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 제작 방법
US11182670B2 (en) 2017-11-16 2021-11-23 International Business Machines Corporation Thin-film large-area classifier
US12118333B2 (en) * 2018-04-26 2024-10-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
WO2019239246A1 (ja) 2018-06-15 2019-12-19 株式会社半導体エネルギー研究所 半導体装置、及び電子機器
US11515873B2 (en) * 2018-06-29 2022-11-29 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and electronic device
US10924090B2 (en) 2018-07-20 2021-02-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device comprising holding units

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070022070A1 (en) 2005-03-15 2007-01-25 Wells Richard B Forgetful logic for artificial neural networks
JP2015195011A (ja) 2014-03-18 2015-11-05 パナソニックＩｐマネジメント株式会社 ニューラルネットワーク回路およびその学習方法
JP2017228295A (ja) 2016-06-20 2017-12-28 東芝メモリ株式会社 演算装置

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