JP7233332B2 - Chip placement device and semiconductor package manufacturing method - Google Patents

Description

The technology disclosed in this specification relates to a technology for manufacturing a semiconductor package by molding chips arranged on a substrate to form a mold body and dividing the mold body for each chip. More particularly, the present invention relates to a technique for arranging chips at a plurality of chip arranging positions on a substrate when manufacturing a semiconductor package.

2. Description of the Related Art When manufacturing a package including a chip, the chip is sometimes sealed within the package by covering the periphery of the chip with a molding material. When manufacturing this type of package, after a chip placement process of placing a plurality of chips on a substrate is performed, a molding process of sealing the chips placed on the substrate with a molding material is performed. At this time, the molding process may be performed in a state where chips are not arranged at all chip arrangement positions on the substrate. For example, if a defect occurs in the chip itself or in the process of placing the chip, the chip may not be placed at the intended position. Also, the number of chips to be arranged may be smaller than all the chip arrangement positions on one substrate. If the molding process is performed in such a state, the chips on the substrate may not be accurately sealed with the molding material, resulting in defective molding.

For example, Patent Literature 1 discloses a technique for suppressing the occurrence of mold defects when chips are not arranged at all chip arrangement positions on a substrate. In Patent Document 1, first, a chip is placed on a substrate by a chip placement device. Next, a defective portion where no chip is arranged is identified. Next, when placing the molding material on the substrate, first, a sheet-like molding material having dummy chips arranged at positions corresponding to the defective portions is prepared. That is, the sheet-shaped mold material is composed of a release film, a mold material placed on the front surface of the release film, and a dummy chip placed on the back surface of the release film. The mold material is arranged at a position corresponding to the chip-arranged portion, and the dummy chip is arranged at a position corresponding to the defective portion where no chip is arranged. By molding the chips on the substrate using this sheet-like molding material, all the chips arranged on the substrate are sealed with the molding material, and the occurrence of molding defects is suppressed.

JP 2017-224722 A

In the technique disclosed in Patent Document 1, after chips are placed on a substrate by a chip placement device, dummy chips are placed in defective positions where no chips were placed, and then a molding process is performed. For this reason, a process of arranging the dummy chip on the back surface of the release film is required between the process of arranging the chip on the substrate and the molding process, which complicates the process of manufacturing the semiconductor package. .

This specification discloses a technique for improving production efficiency from the step of arranging a chip on a substrate to the molding step in manufacturing a semiconductor package.

The chip placement apparatus disclosed in the present specification molds chips placed on a substrate to form a mold body, and divides the mold body into chips to manufacture a semiconductor package. Place the chip in the chip placement position of The chip placement device includes a moving unit that moves the chip onto the substrate and a control unit that controls the moving unit, and includes a chip placement process for placing the chip at a chip placement position on the substrate, and a chip placement process among the plurality of chip placement positions. a control unit configured to be able to execute dummy chip placement processing for placing dummy chips at chip placement positions where chips are not placed by the chip placement processing.

In the above-described chip placement apparatus, the chips are placed at the chip placement positions on the substrate, and the dummy chips are placed at the chip placement positions on the substrate where no chips are placed. Therefore, a dummy chip can be placed at a chip placement position where no chip is placed using a chip placement device, and complication of the step of placing a dummy chip can be avoided. By using this chip placement device, it is possible to easily place the dummy chips between the placement of the chips and the molding, thereby improving the production efficiency of the process before the molding process.

In addition, the method of manufacturing a semiconductor package disclosed in this specification manufactures a semiconductor package by molding a chip arranged on a substrate to form a mold body, and dividing the mold body for each chip. A method of manufacturing a semiconductor package includes a chip placement step of placing chips at a plurality of chip placement positions on a substrate using a chip placement apparatus having a moving unit for moving the chips onto the substrate, wherein the moving unit moves on the substrate. and a dummy chip placement step in which the moving unit places a dummy chip in a chip placement position where no chip is placed by the chip placement step, among the plurality of chip placement positions. and a molding step of molding the chips and dummy chips arranged on the substrate.

In the method of manufacturing a semiconductor package described above, the chips and the dummy chips are placed on the substrate by a chip placement device having a moving part. Therefore, it is possible to obtain the same effects as those of the chip placement device described above.

FIG. 2 is a cross-sectional view schematically showing the configuration of a package manufactured using the chip placement apparatus according to the embodiment; The figure which shows schematic structure of a package manufacturing apparatus. FIG. 4 is a diagram showing a schematic configuration of a package manufacturing process; 5 is a flowchart showing an example of a chip placement process using a chip placement apparatus in the first and second embodiments; FIG. 4 is a diagram showing an example of a state in which chips or dummy chips are arranged at all chip arrangement positions on a support in Embodiment 1; FIG. 4 is a diagram for explaining a molding process, (a) showing a case where chips are arranged at all chip arrangement positions and molding is properly performed, and (b) showing a chip with no chips arranged. A case where a molding defect occurs due to the existence of an arrangement position is shown, and (c) shows a case where a molding defect occurs because a chip is not arranged at an adjacent chip arrangement position. FIG. 10 is a diagram showing an example of a state in which chip placement positions on a support are divided into a plurality of blocks in Embodiment 2; 10 is a flow chart showing an example of processing in a chip placement process using a chip placement device in Examples 3 to 5; FIG. 11 is a diagram showing an example of a state in which dummy chips are arranged at chip arrangement positions adjacent to chips in the third embodiment; FIG. 12 is a diagram showing an example of a state in which dummy chips are arranged at chip arrangement positions adjacent to chips in the fourth embodiment; FIG. 11 is a diagram showing an example of a state in which dummy chips are arranged at chip arrangement positions adjacent to chips in the fifth embodiment; FIG. 11 is a diagram showing an example of the arrangement of chips and dummy chips when the sizes of the chips and dummy chips are different in the sixth embodiment; FIG. 4 is a diagram showing an example of the arrangement of chips and dummy chips on a support when manufacturing a package having a plurality of chips;

The main features of the embodiments described below are listed. It should be noted that the technical elements described below are independent technical elements, and exhibit technical usefulness alone or in various combinations, and are limited to the combinations described in the claims as filed. not a thing

(Feature 1) In the chip placement apparatus disclosed in this specification, in the dummy chip placement process, among the chip placement positions where no chips are placed on the substrate in the chip placement process, A dummy chip may be arranged at an adjacent chip arrangement position. If a chip is not placed at an adjacent chip placement position, the entire chip (for example, the surface where no adjacent chip is placed) may not be covered with the molding material when molded. By arranging the dummy chip instead when no chip is arranged at the adjacent chip arrangement position, the entire chip can be molded in the same manner as when the chip is arranged at the adjacent chip arrangement position. Of the chip placement positions where no chips are placed on the substrate, it is not necessary to place dummy chips at chip placement positions that are not adjacent to chip placement positions where chips are placed. Even if the dummy chip is not arranged, since no chip is arranged at the chip position adjacent to the chip arrangement position, the situation that the chip is not sealed with the molding material does not occur. Also, even if nothing is placed at some chip placement positions, the molding process will not be hindered depending on the type of molding material. Therefore, it is possible to avoid arranging a dummy chip in a position where it is not necessary to arrange a dummy chip, and it is possible to reduce the consumption of dummy chips.

(Feature 2) In the chip placement apparatus disclosed in this specification, the order may be set in advance for each of the plurality of chip placement positions on the substrate. The control unit may control the moving unit to place the chips or the dummy chips at the chip placement positions according to a preset order. The control unit may execute the dummy chip placement process after executing the chip placement process. In the dummy chip placement process, a preset number of dummy chips may be placed at the chip placement positions. If chips or dummy chips are arranged at all the chip arrangement positions set on the substrate, dummy chips may be arranged up to chip arrangement positions where dummy chips do not need to be arranged. Therefore, if dummy chips can be arranged only at necessary chip arrangement positions, no dummy chips are generated. In this chip placement apparatus, the number of dummy chips to be placed is set to a preset number, thereby suppressing the generation of useless dummy chips. For example, consider a case where chips are arranged on a substrate in a matrix of n rows×m columns. In such a case, for example, consider a case where chips are arranged in order from the first row to the n-th row in the column direction from the position of coordinates (1, 1). In such a case, by setting the number of dummy chips to be m in advance, it is possible to prevent a situation in which dummy chips are not arranged at a chip arrangement position adjacent to a chip arrangement position where a chip is arranged. . Alternatively, when chips are arranged in order from the 1st column to the m-th column in the row direction from the position of the coordinates (1, 1), by setting the number of dummy chips to be n in advance, the chips can be It is possible to prevent a situation in which a dummy chip is not placed at a chip placement position adjacent to the placed chip placement position.
That is, according to the above configuration, since the chips or dummy chips are arranged at the chip arrangement positions according to the order set in advance, after the chips are arranged on the substrate, the dummy chips are sequentially arranged from the next chip arrangement position. placed. In addition, by arranging a predetermined number of dummy chips, the dummy chip is arranged at a position adjacent to the chip regardless of the chip arrangement position where the chip is switched to the dummy chip. can be set as That is, since the number of chips that can be placed on the board is determined by the number of defective chips that are discarded during the chip placement process, it is not possible to set in advance to which position the chips are placed on the board. By setting the number of dummy chips to be arranged in advance, dummy chips can be arranged at adjacent positions regardless of the positions on the substrate where the chips are arranged. Therefore, it is not necessary to determine the positions of the dummy chips after the chip placement process, and the chips and the dummy chips can be efficiently placed.

(Feature 3) In the chip placement apparatus disclosed in this specification, the size of the dummy chip may differ from the size of the chip. In the chip placement process, the chips may be placed with a predetermined gap between the chip and a chip placed adjacent to the chip. In the dummy chip placement process, the dummy chip may be placed with a predetermined gap between the dummy chip and a chip placed adjacent to the dummy chip. According to such a configuration, even if the size of the dummy chip is different from the size of the chip (for example, even if the dummy chip is smaller than the chip), the distance between the chips can be adjusted to the distance between the chips. It can be made substantially the same as the interval between. As a result, even if the size of the dummy chip differs from the size of the chip, it is possible to reduce mold defects.

(Example 1)
A chip placement device 10 according to an embodiment will be described below. The chip placement device 10 is a device used when manufacturing the package 50 . First, the package 50 manufactured using the chip placement apparatus 10 of this embodiment will be described.

FIG. 1 schematically shows the configuration of the package 50. As shown in FIG. As shown in FIG. 1, the package 50 includes a chip 52, a molding material 54, and a wiring layer 56. As shown in FIG. In this embodiment, the package 50 is a fan-out wafer level package (FOWLP) or a fan-out panel level package (FOPLP).

The chip 52 is flat and has a plurality of electrode pads 53 on one surface. The surface of the chip 52 on which the electrode pads 53 are formed is in contact with the wiring layer 56 , and the other surfaces are covered with the molding material 54 . Wiring, bumps, etc. (not shown) are formed on the wiring layer 56 so as to be electrically connected to the respective electrode pads 53 . When the package 50 is mounted on a circuit board or the like, the wiring layer 56 is arranged so as to abut on the circuit board or the like.

Next, the package manufacturing apparatus 100 that manufactures the package 50 will be described. As shown in FIG. 2, the package manufacturing apparatus 100 includes a chip placement device 10, a molding device 20, and a dicing device 30. As shown in FIG.

Chip placement apparatus 10 places chip 52 on support 62 . The chip placement apparatus 10 supplies a chip moving section 12 that moves the chip 52 onto the support 62, a control section 14 that controls the chip moving section 12, a chip supply section 16 that supplies the chip 52, and a dummy chip 70. A dummy chip supply unit 18 is provided to supply the dummy chip. The operation of each part 12, 14, 16, 18 of the chip placement device 10 will be described in detail later. As the chip placement device 10, a dedicated device for placing the chip 52 on the support 62 may be used, or a component mounter for mounting electronic components on the circuit board may be used. When a component mounter is used, the head for moving electronic components onto the circuit board corresponds to the chip moving section 12, the control device for controlling the head corresponds to the control section 14, and the component feeder corresponds to the chip supply section 16. Equivalent to. Also, by accommodating the dummy chips 70 in the component feeder, the component feeder can also be used as the dummy chip supply unit 18 . Note that when a component mounter is used as the chip placement device 10, a known component mounter can be used, so the detailed configuration thereof will be omitted. Further, the support 62 is an example of a "substrate", and the chip moving section 12 is an example of a "moving section".

Molding apparatus 20 molds chip 52 placed on support 62 . The dicing device 30 divides the mold body 60 sealing the chip 52 . Since the mold device 20 and the dicing device 30 can be known devices, the detailed configuration thereof will be omitted.

Next, a method of manufacturing the package 50 using the package manufacturing apparatus 100 will be described with reference to FIGS. 3 to 5. FIG. As shown in FIG. 3A, first, a plurality of chips 52 are arranged on a support 62 using the chip placement device 10 (chip placement step). The support 62 is composed of a glass plate 64 and an adhesive tape 66 attached to the surface of the glass plate 64 . The adhesive tape 66 is coated with adhesive on both sides, one side of which is attached to the surface of the glass plate 64, and the other side of which the chip 52 is attached. When chip 52 is placed on support 62 (ie, adhesive tape 66 ), it is secured in place by adhesive tape 66 . A plurality of chips 52 are fixed at predetermined positions on one support 62 . In the chip placement step shown in FIG. 3A, by placing a large number of chips 52 on a large support 62, manufacturing costs can be reduced. The dimensions of the support 62 are not particularly limited, and can be appropriately selected according to the number and types of packages 50 to be manufactured.

Here, processing of the chip placement process by the chip placement device 10 will be described. As shown in FIG. 4, first, the controller 14 places the chip 52 at the chip placement position on the support 62 (S12). Chips 52 are supplied from the chip supply section 16 . A plurality of chip placement positions are set on the support 62 according to the types of the chips 52 sealed in the package 50 . In addition, the order in which the chips 52 are arranged (hereinafter also referred to as chip arrangement order) is set in advance at a plurality of chip arrangement positions on the support 62 .

Here, an example of the chip placement order set to the chip placement positions of 7 rows×20 columns will be described with reference to FIG. In FIG. 5, the upper right chip placement position is designated as "Position 1-1", and the numbers are increased from right to left in the same row, and the numbers are increased from top to bottom in the same column. . Therefore, the chip placement position to the left of position 1-1 is represented as "position 1-2", and the chip placement position to the bottom of position 1-1 is represented as "position 2-1". Become. As shown in FIG. 5, for example, the chip placement order is the order indicated by the arrows in FIG. In other words, the order of chip placement is such that position 1-1 is the first chip placement position, and the chip placement positions on the left are sequentially shifted to. That is, the order of chip placement is the order of positions 1-1, 1-2 . . . 1-20. Then, the order of chip placement is position 2-20 next to position 1-20, and then shifts to chip placement positions 2-19, 2-18, . . . Such a chip arrangement order is also called an "S-shaped chip arrangement order"). The control unit 14 first places the chip 52 at the position 1-1 according to the chip placement order set in advance.

In this embodiment, the chip arrangement order is set to form an S-shape, but the chip arrangement order may be set in advance, and the order is not particularly limited. For example, the chip placement order may be set such that the same row always moves in the same direction (eg, from right to left). Specifically, the order of chip placement is the order of positions 1-1, 1-2, . (Such a chip placement order is also referred to as "chip placement order in the same direction" below).

Next, the control unit 14 determines whether or not there are chips 52 left to be placed on the support 62 (S14). That is, the control section 14 determines whether or not the chip 52 remains in the chip supply section 16 . If chips 52 remain in the chip supply unit 16 (YES in step S14), the process returns to step S12 and repeats the processes of steps S12 and S14. When repeating the process of step S12, the control unit 14 places the chip 52 in the chip placement position set next to the chip placement position where the chip 52 was placed in the previous process of step S12, according to the order of chip placement. Deploy. For example, when the chip 52 is placed at the position 1-1 by the processing of the previous step S12, the chip 52 is placed at the position 1-2 which is the next chip placement position set according to the order of chip placement.

If no chip 52 remains in the chip supply unit 16 (NO in step S14), the control unit 14 controls the chip moving unit 12 to place the dummy chip 70 at the chip placement position on the support 62 (S20). . The dummy chip 70 is supplied from the dummy chip supply section 18 . In this embodiment, the outer shape of the dummy chip 70 has the same shape as that of the chip 52 . Note that the dummy chip 70 may have the same outer shape as the chip 52, and for example, the material is not particularly limited. At this time, the dummy chip 70 is placed at the chip placement position set next to the chip placement position where the last chip 52 is placed (that is, the chip placement position where the chip 52 is placed by the process of the last step S12). placed. Therefore, even if the component placed on the support 62 is switched from the chip 52 to the dummy chip 70, the dummy chip 70 is placed at the chip placement position following the chip 52 in accordance with the preset chip placement order. For example, in FIG. 5, the last chip 52 is located at position 4-14. Therefore, the dummy chip 70 is arranged at the position 4-13, which is the chip arrangement position set next to the position 4-14.

Next, the control unit 14 determines whether or not the dummy chips 70 have been placed at all the chip placement positions on the support 62 (S18). If dummy chips 70 are not placed at all chip placement positions on support 62 (NO in step S18), control unit 14 returns to step S16 and repeats steps S16 and S18. At this time, like the chip 52, the dummy chip 70 is also arranged at the chip arrangement position according to the preset chip arrangement order. When the dummy chips 70 are arranged at all the chip arrangement positions on the support 62 (YES in step S18), the chip arrangement process is completed.

When the chip placement process is completed, the periphery of the chip 52 is covered with a molding material 54 using the molding device 20 (molding process), as shown in FIG. 3B. Next, as shown in FIG. 2(c), the support 62 is separated from the mold body 60 (separation step). Then, the chip 52 (more specifically, the surface of the chip 52 on which the electrode pads 53 are formed) is exposed. Next, as shown in FIG. 2D, a wiring layer 56 is formed on the exposed surface of the chip 52 (wiring layer forming step). Then, as shown in FIG. 2(e), the dicing device 30 is used to divide the structure composed of the chip 52, the mold material 54 and the wiring layer 56 so as to include the individual chips 52 (individual pieces). (division step). In this manner, a plurality of packages 50 are collectively manufactured.

In this embodiment, the chip placement apparatus 10 is used to place the chips 52 or the dummy chips 70 at all chip placement positions on the support 62 in the chip placement process. That is, even if there is a chip placement position where no chip 52 is placed on the support 62 when all the chips 52 are placed on the support 62, the dummy chip 70 is placed instead of the chip 52 at that chip placement position. be. When the chips 52 or the dummy chips 70 are arranged at all the chip arrangement positions on the support 62, as shown in FIG. Pressure is applied evenly and all chips 52 can be molded normally. On the other hand, as shown in FIG. 6(b), if there is a chip arrangement position where the chip 52 is not arranged on the support 62, the pressure during molding is not applied uniformly, and molding failure may occur. be. Further, as shown in FIG. 6(c), if the chip 52 is not arranged at the adjacent chip arrangement position, the molding material 54 flows in the direction in which the chip 52 is not arranged, and the entire chip 52 is molded. (See dashed line in FIG. 6(c)). By arranging the chips 52 or the dummy chips 70 at all the chip arrangement positions on the support 62, it is possible to arrange the chips 52 at all the chip arrangement positions during the molding process after the chip arrangement process. Similarly, the pressure can be applied evenly, and the occurrence of mold defects can be suppressed.

Also, in this embodiment, the order in which the chip 52 or the dummy chip 70 is arranged at the chip arrangement position is set in advance, and the dummy chip 70 is arranged following the arrangement of the chip 52 in accordance with the order. Therefore, the dummy chip 70 can be arranged on the support 62 without creating a program for arranging the dummy chip 70 . The number of chips 52 to be placed on support 62 cannot be accurately known before the chip placement process. This is because, when the chip 52 is placed on the support 62, if a defect such as a defect or chipping is found in the chip 52, the chip 52 is discarded without being placed on the support 62. . For this reason, not all the chips 52 previously accommodated in the chip supply unit 16 are placed on the support 62, and the total number of chips 52 actually placed on the support 62 after the chip placement process is is not determined until all chips 52 have been placed on support 62 . The dummy chip 70 is placed at a chip placement position on the support 62 where the chip 52 was not placed. Therefore, when creating a program for arranging the dummy chips 70, the program cannot be created until the process of arranging all the chips 52 on the support 62 is completed. In this embodiment, by placing the dummy chips 70 according to a preset order, it is not necessary to create a program for placing the dummy chips 70 . Therefore, the process of arranging the chips 52 and the dummy chips 70 can be executed quickly, and the production efficiency can be improved.

In addition, in this embodiment, the dummy chip 70 is placed after the chip 52 is placed in the chip placement process. Therefore, for example, unlike the technique disclosed in Japanese Unexamined Patent Application Publication No. 2017-224722, there is no need to add a step different from the chip placement step for placing the dummy chip 70 . Therefore, in the manufacture of the package 50, the placement of the dummy chip 70, which is performed between the placement of the chip 52 and the molding, can be easily performed, and the production efficiency of the process prior to the molding process can be improved. can.

In addition, in this embodiment, not only the chip 52 but also the dummy chip 70 are placed on the support 62 using the chip placement apparatus 10 . For example, dummy chips 70 can be placed by an operator after all chips 52 have been placed. In this embodiment, by automating the placement of the dummy chips 70 by the chip placement apparatus 10, the time required for the process of placing the chips 52 and the dummy chips 70 can be shortened, and the production efficiency can be improved.

In this embodiment, when the control unit 14 determines that there are no chips 52 left to be placed on the support 62 (NO in step S14), the dummy chips 70 are subsequently placed. It is not limited to such a configuration. For example, switching from placement of the chip 52 to placement of the dummy chip 70 may be performed by an operator's instruction. Specifically, when all the chips 52 are placed on the support 62, the control unit 14 causes the interface device (not shown) of the chip placement device 10 to display that effect. Then, the control section 14 may start the process of placing the dummy chips 70 when the operator instructs to place the dummy chips 70 via the interface device.

(Example 2)
In the first embodiment described above, the chip 52 or the dummy chip 70 is arranged at all the chip arrangement positions on the support 62, but the configuration is not limited to this. For example, as shown in FIG. 7, the chip arrangement positions on the support 62 may be divided into a plurality of blocks (blocks B1 and B2 in FIG. 7). In such a case, the chips 52 and the dummy chips 70 may be arranged so that the chips 52 or the dummy chips 70 are arranged in all chip arrangement positions in units of blocks. Specifically, the order in which the chips 52 are arranged on the chip arrangement positions on the support 62 is as follows: is set to be placed. When the final chip 52 is placed at the chip placement position in the block B1, the placement of the dummy chip 70 ends when the dummy chip 70 is placed at the remaining chip placement position in the block B1 (that is, , end the chip placement process). Then, on the support 62, the chips 52 or the dummy chips 70 are arranged at all the chip arrangement positions in the block B1, and neither the chips 52 nor the dummy chips 70 are arranged at the chip arrangement positions in the block B2. Become. When the chip arrangement positions on the support 62 are divided into a plurality of blocks, the subsequent molding process is also performed for each block. Therefore, if the chips 52 or the dummy chips 70 are arranged at all the chip arrangement positions of the block B1 in which the chips 52 are arranged, the molding defects of the chips 52 can be suppressed. Therefore, by not arranging the dummy chip 70 in the block B2 where the dummy chip 70 does not need to be arranged, the consumption of the dummy chip 70 can be reduced.

(Example 3)
In Embodiments 1 and 2 described above, the chips 52 or the dummy chips 70 are arranged at all chip arrangement positions on the support 62 or all chip arrangement positions within the block, but the present invention is not limited to such a configuration. For example, the dummy chip 70 may be placed at the chip placement position adjacent to the chip placement position where the chip 52 is placed, and neither the chip 52 nor the dummy chip 70 may be placed at the other chip placement positions. In the molding process, even if the chips 52 or the dummy chips 70 are not arranged at all the chip arrangement positions on the support 62, pressure during molding is placed on the support 62 depending on the type of the molding material 54. It may span the tip 52 almost evenly. In such a case, it is not necessary to place dummy chips 70 at all chip placement positions where chips 52 were not placed. However, if the chip 52 or the dummy chip 70 is not placed at the adjacent chip placement position, the entire chip 52 may not be molded. That is, depending on the type of the molding material 54, the mold defect shown in FIG. 6(b) does not occur, but the mold defect shown in FIG. 6(c) does occur. In order to suppress the occurrence of such mold defects, a dummy chip 70 is arranged at a chip arrangement position adjacent to the chip arrangement position where the chip 52 is arranged. In this embodiment, since the chip placement process is different from the above-described first and second embodiments, description of processes other than the chip placement process will be omitted.

As shown in FIG. 8, in the chip placement process of this embodiment, first, the controller 14 places the chip 52 at the chip placement position on the support 62 (S32). Next, the control unit 14 determines whether or not there are any chips 52 left to be placed on the support 62 (S34). Returning to S32, the processing of steps S32 and S34 is repeated. If no chip 52 remains in the chip supply unit 16 (NO in step S34), the control unit 14 controls the chip moving unit 12 to move the dummy chip 70 onto the support 62 according to the preset chip arrangement order. It is arranged at the chip arrangement position (S36). Note that the processing of steps S32 to S36 is the same as the processing of steps S12 to S16 in the first embodiment, so detailed description thereof will be omitted.

When the first dummy chip 70 is placed at the chip placement position on the support 62, the control unit 14 determines whether or not the dummy chip 70 has been placed at all the chip placement positions on the support 62 (S38). ). When the dummy chips 70 have been placed on all chip placement positions on the support 62 (YES in step S38), the chip placement process ends. As will be described in detail later, in this embodiment, only a predetermined number of dummy chips 70 are arranged on the support 62 . However, when all the chips 52 are placed, if the number of chip placement positions on the support 62 where no chips 52 are placed is less than the preset number of dummy chips 70 to be placed, However, it is not possible to place all of the predetermined number of dummy chips 70 on the support 62 . Therefore, when the dummy chips 70 are arranged at all the chip arrangement positions on the support 62, the chip arrangement process is completed even if the predetermined number of dummy chips 70 are not arranged on the support 62. do.

If the dummy chips 70 are not placed at all the chip placement positions on the support 62 (NO in step S38), the control unit 14 determines whether a predetermined number of dummy chips 70 are placed on the support 62. (S40). The predetermined number of dummy chips 70 (hereinafter, also referred to as “the number of dummy chips 70 to be arranged”) is such that the dummy chips 70 are arranged at all the chip arrangement positions adjacent to the chip arrangement position where the chip 52 is arranged. is set in advance. As shown in FIG. 9, in this embodiment, seven chip placement positions are set in one row, and the chips 52 and the dummy chips 70 are placed in the same order of chip placement in the same direction. In this case, if one row of dummy chips 70 is arranged following the arrangement of the chips 52 according to the chip arrangement order, the chips 52 or the dummy chips 70 are arranged at the chip arrangement positions adjacent to all the chips 52. state. Therefore, the number of dummy chips 70 to be arranged is set to 7, which is equivalent to one row.

If a predetermined number (in this embodiment, seven) of dummy chips 70 are not placed on the support 62 (NO in step S40), the process returns to step S36, and the processing of steps S36 to S40 is performed. repeat. On the other hand, when a predetermined number (seven in this embodiment) of dummy chips 70 have been placed on the support 62 (YES in step S40), the chip placement process ends. As a result, the chips 52 or the dummy chips 70 are arranged at the chip arrangement positions adjacent to all the chips 52 on the support 62, so that the occurrence of mold defects in the chips 52 in the next molding process is suppressed. can.

In this embodiment, the dummy chip 70 is arranged only at the chip arrangement position adjacent to the chip 52 . As a result, it is possible to avoid arranging dummy chips 70 at positions where dummy chips 70 do not need to be arranged, and the number of dummy chips 70 arranged on support 62 can be reduced. Therefore, it is possible to suppress the occurrence of molding defects of the chip 52 in the molding process and reduce the consumption of the dummy chip 70 .

(Example 4)
In the third embodiment described above, the number of dummy chips 70 to be arranged is set in advance as one row of chip arrangement positions, but the configuration is not limited to this. The number of dummy chips 70 to be arranged may be set to be larger than one row of the chip arrangement positions in accordance with the order of chip arrangement.

As shown in FIG. 10, in this embodiment, seven chip placement positions are set in one row as in the third embodiment. Assume that they are arranged in order of arrangement. In this case, if the number of dummy chips 70 arranged in one row is seven, as in the third embodiment, there will be chips 52 in which neither chips 52 nor dummy chips 70 are arranged at adjacent chip arrangement positions. For example, assume that chips 52 are arranged up to position 3-1. At this time, even if seven dummy chips 70 are arranged following position 3-1 according to the order of chip arrangement, dummy chips 70 are arranged only from position 3-2 to position 4-7. Therefore, the dummy chip 70 is not arranged at the position 4-1 adjacent to the lower side of the chip 52 arranged at the position 3-1. Therefore, no matter how many columns the chips 52 are arranged, the dummy chips 70 are arranged at all the chip arrangement positions where the chip 52 is not arranged at the chip arrangement position adjacent to the chip 52. set to Therefore, in the case of the S-shaped chip arrangement order, the number of dummy chips 70 to be arranged is set to 2 rows minus 1 (13 in this embodiment).

In this embodiment, the dummy chips 70 are arranged not only at positions adjacent to the chip 52, but also at positions not adjacent to the chip 52 (for example, positions 3-3, 4-2 to 4-7 in FIG. 10). . However, by setting the number of dummy chips 70 to be arranged in advance as described above and by arranging the dummy chips 70 according to the order of chip arrangement, it is possible to arrange the dummy chips 70 adjacent to the chip 52 without creating a program for arranging the dummy chips 70 . Chips 52 or dummy chips 70 can be placed at all chip placement positions. Therefore, the production efficiency can be improved and the consumption of the dummy chips 70 can be minimized.

(Example 5)
Also, the number of dummy chips 70 to be arranged may be set to be larger than that of the fourth embodiment according to the specifications of the chip placement apparatus 10 . For example, a case where the tip moving section 12 has a plurality of nozzles will be described as an example. It is assumed that the chip moving section 12 has, for example, four nozzles. These four nozzles are referred to as nozzles A to D for convenience. In this case, the chips 52 are supplied from the chip supply section 16 to each of the four nozzles A to D, and the chip moving section 12 moves onto the support 62 in this state. Then, chips 52 are arranged at four positions according to the chip arrangement order. At this time, the chips 52 are arranged at the chip arrangement positions in the order of the nozzles A to D. Specifically, nozzle A places the chip 52 at position 1-1, nozzle B places the chip 52 at position 1-2, nozzle C places the chip 52 at position 1-3, and nozzle D places the chip 52 at position 1-3. Chips 52 are placed at positions 1-4 (see FIG. 11). After placing the chip 52, the chip moving section 12 returns to the chip supplying section 16 again. By repeating this, the chip moving section 12 moves the chip 52 to the chip placement position. In this manner, the chip moving section 12 simultaneously moves the four chips 52 as a set onto the support 62 by using the four nozzles A to D. FIG. At this time, if any one of the four chips 52 supplied to the chip moving section 12 is defective, the defective chip 52 is discarded, and only the remaining normal chips 52 are moved onto the support 62 at the same time. be done. For example, if a defect is found in the chips 52 supplied to nozzle B, the chips 52 supplied to nozzle B are discarded, and only the chips 52 supplied to nozzles A, C, and D are placed at the chip placement positions. be. For this reason, for example, while the chips 52 are placed at positions 1-1, 1-3, and 1-4 by the nozzles A, C, and D, the chips 52 supplied to the nozzle B are scheduled to be placed at the position 1. No chip 52 is placed in -2. At the position 1-2, the next set of chips 52 (for example, the chips 52 supplied to the nozzle A) carried to the support 62 by the chip moving section 12 is arranged.

However, if a defect is found in the last set, the chips 52 are no longer arranged consecutively in the chip arrangement order. For example, as shown in FIG. 11, in the last set, nozzle A places a chip 52 at position 2-3, nozzle B places a chip 52 at position 2-2, and nozzle C places a chip 52 at position 2-1. Assume that the chip 52 is placed and that the nozzle D is to place the chip 52 at the position 3-1. In this case, if a defect is found in the chips 52 supplied to nozzles A to C, the chips 52 are placed at position 3-1 by nozzle D, while positions 2-3, 2-2, 2-1 , the chip 52 is not arranged. Then, according to the order of chip placement, in the next set, dummy chips 70 are placed at positions 2-3, 2-2, 2-1, and at position 3-2 in the order of chip placement next to position 3-1. In this case, as in the fourth embodiment described above, if the number of dummy chips 70 to be arranged is set to 13, that is, two columns applied to the S-shaped chip arrangement order minus one, the position 4-4 is obtained. The dummy chips 70 are arranged only up to the . Therefore, the dummy chip 70 is not arranged at the position 4-1 adjacent to the lower side of the chip 52 arranged at the position 3-1. In this way, the dummy chip 70 may not be arranged at all the chip arrangement positions where the chip 52 is not arranged at the chip arrangement position adjacent to the chip 52 .

Therefore, the dummy chips 70 are placed at all chip placement positions where no chip 52 is placed at a chip placement position adjacent to the chip 52, no matter how many columns the chips 52 are placed. set to Therefore, in this embodiment, the number of dummy chips 70 to be arranged is set to the number of arrangement (13 in this embodiment) in the case of the S-shaped chip arrangement order in accordance with the specifications of the chip arrangement apparatus 10. The number of chips 52 that the part 12 can simultaneously move onto the support 62 minus 1 (that is, the number of heads minus 1, which is 3 in this embodiment) is added to the number (16 in this embodiment). By setting the number of dummy chips 70 to be arranged in accordance with the specifications of the chip placement apparatus 10 in this way, the chip 52 or the dummy chip 70 can be reliably placed in all the chip placement positions adjacent to the chip 52 . , the number of dummy chips 70 arranged on the support 62 can be reduced.

(Example 6)
In Examples 1 to 5 described above, the external shape of the dummy chip 70 was the same as the external shape of the chip 52, but the configuration is not limited to this. For example, the outline of dummy chip 170 may differ from the outline of chip 52 . In this embodiment, a case where the rectangular dummy chip 170 has the same horizontal dimension as the chip 52 but has a smaller vertical dimension than the chip 52 will be described as an example.

As shown in FIG. 12, the chip arrangement positions are evenly arranged on the support 62, and when the chips 52 are arranged, a uniform distance d1 is created between the chips 52. As shown in FIG. When arranging the dummy chip 170 at the chip arrangement position, the distance d2 between the dummy chip 170 and the chip 52 is offset upward from the center of the chip arrangement position so that the distance d1 between the chips 52 is the same. A dummy chip 170 is arranged at the position where the dummy chip 170 is formed. For example, if the dummy chip 170 is arranged at the center of the chip arrangement position, the distance between the dummy chip 170 and the chip 52 will be greater than the distance d1 between the chips 52 . Then, in the molding process, even the lower end portion of the chip 52 is not properly molded, and a molding defect such as that shown in FIG. 6C may occur. By offsetting the dummy chip 170 as described above, even if the dummy chip 170 having a size different from that of the chip 52 is arranged, the occurrence of mold defects can be reduced.

(Example 7)
In Examples 1 to 6 described above, one chip 52 is sealed in the manufactured package 50, but the present invention is not limited to such a configuration. For example, a plurality of chips 52 may be sealed in the package. Even in such a case, the chips 52 can be arranged on the support 62 as a group of chips 52 sealed in one package. For example, as shown in FIG. 13, even when a chip unit 152 having two types of chips 52a and 52b as a group unit is arranged on the support 62, the chip unit 152 is not arranged at the chip arrangement position. A dummy chip 70 can be placed. In this case, after placing all the chips of one type (for example, the chip 52a) that make up the chip unit 152, the dummy chip 70 is placed, and then another chip (for example, the chip 52b) that makes up the chip unit 152 is placed. may be placed. Further, after all the chips (that is, the chips 52a and 52b) constituting the chip unit 152 are arranged, the dummy chips 70 may be arranged continuously. Even when the chip unit 152 is arranged on the support 62, by arranging the dummy chip 70, it is possible to suppress the occurrence of molding defects in the chip unit 152 in the subsequent molding process. In this embodiment, the dummy chips 70 are arranged at all chip arrangement positions on the support 62 where the chip units 152 are not arranged. Chip 70 may be arranged to be placed at a chip placement position adjacent to chip unit 152 .

The technical elements described in this specification or in the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims as of the filing. In addition, the techniques exemplified in this specification or drawings achieve multiple purposes at the same time, and achieving one of them has technical utility in itself.

10: Chip placement device 12: Chip moving unit 14: Control unit 16: Chip supply unit 18: Dummy chip supply unit 20: Molding device 30: Dicing device 50: Package 52: Chip 54: Mold material 56: Wiring layer 62: Support Body 70, 170: dummy chip 100: package manufacturing apparatus 152: chip unit

Claims (5)

A chip arranged at a plurality of chip arrangement positions on a substrate when a semiconductor package is manufactured by molding chips arranged on a substrate to form a mold body and dividing the mold body for each chip. a placement device,
a moving unit that moves the chip onto the substrate;
A control unit that controls the moving unit,
a chip placement process for placing a chip at the chip placement position on the substrate;
a control unit configured to be able to execute a dummy chip placement process of placing dummy chips at chip placement positions where no chips have been placed by the chip placement process among the plurality of chip placement positions. , a chip placement device. wherein, in the dummy chip placement process, the dummy chip is placed in a chip placement position adjacent to a chip placement position where a chip is placed among chip placement positions where no chip is placed on the substrate in the chip placement process. Item 1. The chip placement device according to Item 1. An order is set in advance for each of a plurality of chip placement positions on the substrate,
the control unit controls the moving unit so as to place the chips or the dummy chips at the chip placement positions according to the preset order;
After executing the chip placement process, the control unit executes the dummy chip placement process,
3. The chip placement apparatus according to claim 2, wherein in said dummy chip placement processing, a preset number of said dummy chips are placed at said chip placement position. the size of the dummy chip is different from the size of the chip,
In the chip placement process, the chips are placed with a predetermined gap between the chips and chips placed adjacent to the chips,
4. The dummy chip arrangement process according to any one of claims 1 to 3, wherein said dummy chip is arranged with said predetermined space between said dummy chip and said chip arranged at a position adjacent to said dummy chip. 1. The chip placement device according to claim 1. A semiconductor package manufacturing method for manufacturing a semiconductor package by molding a chip arranged on a substrate to form a mold body and dividing the mold body for each chip,
A chip placement step of placing chips at a plurality of chip placement positions on a substrate using a chip placement device having a moving unit for moving the chips onto the substrate,
a chip placement step in which the moving unit places the chip at a chip placement position on the substrate;
a dummy chip placement step in which the moving unit places a dummy chip in a chip placement position where no chip has been placed by the chip placement step among a plurality of chip placement positions;
and a molding step of molding the chip and the dummy chip arranged on the substrate.

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