JP7209692B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP7209692B2
JP7209692B2 JP2020504471A JP2020504471A JP7209692B2 JP 7209692 B2 JP7209692 B2 JP 7209692B2 JP 2020504471 A JP2020504471 A JP 2020504471A JP 2020504471 A JP2020504471 A JP 2020504471A JP 7209692 B2 JP7209692 B2 JP 7209692B2
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Prior art keywords
transistor
oxide
conductor
insulator
region
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Japanese (ja)
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JPWO2019171198A1 (ja
JPWO2019171198A5 (https=
Inventor
舜平 山崎
清 加藤
知昭 熱海
修平 長塚
寛司 國武
陽子 塚本
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3434—Deposited materials, e.g. layers characterised by the chemical composition being oxide semiconductor materials

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2020504471A 2018-03-06 2019-02-21 半導体装置 Active JP7209692B2 (ja)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
JP2018039854 2018-03-06
JP2018039854 2018-03-06
JP2018075977 2018-04-11
JP2018075977 2018-04-11
JP2018149313 2018-08-08
JP2018149313 2018-08-08
PCT/IB2019/051406 WO2019171198A1 (ja) 2018-03-06 2019-02-21 半導体装置

Publications (3)

Publication Number Publication Date
JPWO2019171198A1 JPWO2019171198A1 (ja) 2021-02-12
JPWO2019171198A5 JPWO2019171198A5 (https=) 2022-01-31
JP7209692B2 true JP7209692B2 (ja) 2023-01-20

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ID=67847019

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JP2020504471A Active JP7209692B2 (ja) 2018-03-06 2019-02-21 半導体装置

Country Status (5)

Country Link
US (1) US12300752B2 (https=)
JP (1) JP7209692B2 (https=)
KR (1) KR20200127004A (https=)
CN (1) CN111788697B (https=)
WO (1) WO2019171198A1 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7679305B2 (ja) 2019-11-08 2025-05-19 株式会社半導体エネルギー研究所 半導体装置
CN111834413A (zh) * 2020-04-17 2020-10-27 昆山国显光电有限公司 显示面板以及显示装置
CN112289796B (zh) * 2020-10-28 2021-09-28 长江存储科技有限责任公司 三维存储器的制造方法及三维存储器
KR102895845B1 (ko) * 2020-12-02 2025-12-04 삼성디스플레이 주식회사 표시 장치의 검사 방법
JP7393471B2 (ja) * 2021-06-03 2023-12-06 シャープ株式会社 光電変換装置およびｘ線撮像装置
CN114339313B (zh) * 2021-12-28 2024-09-13 维沃移动通信有限公司 插帧方法、装置及电子设备

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006270077A (ja) 2005-02-25 2006-10-05 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2011205049A (ja) 2010-03-26 2011-10-13 Toshiba Corp 半導体集積回路
JP2013247142A (ja) 2012-05-23 2013-12-09 Semiconductor Energy Lab Co Ltd 半導体膜の形成方法、半導体装置の作製方法、及び半導体装置
JP2015181159A (ja) 2014-03-07 2015-10-15 株式会社半導体エネルギー研究所 半導体装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7566633B2 (en) 2005-02-25 2009-07-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
JP2008004796A (ja) * 2006-06-23 2008-01-10 Matsushita Electric Ind Co Ltd 半導体装置および回路素子レイアウト方法
KR101291384B1 (ko) * 2008-11-21 2013-07-30 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR20120004774A (ko) 2010-07-07 2012-01-13 주식회사 하이닉스반도체 더미 패턴을 포함하는 반도체 장치 및 레이아웃
US8643008B2 (en) 2011-07-22 2014-02-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US9336348B2 (en) 2014-09-12 2016-05-10 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming layout design
KR20160093749A (ko) * 2015-01-29 2016-08-09 삼성디스플레이 주식회사 표시 기판, 이의 제조 방법 및 이를 포함하는 표시 장치
CN113314545B (zh) 2015-04-20 2024-10-29 株式会社半导体能源研究所 半导体装置及电子设备

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006270077A (ja) 2005-02-25 2006-10-05 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2011205049A (ja) 2010-03-26 2011-10-13 Toshiba Corp 半導体集積回路
JP2013247142A (ja) 2012-05-23 2013-12-09 Semiconductor Energy Lab Co Ltd 半導体膜の形成方法、半導体装置の作製方法、及び半導体装置
JP2015181159A (ja) 2014-03-07 2015-10-15 株式会社半導体エネルギー研究所 半導体装置

Also Published As

Publication number Publication date
US20210367078A1 (en) 2021-11-25
JPWO2019171198A1 (ja) 2021-02-12
US12300752B2 (en) 2025-05-13
CN111788697B (zh) 2024-06-28
WO2019171198A1 (ja) 2019-09-12
KR20200127004A (ko) 2020-11-09
CN111788697A (zh) 2020-10-16

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