JP7177579B2 - Semiconductor switching unit - Google Patents

Description

Embodiments of the invention relate to semiconductor switching units.

A semiconductor switching unit is known that includes a plurality of semiconductor switching elements connected in series and a plurality of snubber circuits connected in parallel to each of the plurality of semiconductor switching elements. Semiconductor switching units are used, for example, in power converters and the like.

In such a semiconductor switching unit, when a plurality of semiconductor switching elements are turned off to cut off the current, a surge voltage is generated when the current is commutated to the snubber circuit. If this surge voltage becomes large, there is a possibility that the semiconductor switching element will be damaged. That is, the surge voltage becomes a factor that reduces the interruptable current of the semiconductor switching unit.

For this reason, in the semiconductor switching unit, it is desired to suppress the surge voltage that occurs when the current is interrupted, and to increase the current that can be interrupted.

Japanese Patent No. 6386955

An embodiment of the present invention provides a semiconductor switching unit that suppresses a surge voltage that occurs when current is interrupted and increases the current that can be interrupted.

According to an embodiment of the present invention, a plurality of semiconductor switching elements stacked in a predetermined direction and connected in series; and a plurality of snubber circuits connected in parallel to each of the plurality of semiconductor switching elements, wherein the plurality of snubber circuits are configured to switch off the plurality of snubber circuits when the plurality of semiconductor switching elements are turned off. A loop-shaped current is caused to flow around an axis in the predetermined direction in which the circuits are stacked, and the direction of the loop-shaped current is opposite between the pair of snubber circuits that are adjacent to each other in the predetermined direction. A semiconductor switching unit is provided that is wired such that:

Provided is a semiconductor switching unit capable of suppressing a surge voltage generated at the time of current interruption and increasing a current that can be interrupted.

FIG. 1 is a schematic circuit diagram of a semiconductor switching unit according to the first embodiment. 2A and 2B are a plan view and a side view schematically showing the semiconductor switching unit according to the first embodiment. FIG. FIGS. 3A and 3B are explanatory diagrams schematically showing an example of the operation of the semiconductor switching unit according to the first embodiment. FIG. FIG. 4 is a graph diagram schematically showing an example of characteristics of a semiconductor switching unit; 5(a) and 5(b) are a plan view and a side view schematically showing a semiconductor switching unit according to the second embodiment. FIG. 11 is a plan view schematically showing a semiconductor switching unit according to a third embodiment; FIG. 11 is a plan view schematically showing a modification of the semiconductor switching unit according to the third embodiment;

Each embodiment will be described below with reference to the drawings.
Note that the drawings are schematic or conceptual, and the relationship between the thickness and width of each portion, the size ratio between portions, and the like are not necessarily the same as the actual ones. Also, even when the same parts are shown, the dimensions and ratios may be different depending on the drawing.
In addition, in the present specification and each figure, the same reference numerals are given to the same elements as those described above with respect to the already-appearing figures, and detailed description thereof will be omitted as appropriate.

(First embodiment)
FIG. 1 is a schematic circuit diagram of a semiconductor switching unit according to the first embodiment.
2A and 2B are a plan view and a side view schematically showing the semiconductor switching unit according to the first embodiment. FIG.
2(b) is, more specifically, a side view of the plan view of FIG. 2(a) viewed in the direction of arrow A. FIG.

As shown in FIGS. 1, 2A, and 2B, the semiconductor switching unit 10 includes a plurality of semiconductor switching elements 12 and a plurality of snubber circuits 14. FIG.

A plurality of semiconductor switching elements 12 are arranged side by side in a predetermined direction and connected in series.

A plurality of snubber circuits 14 are arranged in a predetermined direction adjacent to each of the plurality of semiconductor switching elements 12 and connected in parallel to each of the plurality of semiconductor switching elements 12 .

The semiconductor switching unit 10 has a first terminal 11a and a second terminal 11b. The first terminal 11a is connected to one end of a plurality of semiconductor switching elements 12 connected in series. The second terminal 11b is connected to the other ends of the plurality of semiconductor switching elements 12 connected in series.

The semiconductor switching unit 10 switches between a conducting state and an interrupting state between the first terminal 11a and the second terminal 11b by using the plurality of semiconductor switching elements 12 . The semiconductor switching unit 10 is used, for example, in power converters, circuit breakers, and the like. However, the application of the semiconductor switching unit 10 is not limited to these, and may be any application that requires switching between a conductive state and a cutoff state.

In this example, the semiconductor switching unit 10 also includes four semiconductor switching elements 12 connected in series and four snubber circuits 14 connected in parallel to each of the four semiconductor switching elements 12. . The number of semiconductor switching elements 12 and snubber circuits 14 is not limited to four, and may be two, three, or five or more. The number of semiconductor switching elements 12 and snubber circuits 14 may be appropriately set according to the required withstand voltage.

The multiple semiconductor switching elements 12 have a first main terminal 12a, a second main terminal 12b, and a control terminal 12c. In a pair of adjacent semiconductor switching elements 12 , the second main terminal 12 b of one semiconductor switching element 12 is electrically connected to the first main terminal 12 a of the next semiconductor switching element 12 . Thereby, a pair of adjacent semiconductor switching elements 12 are connected in series. The control terminal 12c is used to switch the semiconductor switching element 12 between on and off.

Self-excited semiconductor switching elements such as IEGTs (Injection Enhanced Gate Transistors) and IGBTs (Insulated Gate Bipolar Transistors) are used for the plurality of semiconductor switching elements 12 . For example, if the semiconductor switching element 12 is an IEGT, the first main terminal 12a is the collector, the second main terminal 12b is the emitter, and the control terminal 12c is the gate.

In addition, pressure contact type semiconductor switching elements, for example, are used for the plurality of semiconductor switching elements 12 . In this case, the semiconductor switching element 12 is substantially disc-shaped, and has a first main terminal 12a on one end face and a second main terminal 12b on the opposite end face to the first main terminal 12a.

As shown in FIG. 2B, a plurality of press-contact type semiconductor switching elements 12 are stacked in a direction perpendicular to the end surfaces on which the first main terminals 12a and the second main terminals 12b are provided. . The predetermined direction in which the plurality of semiconductor switching elements 12 are arranged is, for example, the stacking direction of the plurality of semiconductor switching elements 12 .

However, the plurality of semiconductor switching elements 12 are not limited to the pressure contact type, and may be semiconductor switching elements in a module type package, for example. Moreover, the plurality of semiconductor switching elements 12 are not limited to IEGTs and IGBTs. The plurality of semiconductor switching elements 12 may be appropriately selected according to the application of the semiconductor switching unit 10 and the required withstand voltage. The plurality of semiconductor switching elements 12 may be arbitrary self-excited semiconductor switching elements arranged in a predetermined direction and connected in series. In the following, a case where the plurality of semiconductor switching elements 12 are pressure contact type will be described as an example.

The semiconductor switching unit 10 further includes, for example, a plurality of heat sinks 20, a pair of insulating members 22, an elastic member 24, and a pair of supports 26,28.

Each of the plurality of semiconductor switching elements 12 is provided between each of the plurality of radiator plates 20 . A metal material such as aluminum or copper is used for the heat sink 20 . The heat sink 20 has electrical conductivity. A plurality of semiconductor switching elements 12 are connected in series via a plurality of radiator plates 20 . The radiator plate 20 may be called, for example, a cooling fin or a heat sink.

One of the pair of insulating members 22 is provided on one end side of the laminate of the plurality of semiconductor switching elements 12 and the plurality of radiator plates 20 . The other of the pair of insulating members 22 is provided on the other end side of the laminate of the plurality of semiconductor switching elements 12 and the plurality of heat sinks 20 . In other words, the laminate of the plurality of semiconductor switching elements 12 and the plurality of heat sinks 20 is provided between the pair of insulating members 22 .

A pair of supports 26 and 28 support a laminate of a plurality of semiconductor switching elements 12 , a plurality of radiator plates 20 and a pair of insulating members 22 . A support 26 supports one end side of the laminate. A support 28 supports the other end side of the laminate. That is, a pair of insulating members 22 are provided between a pair of supports 26 and 28 , and a laminate of a plurality of semiconductor switching elements 12 and a plurality of heat sinks 20 is provided between the pair of insulating members 22 .

The elastic member 24 is provided between one insulating member 22 and the support 26 . The elastic member 24 is, for example, a spring. The elastic member 24 suppresses a change in pressure contact force due to thermal contraction of the laminate of the plurality of semiconductor switching elements 12, the plurality of heat sinks 20, and the pair of insulating members 22, and applies a constant pressure contact force to the laminate. make it

Each of the multiple snubber circuits 14 has a resistive element 40 , a capacitor 42 and a diode 44 . A capacitor 42 and a diode 44 are connected in series between the first main terminal 12 a and the second main terminal 12 b of the semiconductor switching element 12 . That is, the capacitor 42 and the diode 44 are connected in series with each other and connected in parallel with the semiconductor switching element 12 . Resistive element 40 is connected in parallel with diode 44 .

Also, each of the plurality of snubber circuits 14 has a snubber inductance 46 . The snubber inductance 46 is not an actual element but a parasitic inductance caused by wiring or the like.

In this example, snubber circuit 14 is a so-called RCD snubber circuit. However, the snubber circuit 14 is not limited to the RCD snubber circuit, and may be an RC snubber circuit or the like. The snubber circuit 14 may be any circuit capable of suppressing transient voltage fluctuations accompanying switching of the semiconductor switching element 12 . In the following description, the snubber circuit 14 is assumed to be an RCD snubber circuit.

For the diode 44, for example, a press-fit type diode similar to the semiconductor switching element 12 is used. In this case, the diode 44 is substantially disc-shaped, has an anode on one end face, and a cathode on the end face opposite to the anode.

As with the semiconductor switching element 12, the press-fit type diode 44 is stacked and used. As shown in FIG. 2B, the press-fit diode 44 is stacked adjacent to the semiconductor switching element 12 . Also, as shown in FIG. 2A, the resistance element 40 and the capacitor 42 are arranged adjacent to the semiconductor switching element 12 and the diode 44 and electrically connected via wiring members such as bus bars. Thus, snubber circuit 14 is provided adjacent to semiconductor switching element 12 . The semiconductor switching unit 10 is configured, for example, by stacking a plurality of modules in which the semiconductor switching elements 12 and the snubber circuits 14 are arranged adjacent to each other and wired as one module.

The semiconductor switching unit 10 further includes, for example, a plurality of radiator plates 50, a plurality of insulating members 52, a pair of insulating members 54, and an elastic member 56.

Each diode 44 of the plurality of snubber circuits 14 is provided between each of the plurality of heat sinks 50 . For the heat sink 50, for example, the same material as the heat sink 20 can be used.

In the case of the semiconductor switching elements 12 , one heat sink 20 is commonly used for two semiconductor switching elements 12 , and a plurality of semiconductor switching elements 12 are connected in series via the heat sink 20 . On the other hand, in the case of the diodes 44, it is necessary to prevent two diodes 44 from being connected in series. Therefore, in the case of the diode 44, the diode 44 is provided between the two heat sinks 50, and the insulating member 52 is provided between the stacks of the two heat sinks 50 and the diodes 44. .

One of the pair of insulating members 54 is provided on one end side of the laminate of the plurality of diodes 44 , the plurality of radiator plates 50 and the plurality of insulating members 52 . The other of the pair of insulating members 54 is provided on the other end side of the laminate of the plurality of diodes 44 , the plurality of radiator plates 50 and the plurality of insulating members 52 . In other words, the laminate of the plurality of diodes 44 , the plurality of radiator plates 50 and the plurality of insulating members 52 is provided between the pair of insulating members 54 .

A laminate of a plurality of diodes 44 , a plurality of heat sinks 50 , a plurality of insulating members 52 and a pair of insulating members 54 is supported by a pair of supports 26 and 28 . A laminate of the plurality of diodes 44, the plurality of heat sinks 50, the plurality of insulating members 52, and the pair of insulating members 54 may be supported by a support other than the pair of supports 26 and 28, for example. .

The elastic member 56 is provided between one insulating member 54 and the support 26 . The elastic member 56, like the elastic member 24, suppresses changes in the pressure contact force of the laminate.

As shown in FIG. 1, among the four modules composed of the semiconductor switching element 12 and the snubber circuit 14, the first module (the uppermost module in FIG. 1) connected to the first terminal 11a has , the anode of a diode 44 is connected to the first main terminal 12 a of the semiconductor switching element 12 , the cathode of the diode 44 is connected to one terminal of a capacitor 42 , and the other terminal of the capacitor 42 is connected to the second main terminal 12 a of the semiconductor switching element 12 . It is connected to the terminal 12b. The first-tier module is, for example, the uppermost module in FIG. 2(b).

On the other hand, in the second stage module immediately below the first stage module, the first main terminal 12a of the semiconductor switching element 12 is connected to one terminal of the capacitor 42, and the other terminal of the capacitor 42 is connected to the anode of the diode 44. , and the cathode of the diode 44 is connected to the second main terminal 12 b of the semiconductor switching element 12 .

The modules in the third stage are configured in the same manner as the modules in the first stage. The modules in the fourth stage are configured in the same manner as the modules in the second stage.

3A and 3B are explanatory diagrams schematically showing an example of the operation of the semiconductor switching unit according to the first embodiment. FIG.
FIG. 3(a) schematically shows an example of the operation of the first-stage and third-stage modules of the semiconductor switching unit 10. FIG. FIG. 3(b) schematically shows an example of the operation of the second-stage and fourth-stage modules of the semiconductor switching unit 10. As shown in FIG.

As shown in FIG. 3A, in the first- and third-stage modules, when the semiconductor switching element 12 is turned off, the current commutating to the snubber circuit 14 flows from the diode 44 to the capacitor 42 in this order. . For this reason, in this example, the current commutated to the snubber circuit 14 is a loop-shaped current in the counterclockwise direction around the predetermined direction (stacking direction) in which the plurality of snubber circuits 14 are arranged.

On the other hand, as shown in FIG. 3B, in the second and fourth stage modules, when the semiconductor switching element 12 is turned off, the current commutated to the snubber circuit 14 flows from the capacitor 42 to the diode 44. flow in order. For this reason, in this example, the current commutated to the snubber circuit 14 is a loop-shaped current that rotates clockwise of the predetermined direction in which the plurality of snubber circuits 14 are arranged.

As described above, in the semiconductor switching unit 10, when the plurality of snubber circuits 14 turn off the plurality of semiconductor switching elements 12, a loop-shaped current flows around an axis with a predetermined direction as the axis, and the currents are adjacent to each other. Between the pair of snubber circuits 14, wiring is made so that the directions of loop-shaped currents are opposite to each other.

FIG. 4 is a graph diagram schematically showing an example of characteristics of a semiconductor switching unit.
FIG. 4 shows the characteristics CT of the current flowing between the first main terminal 12a and the second main terminal 12b of the semiconductor switching elements 12 when the plurality of semiconductor switching elements 12 are turned off, and the characteristics CT of the current flowing between the first main terminal 12a and the second main terminal 12b. An example of the characteristic VT of the voltage applied between the two main terminals 12b is schematically represented.

As shown in FIG. 4 , when the plurality of semiconductor switching elements 12 are turned off to cut off the current, a surge voltage Vdsp may occur when the current is commutated to the snubber circuit 14 . As shown in FIG. 4, if a large surge voltage Vdsp occurs before the current flowing between the first main terminal 12a and the second main terminal 12b of the semiconductor switching element 12 is completely interrupted, the semiconductor switching element 12 may be damaged.

（１）式において、Ｖｆｒは、スナバ回路１４のダイオード４４の過渡オン電圧である。Ｌｓｎｂは、スナバインダクタンス４６である。Ｌｓｎｂ・ｄｉ／ｄｔは、スナバインダクタンス４６に流れる電流変化により発生する誘導起電力を表す。Ｃは、スナバ回路１４のコンデンサ４２の静電容量である。１／Ｃ∫ｉｄｔは、コンデンサ４２に充電される電圧を表す。すなわち、サージ電圧Ｖｄｓｐは、ダイオード４４の過渡オン電圧と、スナバインダクタンス４６に流れる電流変化により発生する誘導起電力と、コンデンサ４２に充電される電圧と、の和で表すことができる。 The surge voltage Vdsp can be expressed by the following equation (1).

In equation (1), Vfr is the transient ON voltage of diode 44 of snubber circuit 14 . Lsnb is the snubber inductance 46; Lsnb·di/dt represents an induced electromotive force generated by a change in current flowing through the snubber inductance 46 . C is the capacitance of the capacitor 42 of the snubber circuit 14; 1/C∫idt represents the voltage with which the capacitor 42 is charged. That is, the surge voltage Vdsp can be represented by the sum of the transient ON voltage of the diode 44, the induced electromotive force generated by the change in the current flowing through the snubber inductance 46, and the voltage charged in the capacitor 42.

As a result of intensive studies, the inventors of the present application have found that the induced electromotive force generated by the snubber inductance 46 has a greater influence among the three elements of the equation (1). In particular, when the semiconductor switching unit 10 is used in a power conversion device or circuit breaker to interrupt a relatively large current, the change in the current flowing through the snubber inductance 46 tends to increase when the current is interrupted. Therefore, reducing the snubber inductance 46 is effective in suppressing the surge voltage Vdsp. Thus, the inventors of the present application have found that the surge voltage Vdsp can be effectively suppressed by reducing the snubber inductance 46 .

When stacking a plurality of modules each having the semiconductor switching elements 12 and the snubber circuits 14 to form the semiconductor switching unit 10 , mutual inductance affects adjacent snubber circuits 14 . At this time, if all the modules are wired in the same way so that loop-shaped currents flow in the same direction in all of the snubber circuits 14, the mutual inductance acts in a sum dynamic manner, and the mutual inductance is added to the self-inductance. be done. Therefore, the surge voltage Vdsp at the time of interruption appears large, and the current that can be interrupted becomes small.

On the other hand, in the semiconductor switching unit 10 according to the present embodiment, when the plurality of snubber circuits 14 turn off the plurality of semiconductor switching elements 12, a loop-shaped current flows around the axis with the predetermined direction as the axis. In addition, between a pair of snubber circuits 14 adjacent to each other, wiring is performed so that the directions of the loop-shaped currents are opposite to each other.

As a result, the mutual inductance can act differentially between adjacent snubber circuits 14 . For example, magnetic fluxes can be canceled between adjacent snubber circuits 14 . As a result, the combined inductance of self-inductance and mutual inductance can be reduced. It is possible to reduce the induced electromotive force generated by the snubber inductance 46 in the above equation (1) and reduce the surge voltage Vdsp at the time of interruption. Therefore, it is possible to provide the semiconductor switching unit 10 that suppresses the surge voltage Vdsp that occurs when the current is interrupted and that can increase the current that can be interrupted.

(Second embodiment)
5(a) and 5(b) are a plan view and a side view schematically showing a semiconductor switching unit according to the second embodiment.
More specifically, FIG. 5B is a side view of the plan view of FIG. It should be noted that the same reference numerals are given to the components that are substantially the same in terms of function and configuration as those of the first embodiment, and detailed description thereof will be omitted.

As shown in FIGS. 5(a) and 5(b), the semiconductor switching unit 10a further includes a plurality of shielding plates 16. As shown in FIG. A plurality of shielding plates 16 are provided between each of the plurality of snubber circuits 14 to suppress magnetic coupling between a pair of snubber circuits 14 adjacent to each other.

Each shielding plate 16 is provided, for example, between a pair of capacitors 42 adjacent to each other. The plurality of shielding plates 16 and the plurality of capacitors 42 are supported by a pair of supports 26 and 28 via support members (not shown), for example. The plurality of shielding plates 16 and the plurality of capacitors 42 may be supported by members other than the pair of supports 26 and 28 .

One terminal of the capacitor 42 is connected to the semiconductor switching element 12 via a wiring member 42a. The other terminal of capacitor 42 is connected to diode 44 via wiring member 42b. Although illustration is simplified in FIG. 5, the wiring members 42a and 42b are plate-like members called busbars, for example. However, the wiring members 42a and 42b may be, for example, wiring cables.

Each shield plate 16 is also provided, for example, between a pair of wiring members 42a and between a pair of wiring members 42b of a pair of snubber circuits 14 adjacent to each other. In other words, each shield plate 16 extends between a pair of capacitors 42, and also between a pair of wiring members 42a and a pair of wiring members 42b.

However, the position where each shielding plate 16 is provided is not limited to the above. The position where each shield plate 16 is provided may be any position between a pair of snubber circuits 14 adjacent to each other. The position where each shield plate 16 is provided may be any position that can appropriately suppress magnetic coupling between a pair of snubber circuits 14 adjacent to each other. For example, if the diodes 44 are not pressure-contact type, each shielding plate 16 may be provided between a pair of adjacent diodes 44 .

Each shield plate 16 may be provided between at least a portion of a pair of snubber circuits 14 adjacent to each other. For example, by providing the shielding plates 16 between the pair of wiring members 42a and between the pair of wiring members 42b as described above, the magnetic coupling between the pair of snubber circuits 14 adjacent to each other can be made more appropriate. can be suppressed to

A metal material such as copper or aluminum is used for the plurality of shielding plates 16, for example. However, the material of the plurality of shielding plates 16 is not limited to metal material, and may be any material capable of suppressing magnetic coupling between a pair of adjacent snubber circuits 14 . The multiple shielding plates 16 are, for example, conductive. The potentials of the plurality of shielding plates 16 are set to, for example, floating. The potentials of the plurality of shielding plates 16 may be set to ground (common potential), for example. Thereby, for example, magnetic coupling between a pair of adjacent snubber circuits 14 can be suppressed more appropriately.

As described above, the semiconductor switching unit 10a according to the present embodiment is provided between each of the plurality of snubber circuits 14 and suppresses magnetic coupling between a pair of snubber circuits 14 adjacent to each other. A shielding plate 16 is provided.

As a result, the magnetic flux due to the current flowing through the snubber circuit 14 can be prevented from interlinking with the adjacent loops of the snubber circuit 14 . Therefore, the combined inductance of self-inductance and mutual inductance can be reduced as in the first embodiment. It is possible to reduce the induced electromotive force generated by the snubber inductance 46 in the above equation (1) and reduce the surge voltage Vdsp at the time of interruption. Therefore, it is possible to provide the semiconductor switching unit 10a that suppresses the surge voltage Vdsp that occurs when the current is interrupted and that can increase the current that can be interrupted.

When a plurality of shielding plates 16 are provided, the plurality of snubber circuits 14 may be wired so that the directions of loop-shaped currents alternate as in the first embodiment. The snubber circuits 14 may be wired so that the directions of the loop-shaped currents are the same.

(Third embodiment)
FIG. 6 is a plan view schematically showing a semiconductor switching unit according to the third embodiment.
As shown in FIG. 6, in the semiconductor switching unit 10b, the multiple snubber circuits 14 have a pair of wiring cables 60, 62 for parallel connection with the semiconductor switching elements 12. As shown in FIG.

A wiring cable 60 connects one terminal of the capacitor 42 and the semiconductor switching element 12 . A wiring cable 62 connects the other terminal of the capacitor 42 and the diode 44 . A pair of distribution cables 60, 62 are twisted.

Thus, in the semiconductor switching unit 10b according to this embodiment, the wiring cables 60 and 62, which are part of the wiring of the snubber circuit 14, are twisted. As a result, the magnetic flux due to the current flowing through the snubber circuit 14 can be prevented from interlinking with the adjacent loops of the snubber circuit 14 . Therefore, as in the first and second embodiments, it is possible to reduce the combined inductance of the self-inductance and the mutual inductance. It is possible to reduce the induced electromotive force generated by the snubber inductance 46 in the above equation (1) and reduce the surge voltage Vdsp at the time of interruption. Therefore, it is possible to provide the semiconductor switching unit 10b that suppresses the surge voltage Vdsp that occurs when the current is interrupted and that can increase the current that can be interrupted.

In this example, a wiring cable 60 connecting one terminal of the capacitor 42 and the semiconductor switching element 12 and a wiring cable 62 connecting the other terminal of the capacitor 42 and the diode 44 are shown. The pair of twisted wiring cables is not limited to the wiring cables for wiring the sections described above, but may be wiring for any section for parallel connection of the snubber circuit 14 to the semiconductor switching element 12 .

At least two distribution cables may be twisted, and three or more distribution cables may be twisted.

FIG. 7 is a plan view schematically showing a modification of the semiconductor switching unit according to the third embodiment.
As shown in FIG. 7, the semiconductor switching unit 10c includes a plurality of shielding plates 16, and a plurality of snubber circuits 14 having a pair of twisted distribution cables 60, 62. As shown in FIG.

In this manner, the configuration of the second embodiment and the configuration of the third embodiment may be combined to provide a plurality of shielding plates 16 and part of the wiring of the plurality of snubber circuits 14 may be twisted. This makes it possible to more reliably suppress the surge voltage Vdsp that occurs when the current is interrupted. It is possible to provide a semiconductor switching unit 10c capable of increasing the interruptable current.

In the semiconductor switching unit 10c, a plurality of shielding plates 16 are provided, for example, between a pair of wiring cables 60, 62 of a pair of snubber circuits 14 adjacent to each other. Thereby, the magnetic coupling between the pair of snubber circuits 14 adjacent to each other can be suppressed more appropriately.

While several embodiments of the invention have been described, these embodiments have been presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and modifications can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the scope of the invention described in the claims and equivalents thereof.

Reference Signs List 10, 10a, 10b, 10c semiconductor switching unit 12 semiconductor switching element 14 snubber circuit 16 shield plate 20 heat sink 22 insulating member 24 elastic member 26 support 28 support 40 resistance element 42 capacitor , 44 diode, 46 snubber inductance, 50 heat sink, 52 insulating member, 54 insulating member, 56 elastic member, 60, 62 wiring cable

Claims (3)

a plurality of semiconductor switching elements stacked in a predetermined direction and connected in series;
a plurality of snubber circuits provided adjacent to each of the plurality of semiconductor switching elements and stacked in the predetermined direction and connected in parallel to each of the plurality of semiconductor switching elements;
with
When the plurality of semiconductor switching elements are turned off, the plurality of snubber circuits pass a loop-shaped current about the predetermined direction in which the plurality of snubber circuits are stacked, and the predetermined A semiconductor switching unit in which a pair of snubber circuits adjacent to each other in direction are wired so that the direction of the loop-shaped current is opposite. 2. The semiconductor switching unit according to claim 1, further comprising a plurality of shielding plates provided between each of said plurality of snubber circuits for suppressing magnetic coupling between a pair of said snubber circuits adjacent to each other. The plurality of snubber circuits have a pair of wiring cables for parallel connection with the semiconductor switching elements,
3. The semiconductor switching unit according to claim 1 , wherein said pair of distribution cables are twisted.

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