JP7170861B2 - Nmosトランジスタを使用するldoレギュレータ - Google Patents
Nmosトランジスタを使用するldoレギュレータ Download PDFInfo
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- JP7170861B2 JP7170861B2 JP2021519629A JP2021519629A JP7170861B2 JP 7170861 B2 JP7170861 B2 JP 7170861B2 JP 2021519629 A JP2021519629 A JP 2021519629A JP 2021519629 A JP2021519629 A JP 2021519629A JP 7170861 B2 JP7170861 B2 JP 7170861B2
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- nmos transistor
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/12—Regulating voltage or current wherein the variable actually regulated by the final control device is ac
- G05F1/40—Regulating voltage or current wherein the variable actually regulated by the final control device is ac using discharge tubes or semiconductor devices as final control devices
- G05F1/44—Regulating voltage or current wherein the variable actually regulated by the final control device is ac using discharge tubes or semiconductor devices as final control devices semiconductor devices only
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/461—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using an operational amplifier as final control device
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- Engineering & Computer Science (AREA)
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- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Power Engineering (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
- Amplifiers (AREA)
- Semiconductor Lasers (AREA)
Description
Claims (7)
- 低ドロップアウト(LDO)レギュレータであって、
入力電圧を受けて出力電圧を生成するためのNMOSトランジスタと、
前記出力電圧のレベルに従ってフィードバック信号を生成するための、前記NMOSトランジスタに結合された抵抗ラダーと、
前記フィードバック信号を前記抵抗ラダーから受信して制御信号を生成するための、前記抵抗ラダーに結合されたエラー増幅器と、
前記制御信号をブーストして前記NMOSトランジスタを制御して前記出力電圧を目標レベルに引っ張るための、前記NMOSトランジスタと前記エラー増幅器との間に結合されたゲートブースト回路と、を備え、
前記ゲートブースト回路が、
前記制御信号を調整信号によってブーストして前記NMOSトランジスタを制御するためのポンピング回路と、
寄生容量を前記エラー増幅器の出力端子から絶縁するための、前記ポンピング回路に結合された絶縁回路と、を備える、低ドロップアウト(LDO)レギュレータ。 - 前記NMOSトランジスタが、ゼロボルト閾値電圧トランジスタである、請求項1に記載のLDOレギュレータ。
- 前記NMOSトランジスタが、
電圧源から前記入力電圧を受けるための第1の端子と、
前記出力電圧を出力するための第2の端子と、
前記ブーストされた制御信号を前記ゲートブースト回路から受信するための制御端子と、を備える、請求項1に記載のLDOレギュレータ。 - 前記ポンピング回路が、
第1のユニティゲインバッファと、
第1のコンデンサユニットと、
前記第1のユニティゲインバッファと前記第1のコンデンサユニットの第1の端子との間に結合された第1のスイッチと、
前記第1のコンデンサユニットの第2の端子と接地端子との間に結合された第2のスイッチと、
第2のユニティゲインバッファと前記第1のコンデンサユニットの前記第2の端子との間に結合された第3のスイッチと、を備え、
前記絶縁回路が、
前記第2のユニティゲインバッファと、
第2のコンデンサユニットと、
前記第1のコンデンサユニットの前記第1の端子と前記第2のコンデンサユニットの第1の端子との間に結合された第4のスイッチと、
前記第1のコンデンサユニットの前記第2の端子と前記第2のコンデンサユニットの第2の端子との間に結合された第5のスイッチと、を備える、請求項1に記載のLDOレギュレータ。 - 前記第1のユニティゲインバッファが、前記調整信号を生成するように構成され、前記スイッチのすべてが、前記NMOSトランジスタを制御するために前記調整信号によって前記制御信号をブーストするように構成される、請求項4に記載のLDOレギュレータ。
- 前記NMOSトランジスタの制御端子に結合されたデカップリングコンデンサをさらに備える、請求項1に記載のLDOレギュレータ。
- 低ドロップアウト(LDO)レギュレータであって、
入力電圧を受けて出力電圧を生成するためのNMOSトランジスタと、
前記出力電圧のレベルに従ってフィードバック信号を生成するための、前記NMOSトランジスタに結合された抵抗ラダーと、
前記フィードバック信号を前記抵抗ラダーから受信して制御信号を生成するための、前記抵抗ラダーに結合されたエラー増幅器と、
前記制御信号をブーストして前記NMOSトランジスタを制御して前記出力電圧を目標レベルに引っ張るための、前記NMOSトランジスタと前記エラー増幅器との間に結合されたゲートブースト回路と、を備え、
前記NMOSトランジスタの制御端子に結合されたプリチャージ回路をさらに備え、
前記プリチャージ回路が、
制御経路であって、前記制御経路がオンにされたときに基準電圧を受けるための制御経路と、
前記基準電圧にほぼ等しい電圧レベルまで前記NMOSトランジスタの前記制御端子をプリチャージするための、前記制御経路に結合された充電トランジスタと、を備える、LDOレギュレータ。
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PCT/CN2018/110037 WO2020073313A1 (en) | 2018-10-12 | 2018-10-12 | Ldo regulator using nmos transistor |
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JP7170861B2 true JP7170861B2 (ja) | 2022-11-14 |
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US (1) | US10423178B1 (ja) |
EP (1) | EP3821523B1 (ja) |
JP (1) | JP7170861B2 (ja) |
KR (1) | KR102442392B1 (ja) |
CN (1) | CN109416553B (ja) |
TW (1) | TWI672573B (ja) |
WO (1) | WO2020073313A1 (ja) |
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CN114020086B (zh) * | 2021-11-11 | 2023-05-23 | 无锡迈尔斯通集成电路有限公司 | 一种随输入电压线性变化的ldo限流电路 |
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- 2018-10-12 EP EP18936676.8A patent/EP3821523B1/en active Active
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Also Published As
Publication number | Publication date |
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CN109416553A (zh) | 2019-03-01 |
US10423178B1 (en) | 2019-09-24 |
KR102442392B1 (ko) | 2022-09-08 |
JP2022504556A (ja) | 2022-01-13 |
EP3821523B1 (en) | 2023-06-14 |
TWI672573B (zh) | 2019-09-21 |
WO2020073313A1 (en) | 2020-04-16 |
TW202014828A (zh) | 2020-04-16 |
KR20210022105A (ko) | 2021-03-02 |
EP3821523A1 (en) | 2021-05-19 |
CN109416553B (zh) | 2019-11-08 |
EP3821523A4 (en) | 2021-08-25 |
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