JP7111140B2 - semiconductor equipment - Google Patents

Description

The disclosure in this specification relates to semiconductor devices.

Patent Literature 1 discloses a Ni ball that ensures solder thickness. The contents of the prior art documents are incorporated by reference as descriptions of technical elements in this specification.

Japanese Patent No. 5510623

Ni balls are limited in application. For example, in the case of solder die bonding, Ni balls are not a little melted in a solder melting furnace. Therefore, there is a possibility that the minimum guaranteed thickness of the solder (joining member) cannot be ensured. In view of the above or in other aspects not mentioned, semiconductor devices are desired to be further improved.

One object of the disclosure is to provide a highly reliable semiconductor device.

The semiconductor device disclosed herein includes, as main electrodes, a front electrode (31) formed on the front surface and a rear electrode (32) formed on the rear surface opposite to the front surface in the plate thickness direction and having a larger area than the front electrode. ), a bonding member interposed between the first opposing surface and the second opposing surface to form a bonding portion, and electrically connected to the main electrode via the bonding member. and a plurality of wire pieces (90) arranged in the joining member, fixed to the first opposing surface and protruding from the first opposing surface, the wiring member being arranged on the back surface side and a back side wiring member (40) connected to the electrode, the joint member forming a joint between the back electrode and the back side wiring member, and comprising a back side joint member (80) in which a plurality of wire pieces are arranged; The bonding member includes a central region (80a) that overlaps with the central portion of the semiconductor element including the element center and a portion that overlaps with the outer peripheral portion of the semiconductor element surrounding the central portion in plan view in the plate thickness direction, and has an outer circumference surrounding the central region. and a region (80b), in which four or more wire pieces are arranged corresponding to at least four corners of the semiconductor element in the outer peripheral region, and at least one of the wire pieces is oriented toward the center of the element in plan view. extended. In one semiconductor device, the wire piece is fixed to the wiring member at the junction between the main electrode and the wiring member, and is provided on the side facing the main electrode in the plate thickness direction parallel to the fixing surface of the wiring member. It has a flat portion (92), and on the side facing the wiring member in the plate thickness direction, a fixed portion (91) with the wiring member, and a non-fixed portion that is a portion that is connected to the fixed portion and is not fixed to the wiring member. (93). In another semiconductor device, the wire piece is fixed to the wiring member at the junction between the main electrode and the wiring member, the volume of each wire piece is 1.0×10 ⁷ μm ³ or less, and the wire The piece includes a joint portion (94) that is a portion joined to the wiring member, and a non-joint portion that is a portion that is connected to the joint portion and provided at each end in the extending direction of the wire piece and is not joined to the wiring member. (95, 96) and In another semiconductor device, the central region has three or more wire pieces arranged to surround the center of the device. In another semiconductor device, the wiring members include front wiring members (50, 55) arranged on the front surface side and electrically connected to the surface electrodes, and the joining member is a connection member between the front electrodes and the front wiring members. The semiconductor element includes a front side bonding member (81) forming a bonding portion and having a plurality of wire pieces arranged thereon, the semiconductor element having a gate pad (33g) formed on the surface side and a gate formed on the surface side and connected to the gate pad. a wire (34) and a gate wire protection portion (35) which is a part of a protective film formed on the surface and protects the gate wire; placed in a non-overlapping position. In another semiconductor device, the wiring members include front wiring members (50, 55) arranged on the front surface side and electrically connected to the surface electrodes, and the joining member is a connection member between the front electrodes and the front wiring members. It includes a front side joint member (81) forming a joint and having a plurality of wire pieces arranged thereon, the wire pieces in the front side joint member being arranged so as not to overlap the wire pieces in the back side joint member. In another semiconductor device, the wiring members include front wiring members (50, 55) arranged on the front surface side and electrically connected to the surface electrodes, and the joining member is a connection member between the front electrodes and the front wiring members. A front side joint member (81) forming a joint portion and having a plurality of wire pieces arranged therein is included, and the front side wiring member is connected to a first wiring member (55) and a surface electrode via the first wiring member. a second wiring member (50), wherein the bonding members include a first bonding member (81) which is a front side bonding member, the second wiring member, and the first wiring member as bonding members arranged on the front side; and a second joint member (82) having a plurality of wire pieces arranged thereon, the number of wire pieces being different from each other in the back joint member, the first joint member and the second joint member. , the back side joint member is the most and the second joint member is the least.

According to the disclosed semiconductor device, the wire piece is fixed to the first opposing surface. The wire piece protruding from the first opposing surface can ensure the thickness of the joining member. Even if the semiconductor element having the main electrodes on both sides is warped, the wire piece provided in the outer peripheral region can ensure the thickness of the joining member. Also, the wire pieces extending toward the center of the element are less likely to block the flow of the solder when it spreads. As described above, a highly reliable semiconductor device can be provided.

The multiple aspects disclosed in this specification employ different technical means to achieve their respective objectives. Reference numerals in parentheses described in the claims and this section are intended to exemplify the correspondence with portions of the embodiments described later, and are not intended to limit the technical scope. Objects, features, and advantages disclosed in this specification will become clearer with reference to the following detailed description and accompanying drawings.

1 is a circuit diagram of a power conversion device to which a semiconductor device according to a first embodiment is applied; FIG. 1 is a plan view of a semiconductor device; FIG. 3 is a cross-sectional view taken along line III-III of FIG. 2; FIG. 3 is a cross-sectional view taken along line IV-IV of FIG. 2; FIG. FIG. 3 is a plan view omitting a sealing resin body; FIG. 3 is a plan view omitting a heat sink on the emitter electrode side; FIG. 4 is a plan view showing the positional relationship between the semiconductor element and the wire piece; FIG. 4 is a perspective view showing the arrangement of wire pieces; FIG. 8 is a cross-sectional view taken along line IX-IX of FIG. 7; It is a perspective view which shows the warp of a semiconductor element, and the effect of a wire piece. FIG. 10 is a plan view showing the height of wire pieces in the semiconductor device according to the second embodiment; FIG. 11 is a plan view showing the positional relationship between a semiconductor element and wire pieces in a semiconductor device according to a third embodiment; 13 is a cross-sectional view taken along line XIII-XIII of FIG. 12; FIG. FIG. 4 is a cross-sectional view when the semiconductor element is arranged in a tilted manner; FIG. 11 is a plan view showing the arrangement of wire pieces in a semiconductor device according to a fourth embodiment; It is a top view which shows a modification. FIG. 20 is a plan view showing the positional relationship between the semiconductor element and the wire piece in the semiconductor device according to the fifth embodiment; FIG. 4 is a plan view showing the arrangement of wire pieces; 18 is a cross-sectional view along line XIX-XIX of FIG. 17; FIG. It is a top view which shows a modification. FIG. 20 is a plan view showing the positional relationship between the semiconductor element and the wire pieces in the semiconductor device according to the sixth embodiment; FIG. 4 is a schematic cross-sectional view showing the influence of the positional relationship of wire pieces in the vertical direction; FIG. 21 is a schematic cross-sectional view showing a laminated structure of one arm in a semiconductor device according to a seventh embodiment; FIG. 4 is a plan view showing the arrangement of wire pieces in each solder; FIG. 20 is a diagram showing the difference in terminals between the semiconductor device according to the eighth embodiment and the comparative example; FIG. 21 is a perspective view showing an example of a connection structure between a semiconductor element and a heat sink in a semiconductor device according to a ninth embodiment; FIG. 27 is a cross-sectional view along line XXVII-XXVII of FIG. 26; It is a perspective view which shows a wire piece. FIG. 10 is a cross-sectional view showing another example of the wire piece; It is sectional drawing which shows the manufacturing method of a semiconductor device. It is sectional drawing which shows the manufacturing method of a semiconductor device. It is sectional drawing which shows the manufacturing method of a semiconductor device. It is sectional drawing which shows the manufacturing method of a semiconductor device. It is sectional drawing which shows the manufacturing method of a semiconductor device. FIG. 4 is a cross-sectional view showing an example of a warp-free semiconductor element; FIG. 10 is a cross-sectional view showing an example of a semiconductor element warped upwardly; FIG. 10 is a cross-sectional view showing an example of a semiconductor element with a downward convex warp; FIG. 5 is a cross-sectional view showing the effect of having flat portions on both ends; It is a sectional view showing another example of a semiconductor device. FIG. 11 is a simulation result showing the relationship between the volume of a wire piece and solder strain in the semiconductor device according to the tenth embodiment; FIG. It is a figure which shows the structure of a wire piece. FIG. 5 is a cross-sectional view for explaining the height of wire pieces between a collector electrode and a heat sink; FIG. 4 is a cross-sectional view for explaining the height of a wire piece between an emitter electrode and a terminal; It is sectional drawing which shows the manufacturing method of a wire piece. It is sectional drawing which shows the manufacturing method of a wire piece. It is sectional drawing which shows the manufacturing method of a wire piece. It is sectional drawing which shows the manufacturing method of a wire piece. It is sectional drawing which shows the manufacturing method of a wire piece.

A plurality of embodiments will be described below based on the drawings. In several embodiments, functionally and/or structurally corresponding and/or related parts may be labeled with the same reference numerals. For corresponding and/or associated parts, reference can be made to the description of other embodiments.

(First embodiment)
First, based on FIG. 1, a power conversion device to which a semiconductor device is applied will be described.

<Power converter>
A power conversion device 1 shown in FIG. 1 is mounted, for example, in an electric vehicle or a hybrid vehicle. The power converter 1 performs power conversion between a DC power supply 2 and a motor generator 3 . The power converter 1 configures a vehicle drive system together with the DC power supply 2 and the motor generator 3 .

The DC power supply 2 is a chargeable/dischargeable secondary battery such as a lithium ion battery or a nickel hydrogen battery. The motor generator 3 is a three-phase alternating-current rotating electric machine. The motor generator 3 functions as a vehicle drive source, that is, as an electric motor. The motor generator 3 functions as a generator during regeneration.

The power conversion device 1 includes a smoothing capacitor 4 and an inverter 5 that is a power converter. The positive terminal of the smoothing capacitor 4 is connected to the positive electrode of the DC power supply 2 on the high potential side, and the negative terminal of the smoothing capacitor 4 is connected to the negative electrode of the DC power supply 2 on the low potential side. Inverter 5 converts the input DC power into three-phase AC power of a predetermined frequency and outputs the same to motor generator 3 . Inverter 5 converts AC power generated by motor generator 3 into DC power. The inverter 5 is a DC-AC converter.

The inverter 5 includes upper and lower arm circuits 6 for three phases. The upper and lower arm circuits 6 are sometimes called legs. In the upper and lower arm circuit 6 of each phase, two arms 6H and 6L are connected in series between a high potential power line 7 that is a power line on the positive side and a low potential power line 8 that is a power line on the negative side. It becomes In the upper and lower arm circuits 6 of each phase, a connection point between the upper arm 6H and the lower arm 6L is connected to an output line 9 to the motor generator 3. As shown in FIG.

In this embodiment, an n-channel insulated gate bipolar transistor 6i (hereinafter referred to as IGBT 6i) is employed as a switching element forming each arm. FWD 6d, which is a freewheeling diode, is connected in anti-parallel to each of the IGBTs 6i. The upper and lower arm circuits 6 for one phase have two IGBTs 6i. A collector electrode of the IGBT 6i is connected to the high potential power supply line 7 in the upper arm 6H. The emitter electrode of the IGBT 6i is connected to the low potential power supply line 8 in the lower arm 6L. The emitter electrode of the IGBT 6i on the upper arm 6H and the collector electrode of the IGBT 6i on the lower arm 6L are connected to each other.

In addition to the smoothing capacitor 4 and the inverter 5 described above, the power converter 1 includes a converter that is a power converter different from the inverter 5, a drive circuit for switching elements that constitute the inverter 5 and the converter, a filter capacitor, and the like. good too. A converter is a DC-DC converter that converts a DC voltage into DC voltages of different values. The converter is provided between the DC power supply 2 and the smoothing capacitor 4 . A filter capacitor is connected in parallel with the DC power supply 2 . The filter capacitor removes power noise from the DC power supply 2, for example.

<Semiconductor device>
Next, an example of a semiconductor device will be described with reference to FIGS. 2 to 6. FIG. 3 and 4 are cross-sectional views taken along lines III-III and IV-IV in FIG. FIG. 5 is a diagram in which a sealing resin body is omitted from FIG. FIG. 6 is a diagram in which the heat sink on the emitter electrode side is omitted from FIG. Some of the elements constituting the semiconductor device are suffixed with "H" indicating the upper arm 6H side and "L" indicating the lower arm 6L side. Other parts of the elements are given common reference numerals for the upper arm 6H and the lower arm 6L for convenience.

Hereinafter, the plate thickness direction of a semiconductor element is referred to as the Z direction, and one direction orthogonal to the Z direction, specifically, the direction in which two semiconductor elements are arranged is referred to as the X direction. A direction orthogonal to both the Z direction and the X direction is indicated as the Y direction. Unless otherwise specified, a planar shape is defined as a planar shape viewed from the Z direction, in other words, a planar shape along the XY plane defined by the X and Y directions. A plan view from the Z direction is simply referred to as a plan view.

As shown in FIGS. 2 to 6, the semiconductor device 10 includes a sealing resin body 20, a semiconductor element 30, a heat sink 40, a heat sink 50 and terminals 55, joint portions 60 to 62, and main terminals 70 to 72. and a signal terminal 75 . The semiconductor device 10 constitutes the upper and lower arm circuits 6 for one phase described above.

The encapsulating resin body 20 encapsulates a part of other elements constituting the semiconductor device 10 . The rest of the other elements are exposed outside the sealing resin body 20 . The encapsulating resin body 20 is made of, for example, an epoxy resin. The encapsulating resin body 20 is molded by, for example, a transfer molding method. As shown in FIGS. 2 to 4, the sealing resin body 20 has a substantially rectangular planar shape. The sealing resin body 20 has a front surface 20a and a back surface 20b opposite to the front surface 20a in the Z direction. The front surface 20a and the rear surface 20b are, for example, flat surfaces.

The semiconductor element 30 is formed on a semiconductor substrate made of silicon (Si), a wide bandgap semiconductor having a wider bandgap than silicon, or the like. Wide bandgap semiconductors include, for example, silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga ₂ O ₃ ), and diamond. The semiconductor element 30 is sometimes called a semiconductor chip.

The device has a vertical structure so that the main current flows in the Z direction. IGBTs, MOSFETs, diodes, and the like can be employed as vertical devices. In this embodiment, the IGBT 6i and the FWD 6d forming one arm are formed as vertical elements. The vertical element is RC (Reverse Conducting)-IGBT. The semiconductor element 30 has a gate electrode (not shown). The gate electrode has, for example, a trench structure. The semiconductor element 30 has main electrodes of the element on both sides in the plate thickness direction, that is, in the Z direction. Specifically, as main electrodes, it has an emitter electrode 31 on the front side and a collector electrode 32 on the back side. The emitter electrode 31 also serves as the anode electrode of the FWD 6d. The collector electrode 32 also serves as the cathode electrode of the FWD 6d. The emitter electrode 31 corresponds to the surface electrode, and the collector electrode 32 corresponds to the back electrode.

The semiconductor element 30 has a substantially rectangular planar shape. As shown in FIG. 6, the semiconductor element 30 has a pad 33 formed at a different position from the emitter electrode 31 on the surface. Emitter electrode 31 and pad 33 are exposed from a protective film (not shown) on the surface of the semiconductor substrate. Emitter electrode 31 is formed on a portion of the surface of semiconductor element 30 . The collector electrode 32 is formed almost all over the back surface. In plan view, the collector electrode 32 has a larger area than the emitter electrode 31 .

The pads 33 are electrodes for signals. Pad 33 is electrically isolated from emitter electrode 31 . The pad 33 is formed at the end opposite to the region where the emitter electrode 31 is formed in the Y direction. Pads 33 include a gate pad 33g for a gate electrode. In this embodiment, the semiconductor element 30 has five pads 33 . Specifically, the gate pad 33g, the Kelvin emitter for detecting the potential of the emitter electrode 31, the current sensing, the anode potential of the temperature sensor (temperature sensitive diode) for detecting the temperature of the semiconductor element 30, and the cathode potential have a use. The five pads 33 are collectively formed on one end side in the Y direction of the semiconductor element 30 having a substantially rectangular planar shape, and are formed side by side in the X direction.

The semiconductor device 10 has two semiconductor elements 30 . Specifically, it includes a semiconductor element 30H forming the upper arm 6H and a semiconductor element 30L forming the lower arm 6L. The semiconductor elements 30H and 30L have mutually similar configurations. The semiconductor elements 30H and 30L are arranged in the X direction. The semiconductor elements 30H and 30L are arranged at substantially the same positions in the Z direction.

The heat sink 40 is a wiring member arranged on the back side of the semiconductor element 30 in the Z direction and electrically connected to the collector electrode 32 via solder 80 . The solder 80 connects (joins) the heat sink 40 and the collector electrode 32 . The heat sink 40 corresponds to the back wiring member, and the solder 80 corresponds to the back bonding member. The heat sink 40 has a mounting surface 40a facing the semiconductor element 30 and a back surface 40b opposite to the mounting surface 40a. Solder 80 is interposed between the mounting surface 40a of the heat sink 40 and the collector electrode 32 of the semiconductor element 30 to form a solder joint.

The heat sink 40 radiates the heat of the semiconductor element 30 to the outside. As the heat sink 40, for example, a metal plate made of Cu, a Cu alloy, or the like, a DBC (Direct Bonded Copper) substrate, or the like can be used. A plated film of Ni, Au, or the like may be provided on the surface. In this embodiment, the heat sink 40 is a metal plate made of Cu. The heat sink 40 may be called a heat dissipation member, a conductive member, or a lead frame. The semiconductor device 10 has two heat sinks 40 . Specifically, a heat sink 40H forming the upper arm 6H and a heat sink 40L forming the lower arm 6L are provided.

As shown in FIG. 6, the heat sinks 40H and 40L are substantially rectangular in plan view. The heat sinks 40H and 40L are arranged in the X direction. As shown in FIGS. 3 and 4, the heat sinks 40H and 40L have approximately the same thickness and are arranged at approximately the same position in the Z direction. Solder joints are formed between the mounting surface 40a of the heat sink 40H and the collector electrode 32 of the semiconductor element 30H and between the mounting surface 40a of the heat sink 40L and the collector electrode 32 of the semiconductor element 30L.

The heat sinks 40H and 40L enclose the corresponding semiconductor elements 30 in plan view from the Z direction. The back surfaces 40b of the heat sinks 40H and 40L are exposed from the sealing resin body 20. As shown in FIG. The back surface 40b is sometimes called a heat dissipation surface or an exposed surface. The back surface 40 b is substantially flush with the back surface 20 b of the sealing resin body 20 . The back surfaces 40b of the heat sinks 40H and 40L are arranged in the X direction.

The heat sink 50 and the terminal 55 are wiring members arranged on the surface side of the semiconductor element 30 in the Z direction and electrically connected to the emitter electrode 31 via solders 81 and 82 . Terminal 55 is interposed between semiconductor element 30 and heat sink 50 in the Z direction. The solder 81 connects (joins) the terminal 55 and the emitter electrode 31 . The solder 82 connects (joins) the heat sink 50 and the terminal 55 .

The terminal 55 has a first end surface 55a facing the semiconductor element 30 and a second end surface 55b opposite to the first end surface 55a. The heat sink 50 has a mounting surface 50a facing the second end surface 55b and a back surface 50b opposite to the mounting surface 50a. The mounting surface 50 a is the surface of the heat sink 50 on the semiconductor element 30 side. Solder 81 is interposed between the first end surface 55a of the terminal 55 and the emitter electrode 31 of the semiconductor element 30 to form a solder joint. Solder 82 is interposed between the second end surface 55b of the terminal 55 and the mounting surface 50a of the heat sink 50 to form a solder joint. The heat sink 50 and the terminals 55 correspond to front side wiring members. The solder 81 corresponds to the front joint member.

The terminal 55 is located in the middle of the electrical and thermal conduction paths between the semiconductor element 30 (emitter electrode 31 ) and the heat sink 50 . The terminal 55 contains a metallic material such as Cu or Cu alloy. A plating film may be provided on the surface. The terminals 55H and 55L are substantially rectangular columnar bodies having substantially the same size as the emitter electrode 31 in plan view. The terminal 55 is sometimes called a metal block or relay member. The semiconductor device 10 has two terminals 55 . Specifically, a terminal 55H forming the upper arm 6H and a terminal 55L forming the lower arm 6L are provided. Solder joints are formed between the first end surface 55a of the terminal 55H and the emitter electrode 31 of the semiconductor element 30H and between the first end surface 55a of the terminal 55L and the emitter electrode 31 of the semiconductor element 30L. .

The heat sink 50 radiates the heat of the semiconductor element 30 to the outside. The heat sink 50 has a configuration similar to that of the heat sink 40 . In this embodiment, the heat sink 50 is a metal plate made of Cu. The semiconductor device 10 has two heat sinks 50 . Specifically, a heat sink 50H forming the upper arm 6H and a heat sink 50L forming the lower arm 6L are provided.

As shown in FIG. 5, the heat sinks 50H and 50L are substantially rectangular in plan view. The heat sinks 50H and 50L are arranged in the X direction. As shown in FIGS. 3 and 4, the heat sinks 50H and 50L have approximately the same thickness and are arranged at approximately the same position in the Z direction. Solder joints are formed between the mounting surface 50a of the heat sink 50H and the second end surfaces 55b of the terminals 55H and between the mounting surface 50a of the heat sink 50L and the second end surfaces 55b of the terminals 55L.

The heat sinks 50H and 50L enclose the corresponding semiconductor elements 30 and terminals 55 in plan view from the Z direction. A groove 51 is formed in the mounting surface 50a of the heat sinks 50H and 50L to accommodate the overflowing solder 82. As shown in FIG. The groove 51 surrounds the solder joint on the mounting surface 50a. Groove 51 is formed, for example, in an annular shape. The back surfaces 50b of the heat sinks 50H and 50L are exposed from the sealing resin body 20. As shown in FIG. The back surface 50b is sometimes called a heat dissipation surface or an exposed surface. The back surface 50b is substantially flush with the front surface 20a of the sealing resin body 20. As shown in FIG. The back surfaces 50b of the heat sinks 50H and 50L are arranged in the X direction.

The joints 60 to 62 connect the elements forming the upper and lower arm circuits 6 . The joint section connects elements constituting the semiconductor device 10 . As shown in FIGS. 3 and 6, the joint portion 60 continues to the heat sink 40L. The joint portion 60 is thinner than the heat sink 40L. The joint portion 60 is connected to a surface (side surface) facing the heat sink 40H while being substantially flush with the mounting surface 40a of the heat sink 40L. The joint portion 60 has a substantially crank shape in the ZX plane by having two bent portions. The joint portion 60 is covered with the sealing resin body 20 . The joint part 60 may be connected to the heat sink 40L by being provided integrally with the heat sink 40L, or may be provided as a separate member and connected to the heat sink 40L. In this embodiment, the joint portion 60 is provided integrally with the heat sink 40L as part of the lead frame.

As shown in FIGS. 3 and 5 , the joints 61 and 62 are connected to the corresponding heat sinks 50 . The joint portion 61 continues to the heat sink 50H. The joint portion 62 continues to the heat sink 50L. The joint portions 61 , 62 are thinner than the corresponding heat sink 50 . The joint portions 61 and 62 are covered with the sealing resin body 20 . The joint portions 61 and 62 may be connected by being provided integrally with the heat sink 50, or may be provided as separate members and connected by connection. In this embodiment, the joint portions 61 and 62 are provided integrally with the corresponding heat sinks 50H and 50L. The joint portions 61 and 62 extend in the X direction from the side surfaces facing each other in the two heat sinks 50H and 50L.

The heat sink 50H including the joint portion 61 and the heat sink 50L including the joint portion 62 are common members. The arrangement of the heat sink 50H including the joint portion 61 and the heat sink 50L including the joint portion 62 is two-fold symmetrical about the Z-axis as the rotation axis. Solder 83 is interposed between the facing surfaces of joint portion 60 and joint portion 61 to form a solder joint.

A groove 63 is formed in the joint surface of the joint portion 61 to accommodate the overflowing solder 83 . The groove 63 is annularly formed so as to surround the solder joint. Similarly, grooves 63 are also formed on the joint surface of the joint portion 62 to accommodate overflowing solder. In this embodiment, the grooves 63 are formed by pressing. For this reason, the joint portions 61 and 62 have a convex portion 64 on the back side of the groove 63 .

The main terminals 70 to 72 and the signal terminal 75 are external connection terminals. The main terminals 70 and 71 are power supply terminals. Main terminal 70 is electrically connected to the positive terminal of smoothing capacitor 4 . Main terminal 71 is electrically connected to the negative terminal of smoothing capacitor 4 . Therefore, the main terminal 70 is sometimes called the P terminal, and the main terminal 71 is sometimes called the N terminal.

As shown in FIGS. 5 and 6, the main terminal 70 continues to one end of the heat sink 40H in the Y direction. The thickness of the main terminal 70 is thinner than the heat sink 40H. The main terminal 70 is substantially flush with the mounting surface 40a and continues to the heat sink 40H. The main terminal 70 extends in the Y direction from the heat sink 40H and protrudes from the side surface 20c of the sealing resin body 20 to the outside. The main terminal 70 has a bent portion in the middle of the portion covered with the sealing resin body 20, and protrudes from the vicinity of the center in the Z direction on the side surface 20c.

As shown in FIGS. 4 and 5, the main terminal 71 is connected to the joint portion 62 . Solder 84 is interposed between the facing surfaces of the main terminal 71 and the joint portion 62 to form a solder joint. The main terminal 71 extends in the Y direction and protrudes outside the sealing resin body 20 from the same side surface 20 c as the main terminal 70 . The main terminal 71 has a connecting portion 71a connected to the joint portion 62 near one end in the Y direction. A portion of the main terminal 71 including the connection portion 71 a is covered with the sealing resin body 20 , and the remaining portion protrudes from the sealing resin body 20 . The connecting portion 71 a is thicker than the portion protruding from the sealing resin body 20 . The plate thickness of the connecting portion 71a is substantially the same as that of the heat sink 40, for example. The main terminal 71 also has a bent portion similarly to the main terminal, and protrudes from the vicinity of the center in the Z direction on the side surface 20c.

The main terminal 72 is connected to a connection point between the upper arm 6H and the lower arm 6L. Main terminal 72 is electrically connected to a corresponding phase winding (stator coil) of motor generator 3 . The main terminal 72 is also called an output terminal, an AC terminal, or an O terminal. The main terminal 72 continues to one end of the heat sink 40L in the Y direction. The thickness of the main terminals 72 is thinner than the heat sink 40L. The main terminal 72 is substantially flush with the mounting surface 40a and continues to the heat sink 40L. The main terminals 72 extend from the heat sink 40</b>L in the Y direction and protrude out of the sealing resin body 20 from the same side surface 20 c as the main terminals 70 . Like the main terminal 71, the main terminal 72 also has a bent portion and protrudes from the vicinity of the center in the Z direction on the side surface 20c. The three main terminals 70 to 72 are arranged in the order of main terminal 70, main terminal 71, and main terminal 72 in the X direction.

The signal terminals 75 are electrically connected to the pads 33 of the corresponding semiconductor element 30 . In this embodiment, they are electrically connected via bonding wires 87 . The signal terminal 75 extends in the Y direction and protrudes from the side surface 20d of the sealing resin body 20 to the outside. The side surface 20d is a surface opposite to the side surface 20c in the Y direction. In this embodiment, five signal terminals 75 are provided for one semiconductor element 30 .

Reference numeral 88 shown in FIGS. 2, 5, and 6 is a suspension lead. The heat sink 40 (40H, 40L), the joint portion 60, the main terminals 70 to 72, and the signal terminal 75 are configured in a lead frame as a common member. This lead frame is a multi-gauge strip with partially different thicknesses. The signal terminal 75 is connected to the suspension lead 88 through a tie bar before being cut. Unnecessary portions of the lead frame such as tie bars are cut (removed) after the sealing resin body 20 is molded.

As described above, in the semiconductor device 10 , the plurality of semiconductor elements 30 forming the upper and lower arm circuits 6 for one phase are sealed with the sealing resin body 20 . The sealing resin body 20 partially covers the semiconductor elements 30, the heat sinks 40, the heat sinks 50, the terminals 55, the joints 60 to 62, the main terminals 70 to 72, and the signal terminals 75. , integrally sealed.

A semiconductor element 30 is arranged between the heat sinks 40 and 50 in the Z direction. Thereby, the heat of the semiconductor element 30 can be dissipated to both sides in the Z direction. The semiconductor device 10 has a double-sided heat dissipation structure. The back surface 40 b of the heat sink 40 is substantially flush with the back surface 20 b of the sealing resin body 20 . The back surface 50 b of the heat sink 50 is substantially flush with the front surface 20 a of the sealing resin body 20 . Since the back surfaces 40b and 50b are exposed surfaces, heat dissipation can be enhanced.

<Wire piece>
Next, the wire piece will be described with reference to FIGS. 7 to 9. FIG. FIG. 7 is an enlarged plan view of the periphery of the semiconductor element 30H on the upper arm 6H side in FIG. FIG. 7 shows the positional relationship between the semiconductor element and the wire piece. In FIG. 7, the terminal 55H, the solder 81, the emitter electrode 31, the pad 33, and the bonding wire 87 are omitted for convenience. FIG. 8 is a perspective view showing the arrangement of wire pieces. 9 is a cross-sectional view taken along line IX-IX in FIG. 7. FIG.

As shown in FIGS. 7-9, the semiconductor device 10 further includes a wire piece 90. FIG. A wire piece 90 is provided in at least one of the solder joints that electrically connect the main electrode and the wiring member. A piece of wire 90 is placed in the solder. A plurality of wire pieces 90 are distributed for one (single) solder. The plurality of wire pieces 90 are fixed (joined) to a first opposing surface, which is one of the opposing surfaces that form the solder joint, and protrude toward a second opposing surface, which is the other one of the opposing surfaces.

The wire piece 90 has a predetermined height in order to ensure the minimum film thickness of the solder. The height of the wire pieces 90 is set so that the shortest distance between the first opposing surface and the second opposing surface is equal to or greater than the minimum film thickness even when the plurality of wire pieces 90 are in contact with the second opposing surface. there is The minimum film thickness is the minimum thickness required to ensure desired connection reliability. The height of the wire piece 90 is, for example, a value obtained by adding a margin to the minimum film thickness. Wire piece 90 is a small piece of bonding wire. Wire pieces 90 are sometimes referred to as protrusions or stud bonds.

In this embodiment, a plurality of wire pieces 90 are arranged in the solder 80 between the collector electrode 32 of the semiconductor element 30H and the mounting surface 40a of the heat sink 40H. All of the plurality of wire pieces 90 are fixed (bonded) to the mounting surface 40a of the heat sink 40H, and are not fixed to the back surface of the semiconductor element 30H, that is, the collector electrode 32. FIG. The mounting surface 40a of the heat sink 40H corresponds to the first facing surface, and the back surface of the semiconductor element 30H corresponds to the second facing surface. A plurality of wire pieces 90 are fixed to the mounting surface 40a. The wire piece 90 is a small piece of bonding wire made of aluminum or an aluminum alloy. All the wire pieces 90 fixed to the mounting surface 40a are arranged in the solder 80. FIG.

The solder 80 has a central region 80a overlapping the central portion of the semiconductor element 30H and an outer peripheral region 80b surrounding the central region 80a in plan view. The central portion of the semiconductor element 30H is the element center 30c and its peripheral portion. The semiconductor element 30H has an outer peripheral portion surrounding the central portion. The outer peripheral portion is, for example, a portion within a predetermined range from each of the four sides of the flat rectangular shape. For example, the central portion is an active region in which elements are formed, and the peripheral portion is a peripheral breakdown voltage region surrounding the active region. The peripheral region 80b includes a portion that overlaps the peripheral portion of the semiconductor element 30H. A plurality of wire pieces 90 are arranged in each of the central region 80a and the outer peripheral region 80b.

A plurality of wire pieces 90a, which are part of the wire pieces 90 fixed to the mounting surface 40a, are arranged in the central region 80a so as to surround the element center 30c in plan view. A center line CL shown in FIG. 7 is a virtual line passing through the element center 30c and extending in the Z direction. The wire piece 90a of the central region 80a surrounds this centerline CL. Three or more wire strips 90a are arranged in the central region 80a to surround the element center 30c. In this embodiment, three wire pieces 90a are arranged in the central region 80a. The three wire pieces 90a have a positional relationship of three-fold symmetry with respect to the element center 30c.

A plurality of wire pieces 90b, which are other parts of the wire piece 90 fixed to the mounting surface 40a, are arranged in the outer peripheral region 80b so as to surround the element center 30c in plan view. The plurality of wire pieces 90b are arranged corresponding to each of the four corners of at least the planar rectangular semiconductor element 30H. Therefore, four or more wire pieces 90b are arranged in the outer peripheral region 80b. In this embodiment, four wire pieces 90b are arranged in the outer peripheral region 80b. The wire pieces 90b are arranged at portions overlapping the four corners of the semiconductor element 30H. Note that the four corners do not refer to four corners (vertices) of a flat rectangular shape, but to portions within a predetermined range (portions around the corners) including the vertices.

The lower arm 6L side also has a similar configuration. That is, a plurality of wire pieces 90 are arranged on the solder 80 between the collector electrode 32 of the semiconductor element 30L and the mounting surface 40a of the heat sink 40L. A plurality of wire pieces 90 are fixed to the mounting surface 40a. Therefore, the description is omitted.

<Method for manufacturing a semiconductor device>
Next, a method for manufacturing the semiconductor device 10 described above will be described. In this embodiment, the semiconductor device 10 is formed using the solder die bonding method.

First, a piece of wire 90 is formed. An aluminum-based bonding wire is ultrasonically bonded to the mounting surface 40a of the heat sink 40 in the lead frame. A bonding wire usually has a 1st bond portion and a 2nd bond portion to electrically connect the two portions. Here, the wire is cut to form a wire piece 90 when the 1st bond portion is formed.

Molten solder is then applied to form a laminate. First, molten solder (solder 80) is applied onto the mounting surface 40a, and the semiconductor element 30 is placed on the molten solder so that the collector electrode 32 faces the mounting surface 40a. Next, molten solder (solder 81) is applied onto the emitter electrode 31 of the semiconductor element 30, and the terminal 55 is arranged on the molten solder so that the first end face 55a faces the semiconductor element 30 side. Further, molten solder (solder 82) is applied onto the second end face 55b of the terminal 55. Then, as shown in FIG. Molten solder (solders 83 and 84) is also applied onto the joint portion 60 and the connection portion 71a. Molten solder can be applied, for example, using a transfer method. By solidifying (solidifying) the applied molten solder, a laminate of the heat sink 40, the semiconductor element 30, and the terminals 55 is obtained.

All the solders 80 to 84 may be solidified (solidified) at once, or may be solidified (solidified) in the order of lamination. By carrying out collectively, the manufacturing process can be simplified (for example, the manufacturing time can be shortened). The connection of the bonding wire 87 may be performed in the state of the laminate, or may be performed in the state of the solidified solder 80 before the solder 81 is applied. Bonding in the state of the laminated body in which all the solders 80 to 84 have been applied is preferable because it is possible to suppress defects due to contact with the application device.

A semiconductor device 10 having a double-sided heat dissipation structure is sandwiched from both sides in the Z direction by coolers (not shown), for example. Therefore, high parallelism of the surfaces in the Z direction and high dimensional accuracy between the surfaces are required. For this reason, the solder 82 is arranged in an amount capable of absorbing the height variation of the semiconductor device 10 . That is, a large amount of solder 82 is arranged. For example, solder 82 will be thicker than solders 80,81.

Next, the heat sink 50 is placed on a pedestal (not shown) so that the mounting surface 50a faces upward. Then, the laminate is placed on the heat sink 50 so that the solder 82 faces the mounting surface 50a of the heat sink 50, and reflow is performed. In the reflow, a load (white arrow) is applied from the heat sink 40 side in the Z direction so that the height of the semiconductor device 10 reaches a predetermined height. Specifically, by applying a load, a spacer (not shown) is brought into contact with both the mounting surface 40a of the heat sink 40 and the mounting surface of the pedestal. In this manner, the height of the semiconductor device 10 is set to a predetermined height.

The terminal 55 and the heat sink 50 are connected (bonded) via the solder 82 by reflow. That is, the emitter electrode 31 and the heat sink 50 are electrically connected. The solder 82 absorbs height variations due to dimensional tolerances and assembly tolerances of the elements forming the semiconductor device 10 . For example, if the entire amount of solder 82 is required to make semiconductor device 10 have a predetermined height, the entire amount of solder 82 remains in the connection region inside trench 51 . On the other hand, if a portion of the solder 82 overflows in order to obtain the predetermined height, the overflowed solder 82 is accommodated in the groove 51 . The same applies to the solders 83 and 84, so the description is omitted.

Next, molding of the sealing resin body 20 is performed by a transfer molding method. Although illustration is omitted, in the present embodiment, the sealing resin body 20 is molded so as to completely cover the heat sinks 40 and 50, and is cut after molding. The encapsulating resin body 20 is cut together with the heat sinks 40 and 50 in part. Thereby, the rear surfaces 40b and 50b are exposed. The back surface 40b is substantially flush with the back surface 20b, and the back surface 50b is substantially flush with the front surface 20a. The sealing resin body 20 may be molded in a state in which the back surfaces 40b and 50b are pressed against the wall surface of the cavity of the molding die so as to be in close contact with each other. In this case, the rear surfaces 40b and 50b are exposed from the sealing resin body 20 when the sealing resin body 20 is molded. This eliminates the need for cutting after molding.

Then, the semiconductor device 10 can be obtained by removing tie bars and the like (not shown).

Although an example in which the heat sink 50 is arranged and reflow is performed after forming the laminate has been described, the present invention is not limited to this. After applying molten solder (solder 82) onto the second end surface 55b of the terminal 55, the heat sink 50 may be placed on the molten solder. Alternatively, all the solders 80 to 84 may be solidified (solidified) at once to form a laminate including the heat sink 50 at once. That is, it is possible to obtain the semiconductor device 10 without performing reflow.

<Summary of the first embodiment>
By using the heat sink 40 as a common component for various (multiple product numbers) semiconductor devices 30, the number of components can be reduced, the cost can be reduced, and the like. The semiconductor element 30 has an emitter electrode 31 on the front surface and a collector electrode 32 on the back surface, and the areas of the emitter electrode 31 and the collector electrode 32 are different. In such a configuration, warpage may occur in different directions depending on the product type, depending on the film thickness, film formation method, chip size, electrode area, and the like. For example, one type has a convex warp toward the heat sink 40 side, that is, a downward convex warp, and another type has a convex upward warp toward the side opposite to the heat sink 40 . Even if the element size (chip size) is the same, the direction of warpage may differ due to, for example, different film formation methods (film configurations). Furthermore, due to variations in manufacturing conditions, the direction of warpage may differ in the same product type.

In contrast, in this embodiment, a plurality of wire pieces 90 are provided at the solder joint between the collector electrode 32 of the semiconductor element 30 and the heat sink 40 . The wire piece 90 is fixed to the mounting surface 40a of the heat sink 40, which is the first opposing surface, and protrudes toward the back surface of the semiconductor element 30, which is the second opposing surface. Three or more wire pieces 90a are arranged in the central region 80a of the solder 80 so as to surround the element center 30c. Four or more wire pieces 90b are arranged in the outer peripheral region 80b of the solder 80 so as to correspond to at least the four corners of the semiconductor element 30 respectively.

Therefore, as shown in FIG. 10, when the semiconductor element 30 is warped downwardly, the minimum film thickness of the solder 80 can be ensured by the wire pieces 90a arranged so as to surround the element center 30c. can. For example, semiconductor device 30 can be supported by three or more wire pieces 90a arranged to surround device center 30c. As a result, tilting of the semiconductor element 30 can be suppressed, and a minimum film thickness can be ensured over the entire surface.

Moreover, when the semiconductor element 30 is warped upwardly, the wire pieces 90b arranged corresponding to at least the four corners of the semiconductor element 30 can ensure the minimum film thickness of the solder 80 . For example, the semiconductor element 30 can be supported by the wire pieces 90b arranged at least at the four corners. As a result, tilting of the semiconductor element 30 can be suppressed, and a minimum film thickness can be ensured over the entire surface. Thus, even when the wire piece 90 contacts the collector electrode 32 , the minimum film thickness of the solder 80 can be ensured by the height of the wire piece 90 .

Additionally, the wire piece 90 is fixed to the heat sink 40 . In other words, it is not applied in a solder melting furnace and applied together with molten solder. The wire piece 90 can maintain its shape even when molten solder is applied.

As described above, the film thickness of the solder 80 can be guaranteed regardless of whether the semiconductor element 30 is warped downwardly or upwardly. Even if various semiconductor elements 30 are used, the film thickness of the solder 80 can be guaranteed. Thereby, a highly reliable semiconductor device 10 can be provided. Moreover, since the thickness of the solder can be ensured, the detection accuracy of voids by an ultrasonic flaw detector (SAT: Scanning Acoustic Tomograph) can be improved. Furthermore, the cost can be reduced as compared with the method using Ni balls. In addition, in FIG. 10, the solder 80 is omitted for the sake of convenience.

Although an example in which the wire piece 90 is fixed to the mounting surface 40a of the heat sink 40 is shown, the present invention is not limited to this. A piece of wire 90 may be fixed to the collector electrode 32 of the semiconductor device 30 . That is, the back surface of the semiconductor element 30 may be used as the first opposing surface. However, the structure in which the wire piece 90 is fixed to the heat sink 40 (back side wiring member) is preferable because the influence when the wire piece 90 is joined is small.

The number and arrangement of wire pieces 90 are not limited to the above example. Depending on the warpage of the semiconductor element 30, the wire pieces 90 may be arranged only in the central region 80a, or may be arranged only in the outer peripheral region 80b. Also, four or more wire pieces 90a may be arranged in the central region 80a so as to surround the element center 30c. Moreover, in the outer peripheral region 80b, the wire pieces 90b may be arranged not only at the four corners but also at portions other than the four corners. That is, five or more wire pieces 90b may be arranged to surround the element center 30c. The position of the wire piece 90 may be adjusted according to the size of the semiconductor element 30 when the wire piece 90 is provided.

The configuration of the semiconductor device 10 is not limited to the above example. For example, a configuration without the terminal 55 may be used. In this case, the emitter electrode 31 and the mounting surface 50a of the heat sink 50 should be connected. A protrusion may be provided on the mounting surface 50 a of the heat sink 50 and a solder joint may be formed between the tip of the protrusion and the emitter electrode 31 .

It can also be applied to a configuration that does not include front wiring members, that is, terminals 55 and heat sinks 50 . For example, a bonding wire may be connected to the emitter electrode 31 to connect the upper arm 6H and the lower arm 6L and to the main terminal. The wire piece 90 may be provided on only one of the solder 80 on the upper arm 6H side and the solder 80 on the lower arm 6L side.

(Second embodiment)
This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be used.

As shown in the previous embodiment, in the semiconductor device 10, the wire piece 90 may be in contact with the second opposing surface, or may not be in contact therewith. Preferably, as shown in FIG. 11, the wire piece 90 is kept out of contact with the collector electrode 32, which is the second opposing surface. FIG. 11 is a cross-sectional view showing the vicinity of the connecting portion between the semiconductor element and the heat sink in the semiconductor device 10 of this embodiment. FIG. 11 corresponds to FIG. For the sake of convenience, FIG. 11 omits the electrodes on the surface side of the semiconductor element 30 . The configuration of the semiconductor device 10 is similar to that of the first embodiment, for example. The configuration shown in FIG. 11 is the same on the upper arm 6H side and the lower arm 6L side.

The wire piece 90 is fixed to the mounting surface 40 a of the heat sink 40 and arranged in the solder 80 . At the junction by the solder 80, the mounting surface 40a forms the first facing surface, and the surface of the collector electrode 32 forms the second facing surface. A protrusion height H1 of the wire piece 90 with respect to the mounting surface 40 a is less than the thickness T1 of the solder 80 . The wire piece 90 is not in contact with the collector electrode 32 and has a gap between it and the collector electrode 32 . The protrusion height H1 is a height that can ensure the minimum film thickness as described above. The protrusion height H1 is, for example, about 50 to 100 μm. A target value of the solder 80 is, for example, about 150 μm.

<Summary of Second Embodiment>
According to this embodiment, the protrusion height H1 of the wire piece 90 is less than the thickness T1 of the solder 80 . Therefore, when the semiconductor device 10 is formed, the wire piece 90 does not come into contact with the second opposing surface. It is possible to suppress the crushing of the wire piece 90 due to contact and, in turn, ensure a predetermined solder thickness.

Moreover, in this embodiment, the main electrode is the second facing surface. That is, the wire piece 90 is fixed to the surface facing the main electrode. Therefore, by satisfying the condition that the projection height H1 is less than the thickness T1 of the solder 80, it is possible to prevent the wire piece 90 from contacting the collector electrode 32 and damaging the collector electrode 32. FIG.

Although an example in which the relationship described above is applied to the configuration of the first embodiment has been shown, the present invention is not limited to this. For example, a configuration in which the number of wire pieces 90 arranged on solder 80 is different from that of the first embodiment (for example, three in total) can also be applied. It should be noted that the number of wire pieces 90 arranged in the solder 80 should be plural, preferably three or more. More preferably, it is the configuration described in the first embodiment.

Also, it is not limited to the wire piece 90 in the solder 80 . Any solder on which the wire piece 90 is arranged can be applied. It is particularly suitable for solder joints of main electrodes. For example, when wire piece 90 is provided in solder 81 and wire piece 90 is fixed to terminal 55, a predetermined solder thickness can be secured and emitter electrode 31 can be prevented from being damaged. It should be noted that the above relationship may be satisfied by only one of the upper arm 6H side and the lower arm 6L side.

(Third Embodiment)
This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be used.

In this embodiment, the wire piece 90 is arranged only in the outer peripheral region 80b as shown in FIG. FIG. 12 is a plan view showing the positional relationship between the semiconductor element 30 and the wire piece 90 in the semiconductor device 10 of this embodiment. FIG. 12 corresponds to FIG. The wire pieces 90 are arranged at positions corresponding to at least four corners of the semiconductor element 30 in the outer peripheral region 80b. In FIG. 12, wire pieces 90 are arranged only at the four corners. Wire piece 90 is not located in central region 80a. The configuration shown in FIG. 12 is the same on the upper arm 6H side and the lower arm 6L side.

Although illustration is omitted, the emitter electrode 31 of the semiconductor element 30 includes a base electrode portion formed on the surface of the semiconductor substrate using an Al-based material such as AlSi, and a connection electrode portion formed on the base electrode portion. have. The underlying electrode portion is formed by, for example, a sputtering method. The connection electrode portion is formed by plating. The connection electrode portion includes, for example, a Ni layer formed on the base electrode portion and an Au layer formed on the Ni layer. The collector electrode 32 is formed by sputtering. The collector electrode 32 includes an Al layer formed on the back surface of the semiconductor substrate using an Al-based material such as AlSi, and a Ni layer formed on the Al layer. The emitter electrode 31 using the plating method is thicker than the collector electrode 32 .

<Summary of Third Embodiment>
FIG. 13 is a cross-sectional view taken along line XIII-XIII of FIG. 12 and shows the connection structure between the semiconductor element 30 and the heat sink 40. As shown in FIG. In the electrode configuration described above, the semiconductor element 30 may warp downward as shown in FIG. In this embodiment, the supply amount of the solder 80 is set so as to ensure the minimum film thickness of the solder 80 . The solder 80 is supplied so as to ensure a predetermined thickness equal to or greater than the minimum film thickness while wetting and spreading the joint between the semiconductor element 30 (collector electrode 32 ) and the heat sink 40 . As shown in FIG. 13, semiconductor element 30 is supported by solder 80 and is not in contact with wire piece 90 . During soldering, the semiconductor element 30 floats on the molten solder. The solder 80 is supplied such that the solder thickness between the convex tip of the semiconductor element 30, that is, the center of the element, and the heat sink 40 can ensure a minimum film thickness. FIG. 13 shows an ideal state in which the semiconductor element 30 is arranged with respect to the heat sink 40 without inclination.

FIG. 14 is a cross-sectional view when the semiconductor element 30 is tilted. As shown in FIG. 14 , when the semiconductor element 30 that is warped downward is tilted, the semiconductor element 30 comes into contact with part of the plurality of wire pieces 90 . By supporting the semiconductor element 30 with the wire piece 90, the minimum film thickness of the solder 80 is ensured. The wire piece 90 has a height that ensures the minimum film thickness of the solder 80 when the warped semiconductor element 30 is tilted. Since the wire pieces 90 are arranged at least at the four corners of the outer peripheral region 80b, the semiconductor element 30 can be supported by at least one of the wire pieces 90 even if it is tilted in any direction. As described above, according to the semiconductor device 10 of the present embodiment, the film thickness of the solder 80 can be guaranteed even if the semiconductor element 30 is warped downwardly. Thereby, the semiconductor device 10 with high reliability (connection reliability) can be provided.

The electrode configuration that causes the semiconductor element 30 to warp downward is not limited to the above example.

In the outer peripheral region 80b, wire pieces 90 may be arranged not only at the four corners but also at portions other than the four corners. That is, five or more wire pieces 90b may be arranged to surround the element center 30c.

(Fourth embodiment)
This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be used.

The extending direction of the wire piece 90 is not particularly limited on the first opposing surface. It can extend in any direction. Preferably, the wire piece 90 extends in the predetermined direction shown in FIG. FIG. 15 is a plan view showing the periphery of the connecting portion between the semiconductor element and the heat sink in the semiconductor device 10 of this embodiment. FIG. 15 corresponds to FIG. In FIG. 15, for clarity of wire piece 90, semiconductor element 30 is indicated by a dashed line, and wire piece 90 is indicated by a solid line. The configuration of the semiconductor device 10 is similar to that of the first embodiment, for example. The configuration shown in FIG. 15 is the same on the upper arm 6H side and the lower arm 6L side.

The wire piece 90 is fixed to the mounting surface 40 a of the heat sink 40 . The number and arrangement of wire pieces 90 are the same as in the first embodiment (see FIG. 7). In this embodiment, the wire piece 90 extends toward the element center 30c in plan view. That is, the extending direction (longitudinal direction) of the wire piece 90 is substantially parallel to the imaginary line connecting the wire piece 90 and the element center 30c. Wire piece 90 extends along this imaginary line. Of the wire pieces 90, the three wire pieces 90a arranged in the central region 80a of the solder 80 all extend toward the element center 30c. All four wire pieces 90b arranged in the outer peripheral region 80b of the solder 80 extend toward the element center 30c.

<Summary of the fourth embodiment>
According to this embodiment, since the wire piece 90 extends toward the element center 30c, the wire piece 90 is less likely to block the flow of the applied molten solder when it spreads. As a result, it is possible to suppress the occurrence of voids in the solder 80 and the occurrence of unfilled portions between the opposing surfaces. By setting at least one of the plurality of wire pieces 90 in the extending direction described above, not a little effect can be obtained. In this embodiment, all wire pieces 90 placed on solder 80 extend toward element center 30c. As a result, the above effects can be enhanced, and the connection reliability can be enhanced.

Although an example in which the relationship described above is applied to the configuration of the first embodiment has been shown, the present invention is not limited to this. For example, the number and arrangement of the wire pieces 90 arranged on the solder 80 can be applied to a configuration different from that of the first embodiment. For example, like the modification shown in FIG. 16, it may be applied to the configuration of the third embodiment (see FIG. 12). A wire piece 90 arranged in the outer peripheral region 80b of the solder 80 extends toward the element center 30c. Therefore, connection reliability can be improved while exhibiting the effects described in the third embodiment. By setting at least one of the plurality of wire pieces 90 in the extending direction described above, not a little effect can be obtained. In FIG. 16, all wire segments 90 located in outer peripheral region 80b extend toward element center 30c. Therefore, connection reliability can be further improved.

Also, control of the extension direction is not limited to the wire piece 90 in the solder 80 . Any solder on which the wire piece 90 is arranged can be applied. For example, when a wire piece 90 is arranged on the solder 81, it may be applied to this wire piece 90. When a wire piece 90 is arranged on the solder 82, it may be applied to this wire piece 90. Also, the extension direction described above may be satisfied by only one of the upper arm 6H side and the lower arm 6L side.

Considering solder distortion, the extension length should be set as follows. In a plan view, when the extension length of the wire piece 90 is equal to or less than a predetermined length, solder distortion is maximized at the end (peripheral end) of the solder 80 . On the other hand, when the extended length exceeds the predetermined length, the solder strain becomes maximum at the end of the wire piece 90 . As the extension length increases, the solder strain on the wire end increases, and when the length exceeds a predetermined length, the magnitude relationship of the solder strain between the wire end and the solder end is reversed. Therefore, it is preferable to set the extension length within a range in which the solder strain at the end of the wire piece 90 does not exceed the solder strain at the end of the solder 80 . For example, the length of the wire piece 90 should be 350 μm or less, while the aluminum-based bonding wire forming the wire piece 90 has a diameter of 80 μm. Specifically, it should be set within the range of 200 to 350 μm.

(Fifth embodiment)
This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be used.

As shown in FIGS. 17-19, a piece of wire 90 may be placed in the solder 81 that joins the surface electrode and the front side wiring member. At that time, the wire piece 90 should be arranged at the positions shown in FIGS. FIG. 17 shows the positional relationship between the wire piece 90 arranged on the solder 81 and the semiconductor element 30 in the semiconductor device 10 of this embodiment. FIG. 18 shows the arrangement of wire pieces 90 in terminal 55. FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. 17. FIG. In FIG. 19, the gate wiring 34 is omitted for the sake of convenience. The configuration of the semiconductor device 10 of this embodiment is similar to that of the first embodiment, for example. The configuration of the wire piece 90 arranged on the solder 81 is the same between the upper arm 6H side and the lower arm 6L side.

A plurality of wire pieces 90 are provided at the solder joint between the emitter electrode 31 of the semiconductor element 30 and the first end surface 55 a of the terminal 55 . All of the plurality of wire pieces 90 are fixed (bonded) to the first end surface 55a of the terminal 55, and are not fixed onto the emitter electrode 31 of the semiconductor element 30, that is, on the surface. The first end surface 55a of the terminal 55 corresponds to the first facing surface, and the surface of the semiconductor element 30 corresponds to the second facing surface. A plurality of wire pieces 90 are fixed to the first end face 55a. All wire pieces 90 fixed to the first end face 55a are arranged in the solder 81. As shown in FIG.

The semiconductor element 30 has the gate pad 33g as described above. The semiconductor element 30 has a gate wiring 34 formed on the surface side and connected to a gate pad 33g, and a gate wiring protection portion 35 which is a part of a protective film formed on the surface and which protects the gate wiring 34 . The emitter electrode 31 is divided into two in the X direction, and a gate wiring 34 made of aluminum or the like is formed between the adjacent emitter electrodes 31 .

A protective film made of polyimide or the like is formed on the surface of the semiconductor element 30, and the emitter electrode 31 and the pad 33 are exposed from the protective film. The gate wire protection portion 35 is a portion of this protective film and covers the gate wire 34 . In FIG. 17, the portion of the gate line protection portion 35 that overlaps with the terminal 55 in plan view is shown as a broken line region. In FIG. 18, in order to show the positional relationship, the gate line protection portion 35 is shown as a chain-dotted area on the first end surface 55a of the terminal 55. As shown in FIG.

The wire piece 90 is arranged at a position not overlapping the gate wire protection portion 35 in plan view. As shown in FIGS. 17 and 18, one wire piece 90 is fixed near the center of the first end face 55a at a position that does not overlap the gate wire protection portion 35. As shown in FIGS. A wire piece 90 is fixed to each of the four corners of the first end face 55a, which has a substantially rectangular planar shape. Thus, five wire pieces 90 are fixed to the first end surface 55a.

<Summary of the fifth embodiment>
In this embodiment, a plurality of wire pieces 90 are arranged within solder 81 . Thereby, the minimum film thickness of the solder 81 can be secured.

Moreover, all of the wire pieces 90 in the solder 81 are provided at positions not overlapping the gate wiring protection portion 35 in plan view. As a result, when the semiconductor device 10 is formed, it is possible to prevent the wire piece 90 from contacting the gate wiring protection portion 35 and damaging the protection film. Therefore, it is possible to prevent the solder 81 from entering the gate wiring 34 side from the damaged portion of the protective film, thereby preventing the gate electrode and the emitter electrode 31 from short-circuiting, that is, gate leak failure.

The emitter electrode 31 has a smaller area than the collector electrode 32 . In other words, the joint of solder 81 is smaller than the joint of solder 80 in plan view. Therefore, even if the semiconductor element 30 is warped upwardly, the semiconductor element 30 can be supported by the single wire piece 90 provided near the center of the first end surface 55a. Thereby, the minimum film thickness of the solder 81 can be secured. Further, even if the semiconductor element 30 is warped downwardly, the semiconductor element 30 can be supported by the wire pieces 90 arranged at the four corners. Thereby, the minimum film thickness of the solder 81 can be secured. As described above, a highly reliable semiconductor device 10 can be provided.

Although an example in which the wire piece 90 is fixed to the first end surface 55a of the terminal 55 is shown, the present invention is not limited to this. A piece of wire 90 may be fixed to the emitter electrode 31 of the semiconductor device 30 . That is, the surface of the semiconductor element 30 may be used as the first facing surface. However, the structure in which the wire piece 90 is fixed to the terminal 55 (front side wiring member) is preferable because the influence when the wire piece 90 is joined is small.

The number and arrangement of wire pieces 90 in solder 81 are not limited to the above example. It can be arranged within a range that satisfies the condition that it does not overlap with the gate wiring protection portion 35 in plan view. For example, a plurality of wire pieces 90 may be arranged near the center of the first end face 55a. Moreover, in the vicinity of the outer peripheral end of the first end surface 55a, the wire pieces 90 may be arranged not only at the four corners but also at portions other than the four corners. Also, the above-described arrangement may be satisfied with only one of the upper arm 6H side and the lower arm 6L side.

Although an example in which the relationship described above is applied to the configuration of the first embodiment has been shown, the present invention is not limited to this. At least one of the configuration of the second embodiment, the configuration of the third embodiment, and the configuration of the fourth embodiment may be combined with the wire piece 90 arranged on the solder 81 . For example, a configuration in which the number of wire pieces 90 arranged on the solder 80 is different from that of the first embodiment can also be applied. For example, the number of wire pieces 90 arranged on solders 80 and 81 may be the same.

In the modification shown in FIG. 20 , wire pieces 90 are arranged at the four corners of the outer peripheral region 80 b of the solder 80 and wire pieces 90 are arranged at the four corners of the solder 81 . That is, four wire pieces 90 are arranged on each of the solders 80 and 81 . Even if the semiconductor element 30 is warped downwardly, the semiconductor element 30 can be supported by the wire pieces 90 arranged on the solder 81 . Thereby, the minimum film thickness of the solder 81 can be secured. The wire piece 90 in the solder 81 is arranged at a position not overlapping the gate wiring protection portion 35 . Each wire piece 90 disposed on the solders 80, 81 extends toward the element center 30c as in the configuration shown in FIG. FIG. 20 is a plan view of the terminal 55 viewed from the second end face side. In FIG. 20, the wire piece 90 arranged on the solder 80 is indicated by a dashed line, and the wire piece 90 arranged on the solder 81 is indicated by a dashed line.

Further, the wire piece 90 may be arranged on the solder 81 as described above without arranging the wire piece 90 on the solder 80 . The configuration of this embodiment can also be applied to a configuration that does not include the back wiring member, that is, the heat sink 40 .

Although an example in which the semiconductor device 10 includes the terminals 55 has been shown, the present invention is not limited to this. A configuration without the terminal 55 is also applicable. For example, the wire piece 90 may be fixed to the mounting surface 50a of the heat sink 50 at the solder joint between the emitter electrode 31 and the mounting surface 50a of the heat sink 50. FIG.

(Sixth embodiment)
This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be used.

When the wire piece 90 is arranged on both solders 80 and 81, the arrangement of the wire piece 90 is not particularly limited. Wire pieces 90 may be arranged as shown in FIG. FIG. 21 is a plan view of the terminals of the semiconductor device 10 of the present embodiment as seen from the second end face side. FIG. 21 corresponds to FIG. The configuration of the semiconductor device 10 is similar to that of the first embodiment, for example. The configuration shown in FIG. 21 is the same on the upper arm 6H side and the lower arm 6L side.

The semiconductor device 10 includes a plurality of wire pieces 90 arranged in solder 80 and a plurality of wire pieces 90 arranged in solder 81 . Hereinafter, the wire piece 90 arranged on the solder 80 may be referred to as a wire piece 900 , and the wire piece 90 arranged on the solder 81 may be referred to as a wire piece 901 . In FIG. 21, the wire piece 900 is indicated by a dashed line, and the wire piece 901 is indicated by a dashed line.

The wire piece 900 has the same arrangement as the wire piece 90 (see FIG. 7) described in the first embodiment. The wire piece 900 is fixed to the mounting surface 40a of the heat sink 40, for example. Three wire pieces 900 are arranged in the central region 80a of the solder 80 so as to surround the element center 30c. Four wire pieces 900 are arranged corresponding to the four corners of the semiconductor element 30 in the outer peripheral region 80b.

The wire piece 901 has the same arrangement as the wire piece 90 (see FIG. 17) described in the fifth embodiment. The wire piece 901 is fixed to the first end face 55a of the terminal 55, for example. One wire piece 901 is arranged near the center of the first end face 55a. Wire pieces 901 are arranged at the four corners of the first end face 55a. As shown in FIG. 21, the wire piece 900 and the wire piece 901 are arranged so as not to overlap each other in plan view.

<Summary of the sixth embodiment>
FIG. 22 is a schematic diagram showing the difference between the comparative example and this example (this embodiment). In the comparative example, elements that are the same as or related to elements of this embodiment (this example) are indicated by adding r to the end of the reference numerals of this embodiment. For the sake of convenience, FIG. 22 omits the main electrodes of the semiconductor elements.

The wire pieces 900r and 901r are formed using an aluminum-based material as described above, and have lower wettability to the solders 80r and 81r than the main electrodes (not shown) of the semiconductor element 30r, the heat sink 40r, and the terminals 55r. . Therefore, gaps 86r are formed between the wire pieces 900r, 901r and the solders 80r, 81r. Air gap 86r impedes heat conduction. As in the comparative example, when the wire pieces 900r and 901r overlap in plan view, the gap 86r also overlaps. Since the gaps 86r exist on both sides of the semiconductor element 30r in the Z direction, it is difficult for heat to escape in the Z direction from the portions of the semiconductor element 30r overlapping the gaps 86r (wire pieces 900r and 901r). Therefore, thermal resistance increases.

In this embodiment (this example) as well, gaps 86 are formed between the wire piece 900 and the solder 80 and between the wire piece 901 and the solder 81, respectively, as in the comparative example. However, since the wire pieces 900 and 901 are arranged at positions that do not overlap each other in plan view, the voids 86 in the solders 80 and 81 do not overlap each other in plan view, or if they do overlap, they are very small. . Therefore, the heat of the semiconductor element 30 can be released in at least one direction in the Z direction. As a result, the heat resistance can be reduced and the heat dissipation can be improved as compared with the comparative example. Note that in other embodiments, the air gap 86 is omitted in the illustration.

In this embodiment, the wire piece 900 has the same configuration as in the first embodiment. Therefore, in addition to the effects described in this embodiment, the effects described in the first embodiment can also be achieved. Also, the wire piece 901 has the same configuration and arrangement as in the fifth embodiment. Therefore, in addition to the effects described in this embodiment, the effects described in the fifth embodiment can also be achieved. However, the number and arrangement of the wire pieces 900 and 901 can be selected within a range that satisfies the condition that the wire pieces 900 and 901 do not overlap each other in plan view. That is, the number and arrangement are not limited to the above examples.

For example, only the wire piece 900 may have the same configuration as in the first embodiment, and the wire piece 901 may have a different configuration from that in the fifth embodiment. Only the wire piece 901 may have the same configuration as in the fourth embodiment, and the wire piece 900 may have a different configuration from that in the first embodiment. Alternatively, the same number of wire pieces 900 and 901 may be used. In the configuration shown in FIG. 20, the solders 80, 81 have the same number of wire segments 90. In the configuration shown in FIG. The wire piece 90 on the solder 80 side corresponding to the wire piece 900 and the wire piece 90 on the solder 81 side corresponding to the wire piece 901 are arranged at positions that do not overlap each other in plan view.

Although an example in which the wire piece 900 is fixed to the heat sink 40 is shown, it may be fixed to the back surface of the semiconductor element 30 (collector electrode 32). Although an example of fixing the wire piece 901 to the terminal 55 has been shown, it may be fixed to the surface of the semiconductor element 30 (emitter electrode 31). Wire piece 900 may be fixed to heat sink 40 and wire piece 901 may be fixed to semiconductor device 30 . Alternatively, the wire piece 900 may be fixed to the semiconductor element 30 and the wire piece 901 may be fixed to the terminal 55 . Alternatively, a configuration without the terminal 55 may be employed. In this case, the wire piece 901 is provided at the solder joint between the heat sink 50 and the semiconductor element 30 (emitter electrode 31).

At least one of the configuration of this embodiment, the configuration of the second embodiment, the configuration of the third embodiment, and the configuration of the fourth embodiment may be combined. At least one of the wire pieces 900 and 901 may be combined with the configuration of the second embodiment. At least one of the wire pieces 900 and 901 may be combined with the configuration of the third embodiment. At least one of the wire pieces 900 and 901 may be combined with the configuration of the fourth embodiment. Also, the configuration of this embodiment may be satisfied with only one of the upper arm 6H side and the lower arm 6L side.

(Seventh embodiment)
This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be used.

A piece of wire 90 may be placed on the solder 82 as shown in FIG. At that time, the wire pieces 90 of each solder 80, 81, 82 should be arranged as shown in FIG. FIG. 23 is a schematic cross-sectional view showing a laminate between heat sinks 40 and 50 in the semiconductor device 10 of this embodiment. FIG. 24 is a plan view showing an example of preferred arrangement of wire pieces 90 in each solder 80, 81, 82. FIG. FIG. 24 corresponds to FIG. In FIG. 24, the wire piece 900 is indicated by a dashed line, and the wire piece 901 is indicated by a one-dot chain line. The configuration of the semiconductor device 10 of this embodiment is similar to that of the first embodiment, for example. The configurations shown in FIGS. 23 and 24 are substantially the same on the upper arm 6H side and the lower arm 6L side.

As shown in FIG. 23, a plurality of wire pieces 90 are arranged on each of the solders 80, 81, 82. As shown in FIG. Hereinafter, the wire piece 90 arranged on the solder 80 may be referred to as a wire piece 900, the wire piece 90 arranged on the solder 81 as a wire piece 901, and the wire piece 90 arranged on the solder 82 as a wire piece 902. The number of wire pieces 90 differs in solders 80 , 81 , 82 . Wire pieces 900 are the most and wire pieces 902 are the least. Wire segments 901 are less than wire segments 900 and more than wire segments 902 .

In FIG. 23, a piece of wire 900 is secured to heat sink 40 . A wire piece 901 is fixed to the first end face 55a of the terminal 55, and a wire piece 902 is fixed to the second end face 55b.

As shown in FIG. 24, the wire piece 900 has the same arrangement as the wire piece 90 (see FIG. 7) described in the first embodiment. The wire piece 900 is fixed to the mounting surface 40 a of the heat sink 40 . Three wire pieces 900 are arranged in the central region 80a of the solder 80 so as to surround the element center 30c. Four wire pieces 900 are arranged corresponding to the four corners of the semiconductor element 30 in the outer peripheral region 80b.

The wire piece 901 has the same arrangement as the wire piece 90 (see FIG. 17) described in the fifth embodiment. A wire piece 901 is fixed to the first end surface 55 a of the terminal 55 . One wire piece 901 is arranged near the center of the first end face 55a. Wire pieces 901 are arranged at the four corners of the first end face 55a.

Wire piece 902 is fixed to second end surface 55 b of terminal 55 . Three wire pieces 902 are fixed to the second end face 55b. A plurality of wire pieces 902 are arranged to surround the element center 30c. As shown in FIG. 24, wire pieces 900, 901, and 902 are arranged at positions that do not overlap each other in plan view. The terminal 55 corresponds to the first wiring member, and the heat sink 50 corresponds to the second wiring member. The solder 81 corresponds to the first joint member, which is the front joint member, and the solder 82 corresponds to the second joint member.

<Summary of the seventh embodiment>
In this embodiment, a plurality of wire pieces 90 are arranged on the solder 82 . Thereby, the minimum film thickness of the solder 82 can be secured. A plurality of wire pieces 90 are arranged on each of the solders 80 , 81 , 82 . As a result, the minimum film thickness can be ensured for all of the solders 80, 81, 82 forming the electrical and thermal conduction paths from the semiconductor element 30 to the heat sinks 40, 50 on both sides in the Z direction.

In this embodiment, the number of wire pieces 90 arranged is different for each solder 80 , 81 , 82 . The largest number of wire pieces 90 (wire pieces 900) are arranged on the solder 80 on the side of the collector electrode 32 having a large electrode area. Further, wire pieces 90 (wire pieces 901 ) less than the wire pieces 900 are arranged on the solder 81 closer to the semiconductor element 30 on the side of the emitter electrode 31 having an electrode area smaller than that of the collector electrode 32 . In addition, the smallest number of wire pieces 90 (wire pieces 902 ) are arranged on the solder 82 on the far side from the semiconductor element 30 . Specifically, the semiconductor device 10 includes seven wire pieces 900 , five wire pieces 901 and three wire pieces 902 as the wire pieces 90 .

Solders 80 and 81 are affected by warpage of semiconductor element 30 . Since the largest number of wire pieces 90 are arranged on the solder 80 that is connected to the collector electrode 32 and has the largest area in plan view, the minimum film thickness of the solder 80 can be ensured. By arranging the wire pieces 900 in the same manner as in the first embodiment, the minimum film thickness can be ensured against warpage of the semiconductor element 30 . The solder 81 connects the emitter electrode 31 having an area smaller than that of the collector electrode 32 and the terminal 55 which is a metal block. By providing one wire piece 90 in the vicinity of the center, it is possible to cope with the upwardly convex warp of the semiconductor element 30 . The minimum film thickness of the solder 81 can be ensured by arranging the wire pieces 90 less than the solder 80 . By arranging the wire pieces 901 in the same manner as in the fifth embodiment, the minimum film thickness can be ensured against warpage of the semiconductor element 30 .

Solder 82 connects terminal 55 and heat sink 50 . Terminals 55 and heat sink 50 do not warp like semiconductor element 30 . In addition, since the terminal 55 exists between the semiconductor element 30 and the semiconductor element 30, the semiconductor element 30 is not affected by warping. Therefore, the minimum film thickness of the solder 82 can be ensured with the smallest number of wire pieces 90 . By using fewer wire pieces 901 and 902 than wire pieces 900 , voids 86 in solders 81 and 82 can be reduced compared to a configuration with the same number of wire pieces 900 . Therefore, heat dissipation can be improved while ensuring the minimum film thickness. Furthermore, since the number of wire pieces 902 is smaller than that of wire pieces 901, heat dissipation can be improved compared to a configuration in which the number of wire pieces 901 is the same. Also, the number of wire pieces 90 in the entire semiconductor device 10 can be reduced.

Also, the wire pieces 900, 901, and 902 are arranged at positions that do not overlap each other in plan view. Since the air gaps 86 do not overlap each other in the Z direction, or even if they overlap only partially, the heat dissipation can be improved.

When the solders 80, 81, 82 have different numbers of wire pieces 90, the number is not limited to the above example. The relationship of the number of wire pieces 900>the number of wire pieces 901>the number of wire pieces 902 should be satisfied. Alternatively, the number of wire pieces 900 > the number of wire pieces 901 = the number of wire pieces 902 may be satisfied. The number of wire pieces 900 may be equal to the number of wire pieces 901 >the number of wire pieces 902 . By making the wire pieces 90 of some of the solders 80, 81, 82 different from the remaining wire pieces 90, heat dissipation can be improved and the wire pieces 90 can be reduced, although the effect is weakened.

The number of wire pieces 90 can be set more freely if the minimum film thickness is ensured for each solder 80, 81, 82. FIG. The same number of wire pieces 90 may be used in the solders 80 , 81 , 82 . By arranging a plurality of wire pieces 90, preferably three or more wire pieces 90, it becomes easier to secure the solder thickness.

Also, the configuration of this embodiment may be satisfied with only one of the upper arm 6H side and the lower arm 6L side. Although an example in which the wire piece 90 is arranged on the solders 80, 81, 82 has been shown, it may be arranged on at least one of the solders 83, 84 as well.

(Eighth embodiment)
This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be used.

The shape of the terminal 55 is not particularly limited. Preferably, the wire piece 90 has the shape shown in FIG. 25 as an example. FIG. 25 is a schematic diagram showing the difference between the comparative example and the present example (present embodiment) of the terminal. In the comparative example, elements that are the same as or related to elements of this embodiment (this example) are indicated by adding r to the end of the reference numerals of this embodiment. In both the comparative example and the present example, the upper side of the paper surface is a side view, and the plan view as viewed from the A side. The semiconductor device 10 of this embodiment is similar to, for example, the first embodiment. The configuration shown in FIG. 25 is substantially the same on the upper arm 6H side and the lower arm 6L side.

The terminal is formed by punching out from a metal plate by press working. The wire piece is formed by imaging the end face of the terminal with a camera, recognizing the corner of the end face, and ultrasonically bonding the bonding wire to a predetermined position using the corner as a position reference. A terminal 55r of the comparative example has a punched R portion 550r at a corner of one end face in the Z direction. Therefore, when the wire piece 90r is formed on the end face on the side of the R portion 550r, there is a possibility that the positional accuracy of forming the wire piece 90r may be lower than that on the end face on the side without the R portion 550r.

In this embodiment (this example) as well, the punched terminal 55 has an R portion (not shown) at the corner of one end face, as in the comparative example. However, after punching, the R portion is chamfered, for example, C-chamfered. C-chamfering is chamfering with a chamfering angle of approximately 45 degrees. Terminal 55 has a chamfered portion 550 .

<Summary of the eighth embodiment>
As described above, the terminal 55 of this embodiment has the chamfered portion 550 . Therefore, when the wire piece 90 is formed on the end surface on which the R portion is formed during punching, the corner portion can be accurately recognized by imaging. Therefore, the wire piece 90 can be formed with high positional accuracy.

The configuration of this embodiment can be applied to a configuration including terminals 55 . Combinations with each of the preceding embodiments are possible. Also, the connection target of the wire piece 90 is not limited to the terminal 55 . It can be applied to a member that is formed by punching a metal plate and that has an R portion formed during the punching. By chamfering the R portion after punching, the wire piece 90 can be formed with high positional accuracy on the surface on which the R portion is formed during punching.

(Ninth embodiment)
This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be used. This embodiment is characterized by the structure and manufacturing method of the wire piece 90 .

As described above, the wire piece 90 is formed by ultrasonically bonding an aluminum-based bonding wire and cutting the wire when the 1st bond is performed. One preferred form of such a wire piece 90 is shown in FIGS. 26 to 29. FIG.

FIG. 26 shows a connection structure between the semiconductor element 30 and the heat sink 40 in the semiconductor device 10 of this embodiment. 27 is a cross-sectional view taken along line XXVII-XXVII of FIG. 26. FIG. FIG. 28 is a perspective view showing the wire piece 90 applied to FIGS. 26 and 27. FIG. FIG. 29 shows another example of wire piece 90 . 26 and 27, the number of wire pieces 90 is three. 26, 27 and 28 omit illustration of the main electrode for convenience. The semiconductor device 10 of this embodiment is similar to, for example, the first embodiment. The configurations shown in FIGS. 26 to 28 are substantially the same on the upper arm 6H side and the lower arm 6L side.

The semiconductor element 30 has a front surface 30a formed with an emitter electrode 31 (not shown) and a rear surface 30b formed with a collector electrode 32 (not shown). A collector electrode 32 forms the back surface 30b. As shown in FIGS. 21 and 22, solder 80 has a plurality of wire pieces 90 disposed thereon. The wire piece 90 is joined (fixed) to the mounting surface 40 a of the heat sink 40 . The mounting surface 40a corresponds to the fixing surface of the wiring member. The wire piece 90 protrudes from the mounting surface 40a toward the back surface 30b. Wire piece 90 is held by heat sink 40 . For this reason, the heat sink 40 is sometimes called a holder. The wire piece 90 has a fixed portion 91 , a flat portion 92 and a non-fixed portion 93 . The fixed portion 91 is a fixed portion (joint portion) to the heat sink 40 on the side of the wire piece 90 facing the heat sink 40 .

The flat portion 92 is a portion of the wire piece 90 formed on the side facing the back surface 30b of the semiconductor element 30 and substantially parallel to the mounting surface 40a of the heat sink. The non-fixed portion 93 is a portion that continues to the fixed portion 91 and is not fixed to the heat sink 40 on the side of the wire piece 90 facing the heat sink 40 . The non-fixed portion 93 is separated from the mounting surface 40a in the Z direction. The non-fixed portion 93 floats on the basis of the fixed portion 91 . The wire piece 90 is provided so as to be elastically deformable in the Z direction. Solder 80 enters the gap between the non-fixed portion 93 and the mounting surface 40a. The wire piece 90 has a fixed portion 91 and a non-fixed portion 93 on the side of the heat sink 40 in the Z direction, and a flat portion 92 on the side opposite to the fixed portion 91 and the non-fixed portion 93 .

The wire piece 90 extends in the X direction. A wire piece 90 shown in FIGS. 27 and 28 has flat portions 92 and non-fixed portions 93 at both ends in the extending direction. The flat portion 92 is provided at a position overlapping the non-fixed portion 93 in plan view. The heights from the mounting surface 40a to the flat portions 92 at both ends are substantially equal. The wire piece 90 is substantially U-shaped or substantially C-shaped in the ZX plane. The flat portions 92 at both ends are in contact with the rear surface 30b of the semiconductor element 30, respectively.

FIG. 29 shows another example of wire piece 90 . This wire piece 90 has a flat portion 92 only at one end in the extending direction, not at both ends. The non-fixed portions 93 are provided at both ends in the extending direction. In the wire piece 90, heights from the mounting surface 40a to the top of both ends are different. The flat portion 92 is formed at the end of the side where the height of the protrusion from the mounting surface 40a is high. The wire piece 90 is substantially J-shaped in the ZX plane. A flat portion 92 is formed at the far end of the element center 30c (not shown).

<Manufacturing method>
Next, a method for manufacturing the semiconductor device 10, particularly a method for manufacturing a connecting body between the semiconductor element 30 and the heat sink 40 will be described. Here, an example of the wire piece 90 shown in FIG. 29 is shown.

First, as shown in FIG. 30, a wire piece 90 is formed on the mounting surface 40a of the heat sink 40. Then, as shown in FIG. A bonding wire is bonded to the heat sink 40 by ultrasonic waves from a tool (not shown) to form a fixing portion 91 . This fixed portion 91 is the 1st bond portion. After the application of the ultrasonic wave is completed, the bonding wire is cut so that the non-fixed portion 93 remains before and after the fixed portion 91 in the extending direction. Thus, the bonding wire is cut without forming the second bond portion. Since the wire piece 90 is formed using only the 1st bond side, the formation time can be shortened compared to a structure having two joints, that is, a 1st bond portion and a 2nd bond portion. Also, the size of the wire piece 90 can be reduced, for example, the extension length can be shortened. Therefore, it is advantageous from the viewpoint of solder distortion as described above.

The bonding wires are wires made of aluminum or aluminum alloy as described above, and can be selected according to the size of the semiconductor element 30 and the thickness of the solder 80 . Here, using a bonding wire with a diameter of 80 μm, a wire piece 90 with a projection height of 110 μm from the mounting surface 40a and an extended length of 350 μm was formed.

Next, as shown in FIGS. 31 and 32, a flat portion 92 is formed on the wire piece 90 . That is, leveling processing is performed. Specifically, a jig 98 having a surface (hereinafter referred to as a contact surface) parallel to the mounting surface 40a is used to apply a load to the wire piece 90 as indicated by the hollow arrow in FIG. For example, a jig 98 is attached to a press and a load is applied to the wire piece 90 . The jig 98 is pressed against the wire piece 90 while maintaining the parallel state between the contact surface and the mounting surface 40a. The jig 98 contacts one end of the wire piece 90 having a substantially J shape. Also, the wire piece 90 is elastically deformed, and at least a portion of the non-fixed portion 93 contacts the mounting surface 40a. When the jig 98 is pushed further, the wire piece 90 is plastically deformed and a flat portion 92 is formed. The wire piece 90 is plastically deformed according to the pushing amount. The flat portion 92 is formed on one end side that comes into first contact with the jig 98 .

After the flat portion 92 is formed, the wire piece 90 is restored from the elastically deformed state by releasing the load, and the portion of the non-fixed portion 93 that has been in contact separates from the mounting surface 40a. As a result, as shown in FIG. 32, a wire piece 90 having a flat portion 92 overlapping the non-fixed portion 93 in plan view is obtained. Flattening reduces the height of wire piece 90 relative to the state of FIG. Here, it is set to about 75 μm. Through the steps described above, a plurality of wire pieces 90 are formed on the mounting surface 40a. In order to suppress tilting of the semiconductor element 30, it is preferable to form a plurality of wire pieces 90, more preferably three or more. More preferably, the configuration described in the preceding embodiment may be used.

Next, as shown in FIG. 33, molten solder 80S is applied. Molten solder 80S is applied onto the mounting surface 40a of the heat sink 40. As shown in FIG. The wire piece 90 is covered with the applied molten solder 80S. Since it is necessary to arrange the semiconductor element 30 with respect to the molten solder 80S, the heat sink 40 is heated (heated) as necessary. Here, molten solder 80S was applied by a transfer method.

Next, as shown in FIG. 34, the semiconductor element 30 is mounted. The semiconductor element 30 is held by a jig (not shown) and lowered from above the mounting surface 40a toward the molten solder 80S. Due to the descent, the back surface 30b of the semiconductor element 30 comes into contact with the molten solder 80S and spreads the molten solder 80S. When it descends to a predetermined position, the holding state by the jig is released. The molten solder 80S wets and spreads on the back surface 30b and the mounting surface 40a. The semiconductor element 30 may be pressed against the wire piece 90 due to the thickness of the heat sink 40, the thickness and warpage of the semiconductor element 30, variations in mounting accuracy, and the like.

After cooling (not shown), the connection structure shown in FIG. 29 can be obtained. The wire piece 90 shown in FIGS. 27 and 28 can also be formed by the same method. Specifically, after the fixing portion 91 is formed, the wire piece 90 is formed by cutting the bonding wire so that the heights of both ends are substantially equal, and flat portions 92 are formed at both ends by a jig 98 . .

<Summary of the ninth embodiment>
If the wire piece 90 having no flat portion, that is, the wire piece 90 in the state shown in FIG. In particular, if the wire piece 90 has a large height variation, the semiconductor element 30 is more likely to come into contact with the wire piece 90 . In contrast, according to the wire piece 90 of the present embodiment, the semiconductor element 30 is in contact with the flat portion 92, so stress concentration can be suppressed. Further, by forming the flat portion 92, the height variation of the wire piece 90 is reduced. Thereby, the thickness of the solder 80 is stabilized, and the connection reliability can be improved. For example, it is possible to secure solder crack life under temperature cycle environment. The wire piece 90 with the flat portion 92 can also be formed with wire bonding techniques and simple stamping, thus reducing costs.

Furthermore, the wire piece 90 has a non-fixed portion 93 . Thereby, the wire piece 90 can be elastically deformed. Therefore, even if the semiconductor element 30 comes into contact with the wire piece 90 , stress concentration on the semiconductor element 30 can be suppressed by the elastic change of the wire piece 90 . Particularly in this embodiment, the flat portion 92 is formed at a position overlapping the non-fixed portion 93 in plan view. As a result, the flat portion 92 in contact with the semiconductor element 30 is easily deformed in the direction of releasing the stress. Therefore, it is more effective in suppressing stress concentration.

The arrangement of the wire piece 90 is not limited to the above example. Other examples are shown in FIGS. 35-38. In the examples shown in FIGS. 35 to 38, two wire pieces 90 are arranged in one section including the Z direction. Also, the wire piece 90 contacts the semiconductor element 30 .

In the example shown in FIGS. 35-37, two wire pieces 90 each have only one flat portion 92, like the wire piece 90 shown in FIG. The flat portions 92 are formed at the outer ends in the direction in which the two wire pieces 90 are arranged (X direction). As shown in FIG. 35 , when the semiconductor element 30 is not warped, the flat portion 92 of each wire piece 90 is in contact with the semiconductor element 30 . Therefore, stress concentration in the semiconductor element can be suppressed.

As shown in FIG. 36 , even when the semiconductor element 30 is warped upwardly, the flat portions 92 of the wire pieces 90 are in contact with the semiconductor element 30 . Therefore, stress concentration in the semiconductor element can be suppressed. On the other hand, as shown in FIG. 37, when the semiconductor element 30 is warped downward, the inner end of the wire piece 90 contacts the semiconductor element 30 as indicated by the solid arrow in the figure. put away. As described above, depending on the amount of warpage, the semiconductor element 30 may come into contact with the end portion on the side where the flat portion 92 is not formed.

Note that the flat portion 92 may be formed at the end of the wire piece 90 . According to this, even if the warp shown in FIG. 37 occurs, the flat portion 92 provided at the inner end portion contacts the semiconductor element 30, so stress concentration can be suppressed. However, in the case where the same assembly lot includes a mixture of upwardly projecting semiconductor elements 30 and downwardly projecting semiconductor elements 30, for example, if the flat portion 92 is aligned with the upwardly projecting semiconductor element 30, the downwardly projecting semiconductor element 30 will not be projected. There is a possibility that stress concentrates in the semiconductor element 30 of .

On the other hand, in the example shown in FIG. 38, two wire pieces 90 have flat portions 92 at both ends like the wire pieces 90 shown in FIGS. Therefore, when the semiconductor element 30 is warped downward, the inner flat portion 92 contacts the semiconductor element 30 . Although not shown, when the semiconductor element 30 is warped upwardly, the outer flat portion 92 contacts the semiconductor element 30 . Therefore, stress concentration can be suppressed regardless of the direction in which the semiconductor element 30 warps.

The configuration of the wire piece 90 of this embodiment is not limited to the wire piece 90 arranged on the solder 80 . Any wire piece 90 provided at the solder joint between the main electrode and the wiring member can be applied. For example, in the example shown in FIG. 39, a wire piece 90 is arranged on the solder 81 between the emitter electrode 31 and the terminal 55 (not shown), and the wire piece 90 is also formed with a flat portion 92 . In FIG. 39, the flat portion 92 is formed only at one end of the wire piece 90, but it goes without saying that the flat portion 92 may be formed at both ends.

A configuration in which the terminal 55 is not provided and a solder joint is formed between the heat sink 50 and the emitter electrode 31 can also be applied. In this case, the wire piece 90 joined to the mounting surface 50a should have a flat portion 92. FIG. Moreover, it can be applied to a configuration in which only one of the front side wiring member and the back side wiring member is provided.

The structure of the wire piece 90 described in this embodiment can be combined with the wire piece 90 of the previous embodiment. Also, the method for manufacturing the wire piece 90 described in this embodiment can be applied to the formation of the wire piece 90 described in the previous embodiment. Although an example in which the wire piece 90 has the non-fixed portion 93 is shown, the present invention is not limited to this. It is sufficient to have at least the flat portion 92 . Further, the flat portion 92 may be provided at a position not overlapping the non-fixed portion 93 in plan view. This embodiment can be applied to a wire piece arranged at a junction between a main electrode of a semiconductor element and a wiring member. The arrangement of the wire pieces is not limited to the arrangement shown in the preceding embodiments.

(Tenth embodiment)
This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be used. This embodiment also shows a preferred form of the wire piece 90 .

<Size of wire piece>
First, the preferred size of the wire piece 90 will be described with reference to FIGS. 40 to 43. FIG. The wire piece 90 is arranged on the solder connecting the main electrode of the semiconductor element 30 and the wiring member. The solder here is solder 80, 81, for example.

FIG. 40 shows simulation results showing the relationship between the volume of the wire piece 90 and solder strain. The horizontal axis indicates the volume (×10 ⁷ μm ³ ) of the wire piece 90, and the vertical axis indicates the solder strain (arbitrary unit). The horizontal axis is a logarithmic axis. FIG. 41 is a diagram showing the wire piece 90 of this embodiment. In FIG. 41, the upper part of the paper surface is a side view, and the lower part of the paper surface is a top plan view. FIG. 42 is a cross-sectional view for explaining the maximum height of the wire piece 90 arranged on the solder 80. FIG. FIG. 43 is a cross-sectional view for explaining the maximum height of the wire piece 90 arranged on the solder 81. FIG.

According to the simulation results shown in FIG. 40, when the wire piece 90 has a large volume, the thermal stress based on the difference in linear expansion coefficient between the wire piece 90 and the solder, that is, the solder strain increases. It was found that element damage occurred. If the solder strain exceeds the dashed line shown in FIG. 40, element damage occurs. Therefore, in order to suppress element damage, it is preferable to set the volume of the wire piece 90 to 1.0×10 ⁷ μm ³ or less. In the semiconductor device 10 of this embodiment, the volume of each wire piece 90 is set to 1.0×10 ⁷ μm ³ or less.

Next, a description will be given of a configuration capable of suppressing variations in the height of the wire piece 90 without performing leveling while satisfying the above-described volume relationship. The wire piece 90 connected to the heat sink 40 will be exemplified below.

As shown in FIG. 41, the wire piece 90 is divided into three parts in the extending direction. Wire piece 90 has a bond portion 94 , a feed portion 95 and a tail portion 96 . The bond portion 94 is located between the feed portion 95 and the tail portion 96 in the extending direction of the wire piece 90 . The bond portion 94 is a portion bonded to the heat sink 40 . The bonding portion 94 has a fixing portion 91 on the side facing the heat sink 40 . The bonding portion 94 is a portion that includes the fixing portion 91 and overlaps with the fixing portion 91 in plan view. In other words, the bond portion 94 is the fixing portion 91 and the portion directly above the fixing portion 91 . The bonding portion 94 corresponds to the bonding portion. The bond portion 94 is crushed by the load from the tool during ultrasonic bonding. Therefore, the bond portion 94 is wider than the feed portion 95 and the tail portion 96 .

The feed portion 95 continues to the bond portion 94 on the tip side of the wire piece 90 . The feed portion 95 is a portion that is not joined to the heat sink 40 . The feed portion 95 has a non-fixed portion 93 on the side facing the heat sink 40 . The feed portion 95 is a portion that includes the unfixed portion 93 on the distal end side and overlaps the unfixed portion 93 in plan view. That is, the feed portion 95 is the non-fixed portion 93 on the distal end side and the portion directly above the non-fixed portion 93 . The feed portion 95 does not have the flat portion 92 on the side facing the semiconductor element 30 (not shown).

The tail portion 96 continues to the bond portion 94 on the rear end side of the wire piece 90 . Like the feed portion 95, the tail portion 96 is also a portion that is not joined to the heat sink 40. As shown in FIG. The tail portion 96 has a non-fixed portion 93 on the side facing the heat sink 40 . The tail portion 96 is a portion that includes the non-fixed portion 93 on the rear end side and overlaps the non-fixed portion 93 in plan view. That is, the tail portion 96 is the non-fixed portion 93 on the rear end side and the portion directly above the non-fixed portion 93 . The tail portion 96 does not have the flat portion 92 on the side facing the semiconductor element 30 (not shown).

The feed portion 95 and the tail portion 96 correspond to the non-joining portion. The tip side is the side having the end (cut end) before ultrasonic bonding. The rear end side is the end side formed by cutting the bonding wire after ultrasonic bonding. Although illustration is omitted, the heat sink 40 has a cutter mark formed when cutting the bonding wire directly below the rear end of the wire piece 90 .

Hereinafter, the length in the extending direction of the bond portion 94 may be indicated as LB, the length in the extending direction of the feed portion 95 as LF, and the length in the extending direction of the tail portion 96 as LT. In some cases, the length (total length) of the wire piece 90 in the extending direction is indicated by LW, and the width of the bond portion 94 is indicated by WB. The width WB is the length of the bonding portion 94 in the direction orthogonal to the extending direction. Also, the height of the bond portion 94 may be indicated as HB, the height of the feed portion 95 as HF, and the height of the tail portion 96 as HT. 41, the length LF of the feed portion 95 and the length LT of the tail portion 96 are not on the side facing the heat sink 40 (bottom side) but on the side facing the semiconductor element 30 (top side). is the length of The height is the height of the part farthest in the Z direction from the first opposing surface, which is the joint surface.

When the wire piece 90 is formed using a bonding wire with a diameter of 80 μm, the length LB of the bond portion 94 is substantially the same between the configuration including the flat portion 92 and the present embodiment. For example, length LB is 260 μm±100 μm. To reduce the volume of the wire piece 90 to 1.0×10 ⁷ μm ³ or less, the total length LW of the wire piece 90 should be 400 μm or more and 450 μm or less, and the lengths LF and LT of the feed portion 95 and the tail portion 96 should be 100 μm or less. do it.

In the configuration in which the flat portion 92 is provided, a length is required to secure the flat portion 92 in the extending direction. If the flat portions 92 are provided on both ends, the total length of the wire piece 90 exceeds 450 μm, for example, about 500 μm. In this embodiment, since the flat portion 92 is not provided, the lengths LF and LT of the feed portion 95 and the tail portion 96, which are non-bonded portions, can be reduced to 100 μm or less. Therefore, even if the length LB varies, the total length LW of the wire piece 90 can be 450 μm or less. In other words, the size of the wire piece 90 can be reduced. Therefore, the volume of the wire piece 90 can be easily reduced to 1.0×10 ⁷ μm ³ or less. Moreover, since the lengths LF and LT are short, variations in the heights HF and HT can be suppressed.

Further, it is preferable that the height HF of the feed portion 95 and the height HT of the tail portion 96 are 80 μm or more and 100 μm or less. A height of 80 μm is equal to the wire diameter. In this case, the feed portion 95 and the tail portion 96 are in contact with the mounting surface 40a of the heat sink 40, but are not joined.

When the semiconductor element 30 can warp downwardly, the volume of the facing space between the unwarped semiconductor element 30 and the heat sink 40 becomes maximum as shown in FIG. When the volume of the facing space is maximum, the largest amount of solder is required as the solder 80 for ensuring a bonding area where the solder spreads over substantially the entire surface of the collector electrode 32 . This required solder volume is minimized with the semiconductor device 30 supported by the wire piece 90 . The minimum required solder volume is the value obtained by excluding the shrinkage of the solder 80 from the volume of the portion overlapping the semiconductor element 30 (collector electrode 32) in plan view when the thickness of the solder 80 is equal to the heights HF and HT. is.

If the heights HF and HT are set to 110 μm or more, there is a risk that the predetermined supply amount of the solder 80 will fall below the minimum required solder volume. This is clear from the simulation results. In this case, there is a possibility that the solder 80 will wet and spread only on a part of the collector electrode 32 . If the solder heights HF and HT are set to 100 μm or less, the predetermined supply amount of solder 80 exceeds the minimum required solder volume. As a result, the solder 80 wets and spreads over substantially the entire surface of the collector electrode 32, and connection reliability can be ensured.

The same applies to the solder 81 on the emitter electrode 31 side. When semiconductor element 30 can warp downwardly, the volume of the facing space between semiconductor element 30 and terminal 55 becomes maximum when the warp is maximum (for example, 0.1 μm) as shown in FIG. When the volume of the facing space is maximum, the largest amount of solder is required as the solder 81 for ensuring the bonding area where the solder spreads over almost the entire surface of the emitter electrode 31 . This required solder volume is minimized with the semiconductor device 30 supported by the wire piece 90 .

If the heights HF and HT are set to 110 μm or more, there is a risk that the predetermined supply amount of the solder 80 will fall below the minimum required solder volume. This is clear from the simulation results. In this case, the solder 81 may wet and spread only on a part of the emitter electrode 31 . When the solder heights HF and HT are set to 100 μm or less, the predetermined supply amount of the solder 81 exceeds the minimum required solder volume. As a result, the solder 81 is spread over substantially the entire surface of the emitter electrode 31, and connection reliability can be ensured.

As shown in the preceding embodiment (see FIG. 14), even when the downwardly convex semiconductor element 30 is arranged with an inclination, if the heights HF and HT are 70 μm or more, the wires are arranged at least at the four corners. A strip 90 (see FIGS. 12 and 20) makes it possible to ensure a minimum thickness of the solders 80,81. The minimum film thickness that can ensure connection reliability is, for example, 43 μm. In this embodiment, the wire diameter is 80 μm and the minimum heights HF and HT are 80 μm. Therefore, connection reliability can be ensured even when the downwardly convex semiconductor element 30 is inclined.

When the lengths LF and LT are shortened as described above, the ratios (LF/LB, LT/LB) of the lengths LF and LT of the feed portion 95 or the tail portion 96 to the length LB of the bond portion 94 are is smaller than the configuration in which In order to make the volume of the wire piece 90 1.0×10 ⁷ μm ³ or less, LF/LB and LT/LB should be 0.1 or more and 0.65 or less. By satisfying this relationship, the length of the feed portion 95 and the tail portion 96 can be reduced with respect to the bond portion 94, and the size of the wire piece 90 can be reduced. In addition, variations in heights HF and HT can be suppressed.

Also, the ratio of the width WB of the bond portion 94 to the length LB of the bond portion 94 (WB/LB) is preferably 0.2 or more and 0.7 or less. That is, it is preferable to narrow the width WB. Thereby, the volume of the wire piece 90 can be reduced. Also, variations in the heights HF and HT can be suppressed.

More specifically, it is preferable to form the wire piece 90 so as to satisfy the following dimensions. It is preferable to set the total length LW of the wire piece 90 to 420 μm±20 μm, the length LF of the feed portion 95 to 85 μm±15 μm, and the length LT of the tail portion 96 to 70±30 μm. The length LB of the bonding portion 94 should be 260 μm±100 μm, the height HB of the bonding portion 94 should be 70 μm±5 μm, and the width WB of the bonding portion 94 should be 90 μm+15 μm−5 μm. It is preferable to set the height HF of the feed portion 95 to 85 μm+15 μm−5 μm and the height HT of the tail portion 96 to 85 μm±5 μm.

<Method for manufacturing wire piece>
Next, a method of manufacturing the wire piece 90 that satisfies the above volume and dimensions will be described with reference to FIGS. 44 to 48. FIG. An example in which the wire piece 90 is provided on the heat sink 40 will be described below, but the same applies to the terminal 55 as well.

As shown in FIG. 44, the ultrasonic bonding apparatus has a wire guide 100, a tool 101 and a cutter 102. First, the bonding wires 99 pulled out from the wire guide 100 are arranged at predetermined positions on the mounting surface 40 a of the heat sink 40 . At this time, the bonding wire 99 is arranged so that the feed portion 95 having the above-described predetermined length can be secured on the basis of the bonding portion by the tool 101 .

Next, as shown in FIG. 45, ultrasonic bonding is performed using a tool 101. FIG. A bonding portion 94 is formed by ultrasonic bonding. The bonding wire 99 is crushed to some extent by the power of ultrasonic bonding and the load of the tool 101 . Thereby, the width of the bonding portion 94 is increased. In this embodiment, the power and load are adjusted so that the width WB of the bond portion 94 does not become too wide and falls within the range of 90 μm+15 μm−5 μm, that is, 85 μm to 105 μm.

Due to the ultrasonic bonding, a compressive stress acts on the upper surface side of the feed portion 95 as indicated by arrows in FIG. 45 . On the other hand, tensile stress acts on the lower surface side of the feed portion 95, that is, on the heat sink 40 side. As a result, the feed portion 95 springs up from the mounting surface 40 a of the heat sink 40 . The portion of the non-fixed portion 93 that has been in contact is separated from the mounting surface 40a.

After completing the ultrasonic bonding, as shown in FIG. 46, the tool 101 (ultrasonic bonding apparatus) is retracted. 46 is determined according to the cutting position of the cutter 102, that is, the length of the tail portion 96. As shown in FIG. Specifically, the amount of retraction is determined so that the length LT of the tail portion 96 and the total length of the wire piece 90 are each predetermined lengths.

Then, as shown in FIG. 47, wire cutting is performed. The bonding wire 99 is cut by the cutter 102 while the tool 101 is holding the bonding wire 99 at the retracted position. Wire pieces 90 are formed by wire cutting. After wire cutting, as shown in FIG. 48, the ultrasonic bonding apparatus including the tool 101 is retracted. The load is released by the cutting, and the tail portion 96 of the wire piece 90 recovers from the elastically deformed state and springs up against the mounting surface 40 a of the heat sink 40 . The portion of the non-fixed portion 93 that has been in contact is separated from the mounting surface 40a.

By wire cutting, a cutter mark 41 is formed on the heat sink 40 as shown in FIG. The cutter marks 41 are formed directly under the tail portion 96 on both ends of the wire piece 90 in the extending direction.

<Summary of the tenth embodiment>
In this embodiment, the volume of the wire piece 90 is set to 1.0×10 ⁷ μm ³ or less. As a result, thermal stress can be reduced, and device damage can be suppressed. That is, reliability of the semiconductor device 10 can be improved.

Note that in the preceding embodiment (see FIG. 28), the above-described volume relationship may be satisfied. However, if the flat portions 92 are provided on both end sides, the total length LW of the wire piece 90 is increased. Moreover, if the leveling process is not performed, the wire heights, that is, the heights HF and HT will vary greatly. The required leveling process increases the number of processes and thus the manufacturing cost.

In this embodiment, in order to satisfy the above volume relationship, the total length LW of the wire piece 90 is set to 400 μm or more and 450 μm or less, and the lengths LF and LT of the feed portion 95 and the tail portion 96 are set to 100 μm or less. Since the flat portion 92 is not provided, the lengths LF and LT of the feed portion 95 and the tail portion 96 and the total length LW of the wire piece 90 can be shortened. Moreover, leveling processing is not required, and for example, manufacturing costs can be reduced.

In particular, the lengths LF and LT of the feed portion 95 and the tail portion 96 are made shorter than the length LB of the bond portion 94 . Specifically, LF/LB and LT/LB are set to 0.1 or more and 0.65 or less. Thereby, variations in the heights HF and HT can be suppressed.

In this embodiment, the height HF of the feed portion 95 and the height HT of the tail portion 96 are set to 80 μm or more and 100 μm or less. Thereby, connection reliability can be ensured.

In the present embodiment, the ratio of the width WB of the bond portion 94 to the length LB of the bond portion 94 (WB/LB) is set to 0.2 or more and 0.7 or less. Since the width WB is narrowed, the volume of the wire piece 90 can be reduced. Also, in order to narrow the width WB, the power and load during ultrasonic bonding are suppressed within a range in which the bonding strength can be secured. As a result, the amount of crushing can be reduced, and variations in the heights HF and HT can be suppressed.

The wire piece 90 without the flat portion 92 shown in this embodiment can be combined with the first to eighth embodiments. For example, it is suitable for the configuration shown in FIGS. 12 and 20 in which the wire pieces 90 are arranged only at the four corners. This embodiment can be applied to a wire piece arranged at a junction between a main electrode of a semiconductor element and a wiring member. The arrangement of the wire pieces is not limited to the arrangement shown in the preceding embodiments.

(Other embodiments)
The disclosure in this specification, drawings, etc. is not limited to the illustrated embodiments. The disclosure encompasses the illustrated embodiments and variations thereon by those skilled in the art. For example, the disclosure is not limited to the combinations of parts and/or elements shown in the embodiments. The disclosure can be implemented in various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure encompasses omitting parts and/or elements of the embodiments. The disclosure encompasses permutations or combinations of parts and/or elements between one embodiment and another. The disclosed technical scope is not limited to the description of the embodiments. The disclosed technical scope is indicated by the description of the claims, and should be understood to include all modifications within the meaning and range of equivalents to the description of the claims.

The disclosure in the specification, drawings, etc. is not limited by the description in the claims. The disclosure in the specification, drawings, etc. encompasses the technical ideas described in the claims, and further extends to technical ideas that are more diverse and broader than the technical ideas described in the claims. Therefore, various technical ideas can be extracted from the disclosure of the specification, drawings, etc., without being bound by the scope of claims.

Although an example in which the semiconductor device 10 is applied to the inverter 5 has been shown, the present invention is not limited to this. For example, it can also be applied to a converter. Also, it can be applied to both the inverter 5 and the converter.

Although an example in which the semiconductor element 30 has the IGBT 6i and the FWD 6d forming one arm is shown, the present invention is not limited to this. The IGBT 6i and FWD 6d may be separate chips (separate elements). Although an example of IGBT 6i is shown as a switching element, it is not limited to this. For example, MOSFETs can also be employed. A diode can also be employed as a vertically structured element having main electrodes on both sides.

A plurality of semiconductor elements 30H may be provided, and the plurality of semiconductor elements 30H may be connected in parallel to constitute one of the upper arms 6H. A plurality of semiconductor elements 30L may be provided, and the plurality of semiconductor elements 30L may be connected in parallel to constitute one of the lower arms 6L.

Although an example in which the back surfaces 40b, 50b of the heat sinks 40, 50 are exposed from the sealing resin body 20 has been shown, the present invention is not limited to this. At least one of the back surfaces 40 b and 50 b may be covered with the sealing resin body 20 . At least one of the back surfaces 40b and 50b may be covered with an insulating member (not shown) separate from the sealing resin body 20. FIG. Although an example in which the semiconductor device 10 includes the sealing resin body 20 has been shown, the present invention is not limited to this. A configuration without the sealing resin body 20 may be employed.

Although an example in which the semiconductor device 10 includes a plurality of semiconductor elements 30 forming the upper and lower arm circuits 6 for one phase has been shown, the present invention is not limited to this. You may provide only the semiconductor element which comprises one arm. The semiconductor device 10 may include, for example, a semiconductor element 30 forming one arm and a pair of heat sinks 40 and 50 arranged to sandwich the semiconductor element 30 . Also, the semiconductor elements forming the upper and lower arm circuits 6 for three phases may be provided as one package.

Although an example in which the signal terminal 75 is connected to the pad 33 via the bonding wire 87 has been shown, the present invention is not limited to this. For example, signal terminal 75 may be connected to pad 33 via solder. Since a space for the bonding wire 87 is not required, a configuration without the terminal 55 is possible.

Although an example in which the heat sink 50 is provided with the groove 51 and the joint portions 61 and 62 are provided with the groove 63 is shown, the present invention is not limited to this. At least one of the grooves 51 and 63 may be eliminated. Although an example has been shown in which the connecting portion that connects the upper arm 6H and the lower arm 6L is realized by the connection structure of the two joint portions 60 and 61, it is not limited to this. A joint portion connected to one of the heat sinks 40L and 50H may be connected to the other. Moreover, although the example provided with the joint part 62 was shown, it is not limited to this. The main terminal 71 may be connected to the heat sink 50L without the joint portion 62 interposed therebetween.

DESCRIPTION OF SYMBOLS 1... Power converter, 2... DC power supply, 3... Motor generator, 4... Smoothing capacitor, 5... Inverter, 6... Upper and lower arm circuit, 6H... Upper arm, 6L... Lower arm, 6i... IGBT, 6d... FWD, 7 High-potential power supply line 8 Low-potential power supply line 9 Output line 10 Semiconductor device 20 Sealing resin body 20a Front surface 20b Back surface 20c, 20d Side surface 30, 30H, 30L Semiconductor element 30a front surface 30b rear surface 30c element center 31 emitter electrode 32 collector electrode 33 pad 33g gate pad 34 gate wiring 35 gate wiring protection portion 40, 40H , 40L...Heat sink 40a...Mounting surface 40b...Back surface 41...Cutter mark 50, 50H, 50L...Heat sink 50a...Mounting surface 50b...Back surface 51...Groove 55, 55H, 55L...Terminal 55a... First end face 55b Second end face 550 Chamfered portion 60, 61, 62 Joint portion 63 Groove 64 Convex portion 70, 71, 72 Main terminal 71a Connecting portion 75 Signal Terminals 80, 81, 82, 83, 84 Solder 80a Central region 80b Peripheral region 80S Molten solder 86 Gap 87 Bonding wire 88 Hanging lead 90, 90a, 90b, 900 , 901, 902 wire piece 91 fixed part 92 flat part 93 non-fixed part 94 bond part 95 feed part 96 tail part 98 jig 99 bonding wire 100 ... wire guide, 101 ... tool, 102 ... cutter

Claims (16)

A semiconductor element having, as main electrodes, a front electrode (31) formed on the front surface and a rear electrode (32) formed on the rear surface opposite to the front surface in the plate thickness direction and having a larger area than the front electrode. (30) and
a joining member interposed between the first opposing surface and the second opposing surface to form a joint;
a wiring member electrically connected to the main electrode via the bonding member;
a plurality of wire pieces (90) arranged in the joining member, fixed to the first opposing surface and protruding from the first opposing surface;
The wiring member includes a back side wiring member (40) arranged on the back side and connected to the back electrode,
The bonding member includes a back side bonding member (80) forming a bonding portion between the back electrode and the back side wiring member and having a plurality of wire pieces arranged thereon,
The back side bonding member includes a central region (80a) that overlaps the central portion of the semiconductor element including the element center and a portion that overlaps the outer peripheral portion of the semiconductor element surrounding the central portion in a plan view in the plate thickness direction. , and a peripheral region (80b) surrounding the central region,
Four or more wire pieces are arranged in the outer peripheral region corresponding to at least four corners of the semiconductor element,
at least one of the wire pieces extends toward the center of the element in the plan view ;
The piece of wire is
fixed to the wiring member at a junction between the main electrode and the wiring member,
A flat portion (92) parallel to the fixing surface of the wiring member is provided on the side facing the main electrode in the plate thickness direction,
A fixed portion (91) to the wiring member and a non-fixed portion (93) connected to the fixed portion and not fixed to the wiring member are provided on the side facing the wiring member in the plate thickness direction. A semiconductor device comprising: 2. The semiconductor device according to claim 1 , wherein the flat portion is provided at a position overlapping with the non-fixed portion in plan view. A semiconductor element having, as main electrodes, a front electrode (31) formed on the front surface and a rear electrode (32) formed on the rear surface opposite to the front surface in the plate thickness direction and having a larger area than the front electrode. (30) and
a joining member interposed between the first opposing surface and the second opposing surface to form a joint;
a wiring member electrically connected to the main electrode via the bonding member;
a plurality of wire pieces (90) arranged in the joining member, fixed to the first opposing surface and protruding from the first opposing surface;
The wiring member includes a back side wiring member (40) arranged on the back side and connected to the back electrode,
The bonding member includes a back side bonding member (80) forming a bonding portion between the back electrode and the back side wiring member and having a plurality of wire pieces arranged thereon,
The back side bonding member includes a central region (80a) that overlaps the central portion of the semiconductor element including the element center and a portion that overlaps the outer peripheral portion of the semiconductor element surrounding the central portion in a plan view in the plate thickness direction. , and a peripheral region (80b) surrounding the central region,
Four or more wire pieces are arranged in the outer peripheral region corresponding to at least four corners of the semiconductor element,
at least one of the wire pieces extends toward the center of the element in the plan view ;
The wire piece is fixed to the wiring member at a junction between the main electrode and the wiring member,
The volume of each wire piece is 1.0×10 ⁷ μm ³ or less,
The wire piece has a joint portion (94) which is a portion joined to the wiring member, and a joint portion (94) connected to the joint portion and provided at both ends in the extending direction of the wire piece, and is not joined to the wiring member. and a non-junction portion (95, 96) . 4. The semiconductor device according to claim 3 , wherein said wire piece has a length of 400 [mu]m or more and 450 [mu]m or less, and each of said non-bonding portions has a length of 100 [mu]m or less in said extension direction. 5. The semiconductor device according to claim 4 , wherein the height of said non-bonded portion from said bonding surface of said wiring member is 80 [mu]m or more and 100 [mu]m or less. 6. The semiconductor device according to claim 3 , wherein a ratio of the length of said non-bonding portion to the length of said bonding portion in said extending direction is 0.1 or more and 0.65 or less. 7. The semiconductor device according to claim 3 , wherein a ratio of the width of said joint portion to the length of said joint portion in said extending direction is 0.2 or more and 0.7 or less. A semiconductor element having, as main electrodes, a front electrode (31) formed on the front surface and a rear electrode (32) formed on the rear surface opposite to the front surface in the plate thickness direction and having a larger area than the front electrode. (30) and
a joining member interposed between the first opposing surface and the second opposing surface to form a joint;
a wiring member electrically connected to the main electrode via the bonding member;
a plurality of wire pieces (90) arranged in the joining member, fixed to the first opposing surface and protruding from the first opposing surface;
The wiring member includes a back side wiring member (40) arranged on the back side and connected to the back electrode,
The bonding member includes a back side bonding member (80) forming a bonding portion between the back electrode and the back side wiring member and having a plurality of wire pieces arranged thereon,
The back side bonding member includes a central region (80a) that overlaps the central portion of the semiconductor element including the element center and a portion that overlaps the outer peripheral portion of the semiconductor element surrounding the central portion in a plan view in the plate thickness direction. , and a peripheral region (80b) surrounding the central region,
Four or more wire pieces are arranged in the outer peripheral region corresponding to at least four corners of the semiconductor element,
at least one of the wire pieces extends toward the center of the element in the plan view ;
A semiconductor device , wherein three or more wire pieces are arranged in the central region so as to surround the center of the element . The wiring member includes a front side wiring member (50, 55) arranged on the front side and electrically connected to the surface electrode,
9. The bonding member according to any one of claims 1 to 8 , wherein the bonding member includes a front bonding member (81) forming a bonding portion between the surface electrode and the front wiring member and having a plurality of the wire pieces arranged therein. semiconductor device. The semiconductor element includes a gate pad (33g) formed on the surface, a gate wiring (34) formed on the surface side and connected to the gate pad, and a part of a protective film formed on the surface, a gate wiring protection part (35) for protecting the gate wiring,
10. The semiconductor device according to claim 9 , wherein said wire piece is arranged at a position not overlapping with said gate wiring protection portion in said front side bonding member. A semiconductor element having, as main electrodes, a front electrode (31) formed on the front surface and a rear electrode (32) formed on the rear surface opposite to the front surface in the plate thickness direction and having a larger area than the front electrode. (30) and
a joining member interposed between the first opposing surface and the second opposing surface to form a joint;
a wiring member electrically connected to the main electrode via the bonding member;
a plurality of wire pieces (90) arranged in the joining member, fixed to the first opposing surface and protruding from the first opposing surface;
The wiring member includes a back side wiring member (40) arranged on the back side and connected to the back electrode,
The bonding member includes a back side bonding member (80) forming a bonding portion between the back electrode and the back side wiring member and having a plurality of wire pieces arranged thereon,
The back side bonding member includes a central region (80a) that overlaps the central portion of the semiconductor element including the element center and a portion that overlaps the outer peripheral portion of the semiconductor element surrounding the central portion in a plan view in the plate thickness direction. , and a peripheral region (80b) surrounding the central region,
Four or more wire pieces are arranged in the outer peripheral region corresponding to at least four corners of the semiconductor element,
at least one of the wire pieces extends toward the center of the element in the plan view ;
The wiring member includes a front side wiring member (50, 55) arranged on the front side and electrically connected to the surface electrode,
The joining member includes a front joining member (81) forming a joining portion between the surface electrode and the front wiring member and having a plurality of wire pieces arranged thereon,
The semiconductor element includes a gate pad (33g) formed on the surface, a gate wiring (34) formed on the surface side and connected to the gate pad, and a part of a protective film formed on the surface, a gate wiring protection part (35) for protecting the gate wiring,
The semiconductor device according to claim 1, wherein the wire piece is arranged at a position not overlapping with the gate wiring protection portion in the front side bonding member . 12. The semiconductor device according to claim 9 , wherein said wire piece in said front side joint member is arranged at a position not overlapping said wire piece in said back side joint member. A semiconductor element having, as main electrodes, a front electrode (31) formed on the front surface and a rear electrode (32) formed on the rear surface opposite to the front surface in the plate thickness direction and having a larger area than the front electrode. (30) and
a joining member interposed between the first opposing surface and the second opposing surface to form a joint;
a wiring member electrically connected to the main electrode via the bonding member;
a plurality of wire pieces (90) arranged in the joining member, fixed to the first opposing surface and protruding from the first opposing surface;
The wiring member includes a back side wiring member (40) arranged on the back side and connected to the back electrode,
The bonding member includes a back side bonding member (80) forming a bonding portion between the back electrode and the back side wiring member and having a plurality of wire pieces arranged thereon,
The back side bonding member includes a central region (80a) that overlaps the central portion of the semiconductor element including the element center and a portion that overlaps the outer peripheral portion of the semiconductor element surrounding the central portion in a plan view in the plate thickness direction. , and a peripheral region (80b) surrounding the central region,
Four or more wire pieces are arranged in the outer peripheral region corresponding to at least four corners of the semiconductor element,
at least one of the wire pieces extends toward the center of the element in the plan view ;
The wiring member includes a front side wiring member (50, 55) arranged on the front side and electrically connected to the surface electrode,
The joining member includes a front joining member (81) forming a joining portion between the surface electrode and the front wiring member and having a plurality of wire pieces arranged thereon,
The semiconductor device according to claim 1, wherein the wire piece in the front side joint member is arranged at a position not overlapping the wire piece in the back side joint member . The front wiring member includes a first wiring member (55) and a second wiring member (50) connected to the surface electrode via the first wiring member,
The joining member forms a joining portion between the first joining member (81), which is the front joining member, and the second wiring member and the first wiring member, as the joining member arranged on the front side, a second joint member (82) in which the plurality of wire pieces are arranged;
14. Any one of claims 9 to 13 , wherein the numbers of said wire pieces are different in said back side joint member, said first joint member, and said second joint member, and said back side joint member has the largest number and said second joint member has the smallest number. 1. The semiconductor device according to claim 1. A semiconductor element having, as main electrodes, a front electrode (31) formed on the front surface and a rear electrode (32) formed on the rear surface opposite to the front surface in the plate thickness direction and having a larger area than the front electrode. (30) and
a joining member interposed between the first opposing surface and the second opposing surface to form a joint;
a wiring member electrically connected to the main electrode via the bonding member;
a plurality of wire pieces (90) arranged in the joining member, fixed to the first opposing surface and protruding from the first opposing surface;
The wiring member includes a back side wiring member (40) arranged on the back side and connected to the back electrode,
The bonding member includes a back side bonding member (80) forming a bonding portion between the back electrode and the back side wiring member and having a plurality of wire pieces arranged thereon,
The back side bonding member includes a central region (80a) that overlaps the central portion of the semiconductor element including the element center and a portion that overlaps the outer peripheral portion of the semiconductor element surrounding the central portion in a plan view in the plate thickness direction. , and a peripheral region (80b) surrounding the central region,
Four or more wire pieces are arranged in the outer peripheral region corresponding to at least four corners of the semiconductor element,
at least one of the wire pieces extends toward the center of the element in the plan view ;
The wiring member includes a front side wiring member (50, 55) arranged on the front side and electrically connected to the surface electrode,
The joining member includes a front joining member (81) forming a joining portion between the surface electrode and the front wiring member and having a plurality of wire pieces arranged thereon,
The front wiring member includes a first wiring member (55) and a second wiring member (50) connected to the surface electrode via the first wiring member,
The joining member forms a joining portion between the first joining member (81), which is the front joining member, and the second wiring member and the first wiring member, as the joining member arranged on the front side, a second joint member (82) in which the plurality of wire pieces are arranged;
The semiconductor device according to claim 1, wherein the numbers of wire pieces are different in the back side bonding member, the first bonding member, and the second bonding member, and the back side bonding member has the largest number and the second bonding member has the smallest number . A height of the wire piece with respect to the first opposing surface is less than a thickness of the joining member forming a joint between the first opposing surface and the second opposing surface. The semiconductor device according to any one of items 1 and 2.

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