JP2021061393A5 - - Google Patents
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- JP2021061393A5 JP2021061393A5 JP2020158041A JP2020158041A JP2021061393A5 JP 2021061393 A5 JP2021061393 A5 JP 2021061393A5 JP 2020158041 A JP2020158041 A JP 2020158041A JP 2020158041 A JP2020158041 A JP 2020158041A JP 2021061393 A5 JP2021061393 A5 JP 2021061393A5
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- 239000004065 semiconductor Substances 0.000 claims description 53
- 230000002093 peripheral Effects 0.000 claims description 20
- 240000004282 Grewia occidentalis Species 0.000 claims description 7
- 230000001681 protective Effects 0.000 claims description 3
- 230000000875 corresponding Effects 0.000 description 1
Description
ここに開示された半導体装置は、主電極として、表面に形成された表面電極（３１）と、板厚方向において表面とは反対の裏面に形成され、表面電極よりも面積の大きい裏面電極（３２）と、を有する半導体素子（３０）と、第１対向面と第２対向面との間に介在して接合部を形成する接合部材と、接合部材を介して主電極と電気的に接続された配線部材と、接合部材内に配置され、第１対向面に固定されて第１対向面から突起する複数のワイヤ片（９０）と、を備え、配線部材は、裏面側に配置され、裏面電極と接続された裏側配線部材（４０）を含み、接合部材は、裏面電極と裏側配線部材との接合部を形成し、複数のワイヤ片が配置された裏側接合部材（８０）を含み、裏側接合部材は、板厚方向の平面視において、素子中心を含む半導体素子の中央部分と重なる中央領域（８０ａ）と、中央部分を取り囲む半導体素子の外周部分と重なる部分を含み、中央領域を取り囲む外周領域（８０ｂ）と、を有し、外周領域には、４つ以上のワイヤ片が少なくとも半導体素子の四隅のそれぞれに対応して配置され、ワイヤ片の少なくともひとつが、平面視において素子中心に向けて延びている。そして、半導体装置のひとつにおいて、ワイヤ片は、主電極と配線部材との接合部において配線部材に固定されており、板厚方向において主電極と対向する側に、配線部材における固定面と平行な平坦部（９２）を有し、板厚方向において配線部材と対向する側に、配線部材との固定部（９１）と、固定部に連なり、配線部材に固定されていない部分である非固定部（９３）と、を有している。半導体装置の他のひとつにおいて、ワイヤ片は、主電極と配線部材との接合部において配線部材に固定されており、ワイヤ片それぞれの体積が、１．０×１０ ７ μｍ ３ 以下であり、ワイヤ片は、配線部材に接合された部分である接合部（９４）と、接合部に連なるとともにワイヤ片の延設方向の両端にそれぞれ設けられ、配線部材に接合されていない部分である非接合部（９５、９６）と、を有する。半導体装置の他のひとつにおいて、中央領域には、３つ以上のワイヤ片が素子中心を取り囲むように配置されている。半導体装置の他のひとつにおいて、配線部材は、表面側に配置され、表面電極と電気的に接続された表側配線部材（５０、５５）を含み、接合部材は、表面電極と表側配線部材との接合部を形成し、複数のワイヤ片が配置された表側接合部材（８１）を含み、半導体素子は、表面に形成されたゲートパッド（３３ｇ）と、表面側に形成され、ゲートパッドに連なるゲート配線（３４）と、表面に形成された保護膜の一部分であり、ゲート配線を保護するゲート配線保護部（３５）と、を有し、表側接合部材において、ワイヤ片は、ゲート配線保護部と重ならない位置に配置されている。半導体装置の他のひとつにおいて、配線部材は、表面側に配置され、表面電極と電気的に接続された表側配線部材（５０、５５）を含み、接合部材は、表面電極と表側配線部材との接合部を形成し、複数のワイヤ片が配置された表側接合部材（８１）を含み、表側接合部材内のワイヤ片は、裏側接合部材内のワイヤ片と重ならない位置に配置されている。半導体装置の他のひとつにおいて、配線部材は、表面側に配置され、表面電極と電気的に接続された表側配線部材（５０、５５）を含み、接合部材は、表面電極と表側配線部材との接合部を形成し、複数のワイヤ片が配置された表側接合部材（８１）を含み、表側配線部材は、第１配線部材（５５）と、第１配線部材を介して表面電極と接続された第２配線部材（５０）と、を含み、接合部材は、表面側に配置された接合部材として、表側接合部材である第１接合部材（８１）と、第２配線部材と第１配線部材との接合部を形成し、複数のワイヤ片が配置された第２接合部材（８２）と、を含み、ワイヤ片の数が、裏側接合部材、第１接合部材、および第２接合部材において互いに異なり、裏側接合部材が最も多く、第２接合部材が最も少ない。 The semiconductor device disclosed here has a front electrode (31) formed on the front surface as a main electrode and a back electrode (32) formed on the back surface opposite to the front surface in the plate thickness direction and having a larger area than the front surface electrode. ), A joining member that forms a joining portion between the first facing surface and the second facing surface, and electrically connected to the main electrode via the joining member. The wiring member is provided with a plurality of wire pieces (90) arranged in the joining member and fixed to the first facing surface and protruding from the first facing surface, and the wiring member is arranged on the back surface side and is arranged on the back surface side. The back side wiring member (40) connected to the electrode is included, and the joining member includes a back side joining member (80) in which a joint portion between the back side electrode and the back side wiring member is formed and a plurality of wire pieces are arranged, and the back side. The joining member includes a central region (80a) that overlaps the central portion of the semiconductor element including the center of the element and a portion that overlaps the outer peripheral portion of the semiconductor element that surrounds the central portion in a plan view in the plate thickness direction, and the outer periphery that surrounds the central region. It has a region (80b), and in the outer peripheral region, four or more wire pieces are arranged corresponding to at least each of the four corners of the semiconductor element, and at least one of the wire pieces is directed toward the element center in a plan view. Is extending. In one of the semiconductor devices, the wire piece is fixed to the wiring member at the joint between the main electrode and the wiring member, and is parallel to the fixed surface of the wiring member on the side facing the main electrode in the plate thickness direction. A non-fixed portion having a flat portion (92) and connected to a fixed portion (91) with the wiring member and not fixed to the wiring member on the side facing the wiring member in the plate thickness direction. (93) and. In another one of the semiconductor device, the wire piece is fixed to the wiring member at the junction between the main electrode and the wiring member, each volume wire piece is a 1.0 × 10 7 μm 3 or less, wire The pieces are a joint portion (94) which is a portion joined to the wiring member and a non-joint portion which is connected to the joint portion and is provided at both ends in the extending direction of the wire piece and is not joined to the wiring member. (95, 96) and. In the other one of the semiconductor devices, three or more wire pieces are arranged so as to surround the element center in the central region. In the other one of the semiconductor devices, the wiring member includes the front side wiring members (50, 55) arranged on the surface side and electrically connected to the surface electrode, and the joining member is the surface electrode and the front side wiring member. The semiconductor element includes a front side joining member (81) forming a joining portion and arranging a plurality of wire pieces, and a gate pad (33 g) formed on the surface and a gate formed on the surface side and connected to the gate pad. It has a wiring (34) and a gate wiring protection portion (35) that is a part of a protective film formed on the surface and protects the gate wiring. In the front side joining member, the wire piece is a gate wiring protection portion. It is placed in a position where it does not overlap. In the other one of the semiconductor devices, the wiring member includes a front side wiring member (50, 55) arranged on the surface side and electrically connected to the surface electrode, and the joining member is a surface electrode and the front side wiring member. A front-side joining member (81) that forms a joining portion and has a plurality of wire pieces arranged therein is included, and the wire pieces in the front-side joining member are arranged at positions that do not overlap with the wire pieces in the back-side joining member. In the other one of the semiconductor devices, the wiring member includes the front side wiring member (50, 55) arranged on the surface side and electrically connected to the surface electrode, and the joining member is the surface electrode and the front side wiring member. A front side joining member (81) forming a joint portion and having a plurality of wire pieces arranged therein was included, and the front side wiring member was connected to the surface electrode via the first wiring member (55) and the first wiring member. The joining member includes the second wiring member (50), and the joining member includes a first joining member (81) which is a front side joining member, a second wiring member, and a first wiring member as joining members arranged on the surface side. The number of wire pieces is different in the back side joining member, the first joining member, and the second joining member, including the second joining member (82) in which the joining portion is formed and a plurality of wire pieces are arranged. , The back side joining member is the most, and the second joining member is the least.
Claims (16)
第１対向面と第２対向面との間に介在して接合部を形成する接合部材と、
前記接合部材を介して前記主電極と電気的に接続された配線部材と、
前記接合部材内に配置され、前記第１対向面に固定されて前記第１対向面から突起する複数のワイヤ片（９０）と、を備え、
前記配線部材は、前記裏面側に配置され、前記裏面電極と接続された裏側配線部材（４０）を含み、
前記接合部材は、前記裏面電極と前記裏側配線部材との接合部を形成し、複数の前記ワイヤ片が配置された裏側接合部材（８０）を含み、
前記裏側接合部材は、前記板厚方向の平面視において、素子中心を含む前記半導体素子の中央部分と重なる中央領域（８０ａ）と、前記中央部分を取り囲む前記半導体素子の外周部分と重なる部分を含み、前記中央領域を取り囲む外周領域（８０ｂ）と、を有し、
前記外周領域には、４つ以上の前記ワイヤ片が少なくとも前記半導体素子の四隅のそれぞれに対応して配置され、
前記ワイヤ片の少なくともひとつが、前記平面視において前記素子中心に向けて延びており、
前記ワイヤ片は、
前記主電極と前記配線部材との接合部において前記配線部材に固定されており、
前記板厚方向において前記主電極と対向する側に、前記配線部材における固定面と平行な平坦部（９２）を有し、
前記板厚方向において前記配線部材と対向する側に、前記配線部材との固定部（９１）と、前記固定部に連なり、前記配線部材に固定されていない部分である非固定部（９３）と、を有している半導体装置。 A semiconductor device having a front electrode (31) formed on the front surface as a main electrode and a back electrode (32) formed on the back surface opposite to the front surface in the plate thickness direction and having a larger area than the front surface electrode. (30) and
A joint member that is interposed between the first facing surface and the second facing surface to form a joint portion,
A wiring member electrically connected to the main electrode via the joining member,
A plurality of wire pieces (90) arranged in the joining member, fixed to the first facing surface, and projecting from the first facing surface are provided.
The wiring member includes a back side wiring member (40) arranged on the back surface side and connected to the back surface electrode.
The joining member includes a back side joining member (80) in which a joining portion between the back surface electrode and the back side wiring member is formed and a plurality of the wire pieces are arranged.
The back-side joining member includes a central region (80a) that overlaps the central portion of the semiconductor element including the element center and a portion that overlaps the outer peripheral portion of the semiconductor element that surrounds the central portion in a plan view in the plate thickness direction. , And an outer peripheral region (80b) surrounding the central region.
In the outer peripheral region, four or more wire pieces are arranged so as to correspond to at least each of the four corners of the semiconductor element.
At least one of the wire pieces extends toward the element center in the plan view .
The wire piece is
It is fixed to the wiring member at the joint between the main electrode and the wiring member.
A flat portion (92) parallel to the fixed surface of the wiring member is provided on the side facing the main electrode in the plate thickness direction.
On the side facing the wiring member in the plate thickness direction, a fixing portion (91) with the wiring member and a non-fixing portion (93) which is a portion connected to the fixing portion and not fixed to the wiring member. A semiconductor device that has.
第１対向面と第２対向面との間に介在して接合部を形成する接合部材と、
前記接合部材を介して前記主電極と電気的に接続された配線部材と、
前記接合部材内に配置され、前記第１対向面に固定されて前記第１対向面から突起する複数のワイヤ片（９０）と、を備え、
前記配線部材は、前記裏面側に配置され、前記裏面電極と接続された裏側配線部材（４０）を含み、
前記接合部材は、前記裏面電極と前記裏側配線部材との接合部を形成し、複数の前記ワイヤ片が配置された裏側接合部材（８０）を含み、
前記裏側接合部材は、前記板厚方向の平面視において、素子中心を含む前記半導体素子の中央部分と重なる中央領域（８０ａ）と、前記中央部分を取り囲む前記半導体素子の外周部分と重なる部分を含み、前記中央領域を取り囲む外周領域（８０ｂ）と、を有し、
前記外周領域には、４つ以上の前記ワイヤ片が少なくとも前記半導体素子の四隅のそれぞれに対応して配置され、
前記ワイヤ片の少なくともひとつが、前記平面視において前記素子中心に向けて延びており、
前記ワイヤ片は、前記主電極と前記配線部材との接合部において前記配線部材に固定されており、
前記ワイヤ片それぞれの体積が、１．０×１０ ７ μｍ ３ 以下であり、
前記ワイヤ片は、前記配線部材に接合された部分である接合部（９４）と、前記接合部に連なるとともに前記ワイヤ片の延設方向の両端にそれぞれ設けられ、前記配線部材に接合されていない部分である非接合部（９５、９６）と、を有する半導体装置。 A semiconductor device having a front electrode (31) formed on the front surface as a main electrode and a back electrode (32) formed on the back surface opposite to the front surface in the plate thickness direction and having a larger area than the front surface electrode. (30) and
A joint member that is interposed between the first facing surface and the second facing surface to form a joint portion,
A wiring member electrically connected to the main electrode via the joining member,
A plurality of wire pieces (90) arranged in the joining member, fixed to the first facing surface, and projecting from the first facing surface are provided.
The wiring member includes a back side wiring member (40) arranged on the back surface side and connected to the back surface electrode.
The joining member includes a back side joining member (80) in which a joining portion between the back surface electrode and the back side wiring member is formed and a plurality of the wire pieces are arranged.
The back-side joining member includes a central region (80a) that overlaps the central portion of the semiconductor element including the element center and a portion that overlaps the outer peripheral portion of the semiconductor element that surrounds the central portion in a plan view in the plate thickness direction. , And an outer peripheral region (80b) surrounding the central region.
In the outer peripheral region, four or more wire pieces are arranged so as to correspond to at least each of the four corners of the semiconductor element.
At least one of the wire pieces extends toward the element center in the plan view .
The wire piece is fixed to the wiring member at a joint portion between the main electrode and the wiring member.
It said wire pieces each volume is a 1.0 × 10 7 μm 3 or less,
The wire piece is provided at both ends of a joint portion (94) which is a portion joined to the wiring member, is connected to the joint portion, and is provided at both ends in the extending direction of the wire piece, and is not joined to the wiring member. A semiconductor device having a non-joint portion (95, 96) which is a portion.
第１対向面と第２対向面との間に介在して接合部を形成する接合部材と、
前記接合部材を介して前記主電極と電気的に接続された配線部材と、
前記接合部材内に配置され、前記第１対向面に固定されて前記第１対向面から突起する複数のワイヤ片（９０）と、を備え、
前記配線部材は、前記裏面側に配置され、前記裏面電極と接続された裏側配線部材（４０）を含み、
前記接合部材は、前記裏面電極と前記裏側配線部材との接合部を形成し、複数の前記ワイヤ片が配置された裏側接合部材（８０）を含み、
前記裏側接合部材は、前記板厚方向の平面視において、素子中心を含む前記半導体素子の中央部分と重なる中央領域（８０ａ）と、前記中央部分を取り囲む前記半導体素子の外周部分と重なる部分を含み、前記中央領域を取り囲む外周領域（８０ｂ）と、を有し、
前記外周領域には、４つ以上の前記ワイヤ片が少なくとも前記半導体素子の四隅のそれぞれに対応して配置され、
前記ワイヤ片の少なくともひとつが、前記平面視において前記素子中心に向けて延びており、
前記中央領域には、３つ以上の前記ワイヤ片が前記素子中心を取り囲むように配置されている半導体装置。 A semiconductor device having a front electrode (31) formed on the front surface as a main electrode and a back electrode (32) formed on the back surface opposite to the front surface in the plate thickness direction and having a larger area than the front surface electrode. (30) and
A joint member that is interposed between the first facing surface and the second facing surface to form a joint portion,
A wiring member electrically connected to the main electrode via the joining member,
A plurality of wire pieces (90) arranged in the joining member, fixed to the first facing surface, and projecting from the first facing surface are provided.
The wiring member includes a back side wiring member (40) arranged on the back surface side and connected to the back surface electrode.
The joining member includes a back side joining member (80) in which a joining portion between the back surface electrode and the back side wiring member is formed and a plurality of the wire pieces are arranged.
The back-side joining member includes a central region (80a) that overlaps the central portion of the semiconductor element including the element center and a portion that overlaps the outer peripheral portion of the semiconductor element that surrounds the central portion in a plan view in the plate thickness direction. , And an outer peripheral region (80b) surrounding the central region.
In the outer peripheral region, four or more wire pieces are arranged so as to correspond to at least each of the four corners of the semiconductor element.
At least one of the wire pieces extends toward the element center in the plan view .
A semiconductor device in which three or more wire pieces are arranged so as to surround the element center in the central region.
前記接合部材は、前記表面電極と前記表側配線部材との接合部を形成し、複数の前記ワイヤ片が配置された表側接合部材（８１）を含む請求項１〜８いずれか１項に記載の半導体装置。 The wiring member includes a front side wiring member (50, 55) arranged on the surface side and electrically connected to the surface electrode.
The one according to any one of claims 1 to 8 , wherein the joining member forms a joining portion between the surface electrode and the front side wiring member, and includes a front side joining member (81) in which a plurality of the wire pieces are arranged. Semiconductor device.
前記表側接合部材において、前記ワイヤ片は、前記ゲート配線保護部と重ならない位置に配置されている請求項９に記載の半導体装置。 The semiconductor element is a part of a gate pad (33 g) formed on the surface, a gate wiring (34) formed on the surface side and connected to the gate pad, and a protective film formed on the surface. It has a gate wiring protection unit (35) that protects the gate wiring, and has a gate wiring protection unit (35).
The semiconductor device according to claim 9 , wherein in the front-side joining member, the wire piece is arranged at a position where it does not overlap with the gate wiring protection portion.
第１対向面と第２対向面との間に介在して接合部を形成する接合部材と、
前記接合部材を介して前記主電極と電気的に接続された配線部材と、
前記接合部材内に配置され、前記第１対向面に固定されて前記第１対向面から突起する複数のワイヤ片（９０）と、を備え、
前記配線部材は、前記裏面側に配置され、前記裏面電極と接続された裏側配線部材（４０）を含み、
前記接合部材は、前記裏面電極と前記裏側配線部材との接合部を形成し、複数の前記ワイヤ片が配置された裏側接合部材（８０）を含み、
前記裏側接合部材は、前記板厚方向の平面視において、素子中心を含む前記半導体素子の中央部分と重なる中央領域（８０ａ）と、前記中央部分を取り囲む前記半導体素子の外周部分と重なる部分を含み、前記中央領域を取り囲む外周領域（８０ｂ）と、を有し、
前記外周領域には、４つ以上の前記ワイヤ片が少なくとも前記半導体素子の四隅のそれぞれに対応して配置され、
前記ワイヤ片の少なくともひとつが、前記平面視において前記素子中心に向けて延びており、
前記配線部材は、前記表面側に配置され、前記表面電極と電気的に接続された表側配線部材（５０、５５）を含み、
前記接合部材は、前記表面電極と前記表側配線部材との接合部を形成し、複数の前記ワイヤ片が配置された表側接合部材（８１）を含み、
前記半導体素子は、前記表面に形成されたゲートパッド（３３ｇ）と、前記表面側に形成され、前記ゲートパッドに連なるゲート配線（３４）と、前記表面に形成された保護膜の一部分であり、前記ゲート配線を保護するゲート配線保護部（３５）と、を有し、
前記表側接合部材において、前記ワイヤ片は、前記ゲート配線保護部と重ならない位置に配置されている半導体装置。 A semiconductor device having a front electrode (31) formed on the front surface as a main electrode and a back electrode (32) formed on the back surface opposite to the front surface in the plate thickness direction and having a larger area than the front surface electrode. (30) and
A joint member that is interposed between the first facing surface and the second facing surface to form a joint portion,
A wiring member electrically connected to the main electrode via the joining member,
A plurality of wire pieces (90) arranged in the joining member, fixed to the first facing surface, and projecting from the first facing surface are provided.
The wiring member includes a back side wiring member (40) arranged on the back surface side and connected to the back surface electrode.
The joining member includes a back side joining member (80) in which a joining portion between the back surface electrode and the back side wiring member is formed and a plurality of the wire pieces are arranged.
The back-side joining member includes a central region (80a) that overlaps the central portion of the semiconductor element including the element center and a portion that overlaps the outer peripheral portion of the semiconductor element that surrounds the central portion in a plan view in the plate thickness direction. , And an outer peripheral region (80b) surrounding the central region.
In the outer peripheral region, four or more wire pieces are arranged so as to correspond to at least each of the four corners of the semiconductor element.
At least one of the wire pieces extends toward the element center in the plan view .
The wiring member includes a front side wiring member (50, 55) arranged on the surface side and electrically connected to the surface electrode.
The joining member includes a front-side joining member (81) in which a joining portion between the surface electrode and the front-side wiring member is formed and a plurality of the wire pieces are arranged.
The semiconductor element is a part of a gate pad (33 g) formed on the surface, a gate wiring (34) formed on the surface side and connected to the gate pad, and a protective film formed on the surface. It has a gate wiring protection unit (35) that protects the gate wiring, and has a gate wiring protection unit (35).
A semiconductor device in which the wire piece of the front-side joining member is arranged at a position where it does not overlap with the gate wiring protection portion.
第１対向面と第２対向面との間に介在して接合部を形成する接合部材と、
前記接合部材を介して前記主電極と電気的に接続された配線部材と、
前記接合部材内に配置され、前記第１対向面に固定されて前記第１対向面から突起する複数のワイヤ片（９０）と、を備え、
前記配線部材は、前記裏面側に配置され、前記裏面電極と接続された裏側配線部材（４０）を含み、
前記接合部材は、前記裏面電極と前記裏側配線部材との接合部を形成し、複数の前記ワイヤ片が配置された裏側接合部材（８０）を含み、
前記裏側接合部材は、前記板厚方向の平面視において、素子中心を含む前記半導体素子の中央部分と重なる中央領域（８０ａ）と、前記中央部分を取り囲む前記半導体素子の外周部分と重なる部分を含み、前記中央領域を取り囲む外周領域（８０ｂ）と、を有し、
前記外周領域には、４つ以上の前記ワイヤ片が少なくとも前記半導体素子の四隅のそれぞれに対応して配置され、
前記ワイヤ片の少なくともひとつが、前記平面視において前記素子中心に向けて延びており、
前記配線部材は、前記表面側に配置され、前記表面電極と電気的に接続された表側配線部材（５０、５５）を含み、
前記接合部材は、前記表面電極と前記表側配線部材との接合部を形成し、複数の前記ワイヤ片が配置された表側接合部材（８１）を含み、
前記表側接合部材内の前記ワイヤ片は、前記裏側接合部材内の前記ワイヤ片と重ならない位置に配置されている半導体装置。 A semiconductor device having a front electrode (31) formed on the front surface as a main electrode and a back electrode (32) formed on the back surface opposite to the front surface in the plate thickness direction and having a larger area than the front surface electrode. (30) and
A joint member that is interposed between the first facing surface and the second facing surface to form a joint portion,
A wiring member electrically connected to the main electrode via the joining member,
A plurality of wire pieces (90) arranged in the joining member, fixed to the first facing surface, and projecting from the first facing surface are provided.
The wiring member includes a back side wiring member (40) arranged on the back surface side and connected to the back surface electrode.
The joining member includes a back side joining member (80) in which a joining portion between the back surface electrode and the back side wiring member is formed and a plurality of the wire pieces are arranged.
The back-side joining member includes a central region (80a) that overlaps the central portion of the semiconductor element including the element center and a portion that overlaps the outer peripheral portion of the semiconductor element that surrounds the central portion in a plan view in the plate thickness direction. , And an outer peripheral region (80b) surrounding the central region.
In the outer peripheral region, four or more wire pieces are arranged so as to correspond to at least each of the four corners of the semiconductor element.
At least one of the wire pieces extends toward the element center in the plan view .
The wiring member includes a front side wiring member (50, 55) arranged on the surface side and electrically connected to the surface electrode.
The joining member includes a front-side joining member (81) in which a joining portion between the surface electrode and the front-side wiring member is formed and a plurality of the wire pieces are arranged.
A semiconductor device in which the wire piece in the front side joining member is arranged at a position where it does not overlap with the wire piece in the back side joining member.
前記接合部材は、前記表面側に配置された接合部材として、前記表側接合部材である第１接合部材（８１）と、前記第２配線部材と前記第１配線部材との接合部を形成し、複数の前記ワイヤ片が配置された第２接合部材（８２）と、を含み、
前記ワイヤ片の数が、前記裏側接合部材、前記第１接合部材、および前記第２接合部材において互いに異なり、前記裏側接合部材が最も多く、前記第２接合部材が最も少ない請求項９〜１３いずれか１項に記載の半導体装置。 The front side wiring member includes a first wiring member (55) and a second wiring member (50) connected to the surface electrode via the first wiring member.
The joint member forms a joint portion between the first joint member (81), which is the front side joint member, and the second wiring member and the first wiring member, as the joint member arranged on the surface side. Including a second joining member (82) in which a plurality of the wire pieces are arranged,
The number of the wire piece, the back side bonding member, wherein the first joining member, and differ from each other in said second joint member, wherein the largest number back joining members, either the second joint member fewest claims 9 to 13 The semiconductor device according to item 1.
第１対向面と第２対向面との間に介在して接合部を形成する接合部材と、
前記接合部材を介して前記主電極と電気的に接続された配線部材と、
前記接合部材内に配置され、前記第１対向面に固定されて前記第１対向面から突起する複数のワイヤ片（９０）と、を備え、
前記配線部材は、前記裏面側に配置され、前記裏面電極と接続された裏側配線部材（４０）を含み、
前記接合部材は、前記裏面電極と前記裏側配線部材との接合部を形成し、複数の前記ワイヤ片が配置された裏側接合部材（８０）を含み、
前記裏側接合部材は、前記板厚方向の平面視において、素子中心を含む前記半導体素子の中央部分と重なる中央領域（８０ａ）と、前記中央部分を取り囲む前記半導体素子の外周部分と重なる部分を含み、前記中央領域を取り囲む外周領域（８０ｂ）と、を有し、
前記外周領域には、４つ以上の前記ワイヤ片が少なくとも前記半導体素子の四隅のそれぞれに対応して配置され、
前記ワイヤ片の少なくともひとつが、前記平面視において前記素子中心に向けて延びており、
前記配線部材は、前記表面側に配置され、前記表面電極と電気的に接続された表側配線部材（５０、５５）を含み、
前記接合部材は、前記表面電極と前記表側配線部材との接合部を形成し、複数の前記ワイヤ片が配置された表側接合部材（８１）を含み、
前記表側配線部材は、第１配線部材（５５）と、前記第１配線部材を介して前記表面電極と接続された第２配線部材（５０）と、を含み、
前記接合部材は、前記表面側に配置された接合部材として、前記表側接合部材である第１接合部材（８１）と、前記第２配線部材と前記第１配線部材との接合部を形成し、複数の前記ワイヤ片が配置された第２接合部材（８２）と、を含み、
前記ワイヤ片の数が、前記裏側接合部材、前記第１接合部材、および前記第２接合部材において互いに異なり、前記裏側接合部材が最も多く、前記第２接合部材が最も少ない半導体装置。 A semiconductor device having a front electrode (31) formed on the front surface as a main electrode and a back electrode (32) formed on the back surface opposite to the front surface in the plate thickness direction and having a larger area than the front surface electrode. (30) and
A joint member that is interposed between the first facing surface and the second facing surface to form a joint portion,
A wiring member electrically connected to the main electrode via the joining member,
A plurality of wire pieces (90) arranged in the joining member, fixed to the first facing surface, and projecting from the first facing surface are provided.
The wiring member includes a back side wiring member (40) arranged on the back surface side and connected to the back surface electrode.
The joining member includes a back side joining member (80) in which a joining portion between the back surface electrode and the back side wiring member is formed and a plurality of the wire pieces are arranged.
The back-side joining member includes a central region (80a) that overlaps the central portion of the semiconductor element including the element center and a portion that overlaps the outer peripheral portion of the semiconductor element that surrounds the central portion in a plan view in the plate thickness direction. , And an outer peripheral region (80b) surrounding the central region.
In the outer peripheral region, four or more wire pieces are arranged so as to correspond to at least each of the four corners of the semiconductor element.
At least one of the wire pieces extends toward the element center in the plan view .
The wiring member includes a front side wiring member (50, 55) arranged on the surface side and electrically connected to the surface electrode.
The joining member includes a front-side joining member (81) in which a joining portion between the surface electrode and the front-side wiring member is formed and a plurality of the wire pieces are arranged.
The front side wiring member includes a first wiring member (55) and a second wiring member (50) connected to the surface electrode via the first wiring member.
The joint member forms a joint portion between the first joint member (81), which is the front side joint member, and the second wiring member and the first wiring member, as the joint member arranged on the surface side. Including a second joining member (82) in which a plurality of the wire pieces are arranged,
A semiconductor device in which the number of wire pieces differs from each other in the back side joining member, the first joining member, and the second joining member, the back side joining member is the largest, and the second joining member is the least .
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| PCT/JP2020/036372 WO2021065736A1 (en) | 2019-10-04 | 2020-09-25 | Semiconductor device |
| US17/708,525 US20220223544A1 (en) | 2019-10-04 | 2022-03-30 | Semiconductor device |
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