JP6981842B2 - Output device - Google Patents

Description

The present invention relates to a device that outputs a deterioration status.

A switching regulator using an FET is generally used as a device for converting a DC voltage into a lower DC voltage (see Patent Document 1 and Non-Patent Document 1). Here, FET means a field effect transistor and is an abbreviation for Field effect transistor.

Here, Patent Document 1 discloses a switching regulator that notifies a smoothing electrolytic capacitor when it is determined that the life of the electrolytic capacitor is at the end.

Further, Non-Patent Document 1 discloses a synchronous rectification type switching regulator in relation to the present invention.

In addition, Non-Patent Document 2 discloses a sensor IC (Integrated Circuit) in relation to the present invention.

Japanese Unexamined Patent Publication No. 2016-201962

EDN JAPAN, "Synchronous rectification", [Searched on October 6, 2017], Internet (http://ednjapan.com/edn/articles/1003/03/news106.html) Product List, "0-50A Conductor Integrated Sensor IC" Allegro MicroSystems, LLC, [Searched October 6, 2017], Internet (http://www.alllegromicro.com/ja-JP/Products/Current-Sensor -ICs / Zero-To-Fifty-Amp-Integrated-Conductor-Sensor-ICs.aspx)

Patent Document 1 can notify that when the life of the electrolytic capacitor is approaching the end. However, in switching regulators, solid capacitors having a long life are often used instead of electrolytic capacitors. In that case, the life of the switching regulator is often determined by the life of the FET. However, so far, a method for estimating the life of FETs in switching regulators has not been known.

An object of the present invention is to provide an output device or the like that can support grasping the deterioration status of a field effect transistor included in a switching regulator.

The output device of the present invention includes a derivation unit for deriving power information representing the power consumed between the source and drain of the field effect transistor included in the switching regulator, and an output unit for outputting the power information.

The output device or the like of the present invention can support grasping the deterioration state of the field effect transistor included in the switching regulator.

It is a conceptual diagram which shows the structural example of the converter apparatus of this embodiment. It is a conceptual diagram which shows the structural example of the switching regulator to which the output device of this embodiment can be applied. It is a conceptual diagram which shows the structural example of the output device of this embodiment. It is an image diagram which shows the example of the voltage waveform, the current waveform and the power waveform when the FET performs ideal switching. It is an image diagram which shows the example of the voltage waveform in the FET which deteriorated. It is an image diagram which shows the example of the voltage waveform, the current waveform, and the power waveform in the deteriorated FET. It is a block diagram which shows the minimum structure of the output device of embodiment.

[Configuration and operation]
FIG. 1 is a conceptual diagram showing a configuration of a converter device 101, which is an example of the converter device of the present embodiment.

The converter device 101 is a combination of the switching regulator 201 shown in FIG. 2 and the output device 301 shown in FIG. Here, the switching regulator 201 is an example of a switching regulator to which the output device of the present embodiment can be applied. Further, the output device 301 is an example of the output device of the present embodiment.

The switching regulator 201 shown in FIG. 2 is a well-known synchronous rectification type switching regulator. Non-Patent Document 1 discloses a synchronous rectification type switching regulator.

A DC input voltage is input to the terminal A. A gate voltage that switches at a predetermined duty ratio is input to the terminal C. Further, a gate voltage that switches in the opposite phase to the gate voltage input to the terminal C is input to the terminal D. As a result, a DC output voltage lower than the input voltage according to the duty ratio is output from the terminal B. It is assumed that the output voltage is supplied to an external load.

As described in Non-Patent Document 2, the details of the operation of the switching regulator 201 are well known, and thus the description thereof will be omitted here.

The detection unit 131a continuously detects a time change of the current at the installation position of the detection unit 131a of the route, and sequentially sends the first current information, which is information representing the detected current, to the processing unit 146. .. The detection unit 131a also continuously detects the time change of the voltage at the installation position of the detection unit 131a in the path, and sequentially sends the first voltage information, which is the information representing the detected voltage, to the processing unit 146. ..

The detection unit 131b continuously detects the time change of the current at the installation position of the detection unit 131b of the route, and sequentially sends the second current information, which is the information representing the detected current, to the processing unit 146. .. The detection unit 131b also continuously detects the time change of the voltage at the installation position of the detection unit 131b in the path, and sequentially sends the second voltage information, which is the information representing the detected voltage, to the processing unit 146. ..

As the detection units 131a and 131b, for example, commercially available sensor ICs can be used. Here, IC is an abbreviation for Integrated Circuit. As a commercially available sensor IC, for example, the one described in Non-Patent Document 2 can be used.

The temperature sensor 126a continuously measures the time change of the temperature in the vicinity of the FETs 111a and 111b. The temperature sensor 126a sends temperature information, which is information representing the measured temperature, to the processing unit 146.

The processing unit 146 derives a third voltage, which is a voltage between the source and drain of the FET 111a, from the first voltage information sent from the detection unit 131a and the second voltage information sent from the detection unit 131b. Then, the processing unit 146 continuously derives the first power, which is the power consumption generated between the source and the drain of the FET 111a, from the first current value and the third voltage included in the first current information.

The processing unit 146 also continuously derives the second power, which is the power consumption generated between the source and the drain of the FET 111b, from the second voltage, the second current value, and the third voltage. Here, the second voltage is included in the second voltage information sent from the detection unit 131b. Further, the second current value is included in the second current information also sent from the detection unit 131b.

The processing unit 146 causes the output unit 151 to output the following seven output information.

The first output information is a time change (waveform) of the first current value included in the first current information. The first current value corresponds to the current flowing between the source and the drain of the FET 111a. The waveform of the first current value may change due to deterioration of the FET 111a. Therefore, the waveform of the first current value can be an index showing the deterioration of the FET 111a.

The second output information is a time change (waveform) of the third voltage. As described above, the third voltage corresponds to the voltage between the source and drain of the FET 111a. It is empirically understood that when the switching characteristic of the FET 111a deteriorates, ringing noise may appear in the voltage waveform between the source and the drain, as will be described later. An example of how ringing noise appears will be described later with reference to FIG. Therefore, the voltage waveform of the third voltage can be an index showing the deterioration of the FET 111a.

The third output information is the time change of the first electric power. The first power corresponds to the power consumption between the source and the drain of the FET 111a. The power consumption of a FET is zero when the FET performs ideal switching operations. However, it is assumed that the FET deteriorates and, for example, the rising edge and falling edge during switching become dull. Then, at the timing of blunt rising and falling, there may be a time zone in which the resistance value between the source and the drain becomes small enough not to cut off the current. In that case, the current flowing between the source and the drain of the resistance value may cause power consumption between the source and the drain. An example of the case where power consumption can occur between the source and the drain will be described later with reference to FIG. For the above reason, the first power can be an index indicating deterioration of the FET 111a.

The fourth output information is a time change (waveform) of the second current value included in the second current information. By the same description as the description of the waveform of the first current value described above, the waveform of the second current value can be an index showing the deterioration of the FET 111b.

The fifth output information is a time change (waveform) of the second voltage. By the same description as the description of the waveform of the third voltage described above, the voltage waveform of the second voltage can be an index showing the deterioration of the FET 111b.

The sixth output information is a time change (waveform) of the first power. By the same description as the description of the waveform of the first power described above, the second power can be an index showing the deterioration of the FET 111b.

The seventh output information is the temperature in the vicinity of the FETs 111a and 111b sent from the temperature sensor 126a.

When the power consumption between the source and the drain of any one of the FETs 111a and 111b increases, the power consumption increases and heat is generated. Therefore, the temperature in the vicinity of the FETs 111a and 111b may rise. Therefore, the temperature in the vicinity of the FETs 111a and 111b can be an index indicating the deterioration of at least one of the FETs 111a and 111b.

The processing unit 146 does not necessarily have to output all seven output information to the output unit. The processing unit 146 may output only a part of the seven output information.

The processing unit 146 may also derive deterioration information indicating the degree of deterioration of each FET from the output information in place of the output information or in addition to the output information, and output the deterioration information to the output unit 151. ..

The deterioration information is, for example, the amplitude of the waveform of the third voltage or the second voltage. When the FET deteriorates as described above, ringing noise may occur in the waveform of the third voltage or the waveform of the second voltage. When ringing noise occurs, the amplitude of the third voltage and the second voltage increases. Therefore, the third voltage or the maximum value of the second voltage is appropriate as deterioration information indicating the degree of deterioration of each FET.

The deterioration information is, for example, the amplitude of the waveform of the first power or the second power. As described above, the power consumption between the source and drain of the FET is an index of the deterioration of the FET. Therefore, the amplitude of the waveforms of the first power and the second power is appropriate as deterioration information indicating the degree of deterioration of each FET.

The temperature information described above is the deterioration information itself according to the above description.

The processing unit 146 may derive a determination result regarding the degree of deterioration from one or more of the deterioration information, and may output the derived determination result to the output unit 151.

The determination related to the determination result is to determine, for example, that the FET 111a has reached the end of its life when the amplitude of the first power is the threshold value Th1 or more. Here, the threshold value Th1 is a threshold value for the amplitude of the first power set in advance for the determination.

In the determination, for example, when the amplitude of the first power is equal to or more than the threshold value Th2 and less than the threshold value Th1, it is determined that the life of the FET 111a is approaching. Here, the threshold value Th2 is a threshold value for the amplitude of the first power set in advance for the determination. The threshold value Th2 is a value smaller than that of Th1.

The determination is, for example, to determine that the FET 111a has reached the end of its life when the first power is at least the threshold Th1 and the third voltage is at least Th3. Here, the threshold value Th3 is a threshold value for the amplitude of the third voltage preset for the determination.

The determination is, for example, determining that the FET 111a has reached the end of its life when the first power is equal to or higher than the threshold Th1 or the third voltage is equal to or higher than the threshold Th3.

In the determination, for example, when the first power is the threshold Th1 or more, the third voltage is the threshold Th3 or more, and the temperature is the threshold Th4 or more, the FET 111a has a lifetime. It is to determine that there is. Here, the threshold value Th4 is a threshold value for the temperature preset for the determination.

In the determination, for example, when the second power is the threshold value Th5 or more, the second voltage is the threshold value Th6 or more, and the temperature is the threshold value Th4 or more, the FET 111b has a lifetime. It is to judge that it is. Here, the threshold value Th5 is a threshold value for the second electric power preset for the determination. Further, the threshold value Th6 is a threshold value for the second voltage preset for the determination.

The output unit 151 shown in FIG. 1 outputs the information instructed by the processing unit 146 in accordance with the instructions of the processing unit 146. The output unit 151 is, for example, a display device.

The temperature sensor 126a may measure each of the temperature in the vicinity of the detection unit 131a and the temperature in the vicinity of the detection unit 131b. In that case, the temperature sensor 126a sends information representing each of the temperature in the vicinity of the detection unit 131a and the temperature in the vicinity of the detection unit 131b to the processing unit 146.

The temperature sensor 126a may measure each of the temperature of the detection unit 131a and the temperature in the vicinity of the detection unit 131b. In that case, the temperature sensor 126a sends information representing each of the temperature in the vicinity of the detection unit 131a and the temperature in the vicinity of the detection unit 131b to the processing unit 146.

Next, with reference to FIGS. 4 to 6, examples of current waveforms, voltage waveforms, and power waveforms when signs of deterioration appear in the FET will be described.

FIG. 4 is an image diagram showing a voltage waveform, a current waveform, and a power waveform when the FET performs ideal switching. Here, the voltage waveform shown in FIG. 4 is the waveform of the third voltage or the second voltage. The current waveform shown in FIG. 4 is the waveform of the first current or the second current. The power waveform shown in FIG. 4 is the waveform of the first power or the second power.

The voltage waveform alternately repeats a period in which the voltage at time ΔT1 is zero and a period in which the voltage at time ΔT2 is V1. The period in which the voltage of the time ΔT1 is zero is the period in which the gate voltage for short-circuiting the source and drain is applied to the gate of the FET. On the other hand, the period in which the voltage of the time ΔT2 is V1 is the period in which the gate voltage is not applied to the gate of the FET. When the FET performs ideal switching, the source and drain of the FET are short-circuited at the moment when the gate voltage is applied to the gate of the FET. In the same case, the source and drain of the FET are isolated at the moment when the application of the gate voltage is stopped. Therefore, the voltage waveform is shown in FIG.

Although FIG. 4 shows a case where the time ΔT1 and the time ΔT2 are close to each other, it can be assumed that the time ΔT1 and the time ΔT2 are significantly different from each other. It can also be assumed that the time ΔT1 and the time ΔT2 are the same. How to set the time ΔT1 and the time ΔT2 is set by the output voltage value from the terminal B shown in FIG.

On the other hand, in the current waveform shown in FIG. 4, the period of time ΔT1 shown in FIG. 4 increases, and the period of time ΔT2 becomes zero. It is the effect of the coil 136 and the capacitor 141 shown in FIG. 1 that increase in the period of time ΔT1. How the current increases during the period of time Δ1 is determined by the inductance of the coil 136 and the capacitance of the capacitor 141 shown in FIG.

On the other hand, the power shown in FIG. 4 is always zero. In the period of time ΔT1 shown in FIG. 4, since the voltage between the source and the drain is zero, the power between the source and the drain is zero even if a current flows between the source and the drain. Further, in the period of time ΔT2 shown in FIG. 4, since no current flows between the source and the drain, the power between the source and the drain is zero. Therefore, the power between the source and the drain is always zero.

FIG. 5 is an image diagram showing a voltage waveform in a deteriorated FET. The voltage waveform shown in FIG. 5 is the waveform of the third voltage or the second voltage. Further, the times ΔT1 and ΔT2 shown in FIG. 5 are the same as the times ΔT1 and ΔT2 shown in FIG.

The above-mentioned ringing noise appears in the voltage waveform for a while after switching from the period of time ΔT1 to the period of time ΔT2. It is empirically understood that this ringing noise appears in a deteriorated FET.

When ringing noise appears, the amplitude of the voltage waveform rises from the ideal voltage V1 shown in FIG. 4 to the voltage V2.

Further, in the voltage waveform shown in FIG. 5, even if the period of time ΔT1 is changed to the period of time ΔT2, the voltage does not rise immediately as in the case shown in FIG. 4, and the rise of the voltage is blunted. It is empirically understood that the rise of the voltage waveform in the deteriorated FET is blunted.

Further, in the voltage waveform shown in FIG. 5, even if the period of time ΔT2 is changed to the period of time ΔT1, the voltage does not drop immediately as in the case shown in FIG. 4, and the voltage drop is blunted. .. Experience has shown that the fall of the voltage waveform in a degraded FET is blunted.

FIG. 6 is an image diagram showing the relationship between the voltage waveform, the current waveform, and the power waveform in the deteriorated FET. The voltage waveform shown in FIG. 6 is for one cycle of the voltage waveform shown in FIG. The power waveform shown in FIG. 6 is the waveform of the first current or the second current. The power waveform shown in FIG. 6 is the waveform of the first power or the second power.

As described above with reference to FIG. 5, in the deteriorated FET, the voltage does not rise immediately even if the period ΔT1 is switched to the period ΔT2, and the rise of the voltage waveform is blunted. This is because even if the application of the gate voltage is stopped, it takes time for the source and drain to be insulated as designed. In the case shown in FIG. 6, the voltage rises between the time T1 and the time T2.

During this period between time T1 and time T2, a current flows between the source and drain because the source and drain are not insulated as designed. The current decreases as the source-drain resistance increases during the period, as shown in FIG.

Since the power consumed between the source and the drain is the product of the voltage and the current value shown in FIG. 6, it becomes, for example, the power in the period between the time T1 and the time T2 shown in FIG.

On the other hand, as described above with reference to FIG. 5, in the deteriorated FET, the voltage does not drop immediately even if the period of time ΔT2 is switched to the period of time ΔT1, and the voltage waveform does not drop. Dull. This is because even if the gate voltage is applied, it takes time for the source and drain to be short-circuited as designed. In the case shown in FIG. 6, the voltage drops between the time T3 and the time T4.

In the period between time T3 and time T4, there is a voltage between source and drain because the source and drain are not short-circuited as designed. The voltage decreases as the resistance value between the source and the drain progresses during the period, as shown in FIG.

Since the power consumed between the source and the drain is the product of the voltage and the current value shown in FIG. 6, it becomes, for example, the power in the period between the time T3 and the time T4 shown in FIG.
[effect]
The output device of this embodiment outputs the power waveform of the power consumed between the source and the drain of the FET included in the switching regulator. The power waveform is information indicating the deterioration status of the FET. The output device may assist in grasping the deterioration state of the FET by the output.

The output device may output a source-drain voltage waveform in addition to or in place of the above. The voltage waveform is also information indicating the deterioration status of the FET. The output device can support a more accurate grasp of the deterioration state of the FET by the output.

In addition to the above, the output device may output a current waveform between the source and the drain. The current waveform is also information indicating the deterioration status of the FET. The output device can support a more accurate grasp of the deterioration state of the FET by the output.

In addition to the above, the output device may output temperature information indicating the temperature of the FET or the vicinity of the FET. The temperature information is also information indicating the deterioration status of the FET. The output device can support a more accurate grasp of the deterioration state of the FET by the output.

In addition to the above, the output device may output temperature information indicating the temperature of the FET or the vicinity of the FET. The temperature information is also information indicating the deterioration status of the FET. The output device can support a more accurate grasp of the deterioration state of the FET by the output.

In addition to the above, the output device may output information representing a determination result regarding the deterioration status of the FET, which is derived from at least a part of the above output information. The output device can easily grasp the deterioration state of the FET by the output.

In the above description, as the power information about the power consumed between the source and the drain of the FET, which may represent the deterioration of the FET, an example of the power waveform and the amplitude of the power waveform with respect to the power has been described. However, the electric power information may be anything as long as it represents the electric power. The electric power information may be, for example, an average value of the electric power.

FIG. 7 is a block diagram showing the configuration of the output device 301x, which is the minimum configuration of the output device of the embodiment.

The output device 301x includes a derivation unit 146x and an output unit 151x.

The derivation unit 146x derives power information representing the power consumed between the source and drain of the field effect transistor included in the switching regulator.

The output unit 151x outputs the power information.

The electric power is information indicating a deterioration state of the FET. Therefore, the output device can assist in grasping the deterioration state of the FET by the output.

Therefore, the output unit 151x exhibits the effects described in the section [Effects of the Invention] according to the above configuration.

The derivation unit 146x is, for example, the processing unit 146 shown in FIG. Further, the output unit 151x is, for example, the output unit 151 shown in FIG.

Although each embodiment of the present invention has been described above, the present invention is not limited to the above-described embodiment, and further modifications, substitutions, and adjustments can be made without departing from the basic technical idea of the present invention. Can be added. For example, the composition of the elements shown in each drawing is an example for facilitating the understanding of the present invention, and is not limited to the composition shown in these drawings.

Further, a part or all of the above-described embodiment may be described as in the following appendix, but is not limited to the following.

(Appendix 1)
A derivation unit that derives power information that represents the power consumed between the source and drain of the field effect transistor of the switching regulator.
An output unit that outputs the power information and
Equipped with an output device.

(Appendix 2)
It is described in Appendix 1 that the power information is derived from voltage information representing a voltage between the source and the drain and current information representing a current flowing between the source and the drain. Output device.

(Appendix 3)
The output device according to Appendix 1 or Appendix 2, wherein the output unit outputs voltage information representing a voltage between the source and the drain.

(Appendix 4)
The output device according to Appendix 3, wherein the voltage information is a voltage waveform related to the voltage.

(Appendix 5)
The output device according to Supplementary Note 1 to 4, wherein the output unit outputs current information representing a current flowing between the source and the drain.

(Appendix 6)
The output device according to Appendix 2 or Appendix 5, wherein the current information is a current waveform of the current.

(Appendix 7)
The output device according to any one of Supplementary note 1 to Supplementary note 6, wherein the power information includes a power waveform relating to power consumed between the source and the drain.

(Appendix 8)
The output device according to any one of Supplementary note 1 to Supplementary note 7, wherein the power information includes an amplitude of a power waveform related to the power consumed between the source and the drain.

(Appendix 9)
The output unit outputs predetermined first information when the amplitude of the power waveform related to the power consumed between the source and the drain exceeds the first threshold value. The output device according to any one.

(Appendix 10)
The output device according to Appendix 9, wherein the first information includes information expressing that the deterioration of the field effect transistor is progressing.

(Appendix 11)
The output unit outputs predetermined second information when the amplitude of the voltage waveform related to the voltage between the source and the drain exceeds the second threshold value, any one of Supplementary note 1 to Supplementary note 10. The output device described in.

(Appendix 12)
The output device according to Appendix 11, wherein the second information includes information expressing that the deterioration of the field effect transistor is progressing.

(Appendix 13)
The output device according to any one of Supplementary note 1 to Supplementary note 12, wherein the output unit outputs information representing the temperature of the field effect transistor or the temperature in the vicinity of the field effect transistor.

(Appendix 14)
The output unit outputs predetermined third information when the temperature of the field effect transistor or the temperature in the vicinity of the field effect transistor exceeds the third threshold value, to any one of Supplementary note 1 to Supplementary note 13. The output device described.

(Appendix 15)
The output device according to Appendix 14, wherein the third information includes information expressing that the deterioration of the field effect transistor is progressing.

(Appendix 16)
The output device according to any one of Supplementary note 1 to Supplementary note 15, wherein the switching regulator is of a synchronous rectification type.

(Appendix 17) A converter device including the output device according to any one of Supplementary note 1 to Supplementary note 16 and the switching regulator.

(Appendix 18)
A determination method for determining the state of a field effect transistor based on power information representing the power consumed between the source and drain of the field effect transistor included in the switching regulator.

101 Converter device 111a, 111b FET
126a Temperature sensor 131a, 131b Detection unit 136 Coil 141 Capacitor 146 Processing unit 146x Derivation unit 151, 151x Output unit 201 Switching regulator 301 Output device

Claims (10)

A derivation unit that derives power information that represents the power consumed between the source and drain of the field effect transistor of the switching regulator.
An output unit that outputs the power information and
Equipped with
The output unit, you output a predetermined first information when the amplitude of the power waveform of the power consumed between the source and the drain exceeds the first threshold, the output device. The output device according to claim 1, wherein the output unit outputs voltage information representing a voltage between the source and the drain. The output device according to claim 2, wherein the voltage information is a voltage waveform related to the voltage. The output device according to claim 1 or 2, wherein the output unit outputs current information representing a current flowing between the source and the drain. The output device according to any one of claims 1 to 4, wherein the power information includes a power waveform relating to power consumed between the source and the drain. The output device according to any one of claims 1 to 4, wherein the power information includes an amplitude of a power waveform relating to power consumed between the source and the drain. A derivation unit that derives power information that represents the power consumed between the source and drain of the field effect transistor of the switching regulator.
An output unit that outputs the power information and
Equipped with
The output unit is an output device that outputs predetermined second information when the amplitude of the voltage waveform related to the voltage between the source and the drain exceeds the second threshold value. The output device according to claim 7, wherein the output unit outputs voltage information representing a voltage between the source and the drain . The output device according to any one of claims 1 to 8, wherein the output unit outputs information representing the temperature of the field effect transistor or the temperature in the vicinity of the field effect transistor. Any one of claims 1 to 8, wherein the output unit outputs predetermined third information when the temperature of the field effect transistor or the temperature in the vicinity of the field effect transistor exceeds the third threshold value. The output device described in 1.

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