JP6978372B2 - プリンテッドメモリのグリッドコネクタ - Google Patents

プリンテッドメモリのグリッドコネクタ Download PDF

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Publication number
JP6978372B2
JP6978372B2 JP2018072205A JP2018072205A JP6978372B2 JP 6978372 B2 JP6978372 B2 JP 6978372B2 JP 2018072205 A JP2018072205 A JP 2018072205A JP 2018072205 A JP2018072205 A JP 2018072205A JP 6978372 B2 JP6978372 B2 JP 6978372B2
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JP
Japan
Prior art keywords
conductive
printed memory
conductive pad
subset
grid connector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2018072205A
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English (en)
Japanese (ja)
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JP2018186080A5 (enExample
JP2018186080A (ja
Inventor
マイケル・エイ・ドゥーディー
カール・イー・クルツ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xerox Corp
Original Assignee
Xerox Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xerox Corp filed Critical Xerox Corp
Publication of JP2018186080A publication Critical patent/JP2018186080A/ja
Publication of JP2018186080A5 publication Critical patent/JP2018186080A5/ja
Application granted granted Critical
Publication of JP6978372B2 publication Critical patent/JP6978372B2/ja
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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/70—Coupling devices
    • H01R12/7076—Coupling devices for connection between PCB and component, e.g. display
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/12—Digital output to print unit, e.g. line printer, chain printer
    • G06F3/1201—Dedicated interfaces to print systems
    • G06F3/1223—Dedicated interfaces to print systems specifically adapted to use a particular technique
    • G06F3/1236—Connection management
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/12—Digital output to print unit, e.g. line printer, chain printer
    • G06F3/1201—Dedicated interfaces to print systems
    • G06F3/1278—Dedicated interfaces to print systems specifically adapted to adopt a particular infrastructure
    • G06F3/1279—Controller construction, e.g. aspects of the interface hardware
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
    • H01L24/09—Structure, shape, material or disposition of the bonding areas after the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Credit Cards Or The Like (AREA)
JP2018072205A 2017-04-26 2018-04-04 プリンテッドメモリのグリッドコネクタ Active JP6978372B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/498,219 2017-04-26
US15/498,219 US10319415B2 (en) 2017-04-26 2017-04-26 Printed memory grid connector

Publications (3)

Publication Number Publication Date
JP2018186080A JP2018186080A (ja) 2018-11-22
JP2018186080A5 JP2018186080A5 (enExample) 2021-05-20
JP6978372B2 true JP6978372B2 (ja) 2021-12-08

Family

ID=62062796

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018072205A Active JP6978372B2 (ja) 2017-04-26 2018-04-04 プリンテッドメモリのグリッドコネクタ

Country Status (5)

Country Link
US (1) US10319415B2 (enExample)
EP (1) EP3422021B1 (enExample)
JP (1) JP6978372B2 (enExample)
KR (1) KR102319948B1 (enExample)
CN (1) CN108804049B (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070093157A1 (en) 2005-10-20 2007-04-26 Kimberly-Clark Worldwide, Inc. High speed, pressure bonded, thin sheet laminate

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6174175B1 (en) * 1999-04-29 2001-01-16 International Business Machines Corporation High density Z-axis connector
US20080225476A1 (en) * 2006-01-11 2008-09-18 Chris Karabatsos Tab wrap foldable electronic assembly module and method of manufacture
US8381601B2 (en) * 2008-05-05 2013-02-26 John F. Stumpf Transducer matrix film
US20110208895A1 (en) * 2010-02-22 2011-08-25 Garmin Ltd. Methods for memory programming during product assembly
KR101467469B1 (ko) * 2013-04-03 2014-12-02 (주) 파루 인쇄 메모리 회로 장치 및 이를 이용한 rfid 태그
CN105659255B (zh) * 2013-08-28 2019-09-20 惠普发展公司，有限责任合伙企业 包括自动自毁特征的盒体
KR102218743B1 (ko) * 2014-08-01 2021-02-22 삼성전자주식회사 집적 회로 카드 소켓
CN105788642A (zh) * 2015-01-11 2016-07-20 杭州海存信息技术有限公司 固态光盘和固态存储服务器
KR102257031B1 (ko) * 2015-03-13 2021-05-27 삼성전자주식회사 반도체 집적 회로 설계 방법
US10114984B2 (en) * 2015-09-04 2018-10-30 Xerox Corporation Symmetric bit coding for printed memory devices

Also Published As

Publication number Publication date
KR102319948B1 (ko) 2021-10-29
EP3422021A1 (en) 2019-01-02
JP2018186080A (ja) 2018-11-22
CN108804049B (zh) 2021-01-05
KR20180120082A (ko) 2018-11-05
CN108804049A (zh) 2018-11-13
US20180315456A1 (en) 2018-11-01
EP3422021B1 (en) 2020-06-10
US10319415B2 (en) 2019-06-11

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