JP6894360B2 - 逐次比較レジスタ型ad変換器における利得較正方法、及び逐次比較レジスタ型アナログデジタル変換器 - Google Patents
逐次比較レジスタ型ad変換器における利得較正方法、及び逐次比較レジスタ型アナログデジタル変換器 Download PDFInfo
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- JP6894360B2 JP6894360B2 JP2017234085A JP2017234085A JP6894360B2 JP 6894360 B2 JP6894360 B2 JP 6894360B2 JP 2017234085 A JP2017234085 A JP 2017234085A JP 2017234085 A JP2017234085 A JP 2017234085A JP 6894360 B2 JP6894360 B2 JP 6894360B2
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- calibration
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1009—Calibration
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1009—Calibration
- H03M1/1014—Calibration at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/44—Sequential comparisons in series-connected stages with change in value of analogue signal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/46—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP16202934.2A EP3334047B1 (en) | 2016-12-08 | 2016-12-08 | A method of gain calibration in a two-stage pipelined successive approximation register analog-to-digital converter and a two-stage pipelined successive approximation register analog-to-digital converter |
| EP16202934.2 | 2016-12-08 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2018098788A JP2018098788A (ja) | 2018-06-21 |
| JP2018098788A5 JP2018098788A5 (enExample) | 2021-02-25 |
| JP6894360B2 true JP6894360B2 (ja) | 2021-06-30 |
Family
ID=57530578
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2017234085A Active JP6894360B2 (ja) | 2016-12-08 | 2017-12-06 | 逐次比較レジスタ型ad変換器における利得較正方法、及び逐次比較レジスタ型アナログデジタル変換器 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US10050638B2 (enExample) |
| EP (1) | EP3334047B1 (enExample) |
| JP (1) | JP6894360B2 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10425094B2 (en) * | 2017-12-01 | 2019-09-24 | Intel Corporation | Method and apparatus for preventing inherent error propagation of successive approximation register analog-to-digital converter through digital correction |
| US10686463B1 (en) * | 2019-02-14 | 2020-06-16 | United States Of America As Represented By The Secretary Of The Air Force | Method for calibration of digital readout with split counter and residual bits |
| CN110768671B (zh) * | 2019-10-17 | 2022-04-22 | 西安交通大学 | 一种用于逐次逼近型模数转换器的片外校准方法及系统 |
| CN112600557B (zh) * | 2020-12-16 | 2023-08-01 | 东南大学 | 一种流水线adc数字域增益校准方法 |
| CN113114247B (zh) * | 2021-04-19 | 2022-05-24 | 电子科技大学 | 基于比较时间探测器的流水线adc级间增益校准方法 |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5272481A (en) * | 1991-07-02 | 1993-12-21 | David Sarnoff Research Center, Inc. | Successive approximation analog to digital converter employing plural feedback digital to analog converters |
| US7221299B2 (en) * | 2004-06-12 | 2007-05-22 | Nordic Semiconductor Asa | Method and apparatus for an ADC circuit with wider input signal swing |
| US7378999B1 (en) * | 2007-03-06 | 2008-05-27 | Xilinx, Inc. | Method and apparatus for digital calibration of an analog-to-digital converter |
| US8269657B2 (en) * | 2009-06-26 | 2012-09-18 | Intersil Americas Inc. | Background calibration of offsets in interleaved analog to digital converters |
| US8040264B2 (en) * | 2010-03-04 | 2011-10-18 | Analog Devices, Inc. | Pipeline analog to digital converter and a residue amplifier for a pipeline analog to digital converter |
| TWI545903B (zh) * | 2011-03-17 | 2016-08-11 | 安娜卡敦設計公司 | 類比轉數位轉換器(adc)之校正 |
| US9059730B2 (en) * | 2013-09-19 | 2015-06-16 | Qualcomm Incorporated | Pipelined successive approximation analog-to-digital converter |
| EP2953265B1 (en) * | 2014-06-06 | 2016-12-14 | IMEC vzw | Method and circuit for bandwidth mismatch estimation in an a/d converter |
| US9219492B1 (en) * | 2014-09-19 | 2015-12-22 | Hong Kong Applied Science & Technology Research Institute Company, Limited | Loading-free multi-stage SAR-assisted pipeline ADC that eliminates amplifier load by re-using second-stage switched capacitors as amplifier feedback capacitor |
| EP3059867B1 (en) * | 2015-02-19 | 2020-07-08 | Stichting IMEC Nederland | Circuit and method for dac mismatch error detection and correction in an adc |
| JP2017005332A (ja) * | 2015-06-05 | 2017-01-05 | 日本放送協会 | 巡回型ad変換器、並びに巡回型ad変換器用のデジタル補正器及びその方法 |
| US9584150B2 (en) * | 2015-07-07 | 2017-02-28 | Infineon Technologies Ag | Gain calibration for ADC with external reference |
| US9654132B2 (en) * | 2015-07-08 | 2017-05-16 | Marvell World Trade Ltd. | Hybrid charge-sharing charge-redistribution DAC for successive approximation analog-to-digital converters |
| US9432044B1 (en) * | 2015-12-18 | 2016-08-30 | Texas Instruments Incorporated | Mismatch correction of attenuation capacitor in a successive approximation register analog to digital converter |
| US9602119B1 (en) * | 2016-02-09 | 2017-03-21 | Applied Micro Circuits Corporation | Gain calibration by applying a portion of an input voltage to voltage associated with a capacitor array |
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2016
- 2016-12-08 EP EP16202934.2A patent/EP3334047B1/en active Active
-
2017
- 2017-12-06 JP JP2017234085A patent/JP6894360B2/ja active Active
- 2017-12-07 US US15/835,310 patent/US10050638B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| EP3334047B1 (en) | 2021-04-21 |
| US20180175874A1 (en) | 2018-06-21 |
| JP2018098788A (ja) | 2018-06-21 |
| US10050638B2 (en) | 2018-08-14 |
| EP3334047A1 (en) | 2018-06-13 |
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