JP6892023B1 - 半導体装置、半導体装置の製造方法および電力変換装置 - Google Patents
半導体装置、半導体装置の製造方法および電力変換装置 Download PDFInfo
- Publication number
- JP6892023B1 JP6892023B1 JP2020564692A JP2020564692A JP6892023B1 JP 6892023 B1 JP6892023 B1 JP 6892023B1 JP 2020564692 A JP2020564692 A JP 2020564692A JP 2020564692 A JP2020564692 A JP 2020564692A JP 6892023 B1 JP6892023 B1 JP 6892023B1
- Authority
- JP
- Japan
- Prior art keywords
- metal member
- semiconductor device
- metal
- insulating
- outer edge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 298
- 238000006243 chemical reaction Methods 0.000 title claims description 37
- 238000004519 manufacturing process Methods 0.000 title claims description 22
- 229910052751 metal Inorganic materials 0.000 claims abstract description 773
- 239000002184 metal Substances 0.000 claims abstract description 773
- 239000010949 copper Substances 0.000 claims abstract description 72
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 52
- 229910052802 copper Inorganic materials 0.000 claims abstract description 50
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 14
- 239000000463 material Substances 0.000 claims description 78
- 238000000034 method Methods 0.000 claims description 49
- 230000002093 peripheral effect Effects 0.000 claims description 32
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical group [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 27
- 230000008569 process Effects 0.000 claims description 10
- 229910052759 nickel Inorganic materials 0.000 claims description 8
- 229910052782 aluminium Inorganic materials 0.000 claims description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical group [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 7
- 238000002360 preparation method Methods 0.000 claims description 3
- 238000005304 joining Methods 0.000 claims 2
- 239000000758 substrate Substances 0.000 abstract description 8
- 238000010586 diagram Methods 0.000 description 27
- 230000035882 stress Effects 0.000 description 16
- 230000000694 effects Effects 0.000 description 9
- 238000007747 plating Methods 0.000 description 7
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 5
- 239000003963 antioxidant agent Substances 0.000 description 5
- 230000003078 antioxidant effect Effects 0.000 description 5
- 239000011651 chromium Substances 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 4
- 229910052804 chromium Inorganic materials 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- 238000005240 physical vapour deposition Methods 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- 238000001039 wet etching Methods 0.000 description 4
- 229910002601 GaN Inorganic materials 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000000956 alloy Substances 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 230000017525 heat dissipation Effects 0.000 description 3
- 230000001771 impaired effect Effects 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- 229910052763 palladium Inorganic materials 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- 229910052721 tungsten Inorganic materials 0.000 description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 239000011777 magnesium Substances 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Substances [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 230000001902 propagating effect Effects 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 239000002313 adhesive film Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- -1 and Co Substances 0.000 description 1
- 238000006664 bond formation reaction Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000001659 ion-beam spectroscopy Methods 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000009740 moulding (composite fabrication) Methods 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000010944 silver (metal) Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 238000005478 sputtering type Methods 0.000 description 1
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/43—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/03011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05075—Plural internal layers
- H01L2224/0508—Plural internal layers being stacked
- H01L2224/05083—Three-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05124—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05155—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
- H01L2224/05558—Shape in side view conformal layer on a patterned surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05647—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
第一金属部材と、第一金属部材の上面上に形成された第二金属部材と、第二金属部材の上
面上に形成された第三金属部材と、第三金属部材の上面上に形成された銅を主成分とする
第四金属部材と、第三金属部材の形成位置に対応した第四金属部材の上面上に接合する銅
を主成分とする配線部材と、を備え、第一金属部材の材料は、アルミニウムであり、第二
金属部材の材料は、銅である、半導体装置である。
図1は、実施の形態1における半導体装置を示す平面構造模式図である。図2は、実施の形態1における半導体装置を示す断面構造模式図である。図2は、図1の一点鎖線AAにおける断面構造模式図である。
本実施の形態2においては、実施の形態1で用いた第一金属部材2、第二金属部材3、第三金属部材4および第四金属部材5のうち、少なくとも第四金属部材5の外縁は、その他の金属部材の外縁よりも内側に形成されるようにした点で異なる。金属部材を積層することで、金属部材の総膜厚が必然的に増加する。金属部材の総膜厚が増加することで、半導体素子1と直接金属部材とが接する箇所では応力が発生しやすくなるため、半導体素子1にクラックが入るなどの半導体素子1への損傷が起こる懸念がある。このように、第四金属部材5の外縁が、第一金属部材2、第二金属部材3および第三金属部材4の少なくともいずれかの金属部材の外縁よりも内側に形成したので、半導体素子1と金属部材とが接する箇所での金属部材の総膜厚が減少し、半導体素子1に発生する応力が減少する。その結果、半導体素子1へのクラックなどの損傷の発生を抑制でき、半導体装置200の信頼性を向上することができる。なお、その他の点については、実施の形態1と同様であるので、詳しい説明は省略する。
本実施の形態3においては、実施の形態1、実施の形態2で用いた第一金属部材2、第二金属部材3、第三金属部材4および第四金属部材5のうち、隣接する金属部材の界面のうち、少なくとも一つ以上の界面の外周領域に絶縁部材8が配置(挿入)した点が異なる。このように、積層された隣接する金属部材の外周領域に絶縁部材8を配置したので、半導体素子1の外周領域における応力の発生を低減できる。その結果、金属部材よりも柔らかい絶縁部材8によって応力の発生しやすい金属部材の外周領域での応力発生を抑制し、半導体素子1へのクラックなどの損傷の発生を抑制でき、半導体装置の信頼性を向上することができる。なお、その他の点については、実施の形態1、実施の形態2と同様であるので、詳しい説明は省略する。なお、絶縁部材8は、第一金属部材2、第二金属部材3、第三金属部材4および第四金属部材5の少なくともいずれか一つの側面に接して周囲を囲む。絶縁部材81は、第一金属部材2、第二金属部材3、第三金属部材4および第四金属部材5の少なくともいずれか一つの外周領域に配置される。
本実施の形態4においては、実施の形態1、実施の形態2および実施の形態3で用いた第三金属部材4をボンディングワイヤ6が接合された接合領域61に対応する領域にのみ配置した点が異なる。このように、第三金属部材4をボンディングワイヤ6が接合された接合領域61に対応する領域にのみ配置したので、ボンディングワイヤ6による第一金属部材2へのクラックの発生を抑制できる。なお、その他の点については、実施の形態1、実施の形態2および実施の形態3と同様であるので、詳しい説明は省略する。
ここでは、上述した実施の形態1〜4において説明した半導体装置を適用した電力変換装置について説明する。本開示は特定の電力変換装置に限定されるものではないが、以下、実施の形態5として、三相のインバータに本開示を適用した場合について説明する。
Claims (16)
- 第一主面を有する半導体素子と、
前記第一主面上に形成された第一金属部材と、
前記第一金属部材の上面上に形成された第二金属部材と、
前記第二金属部材の上面上に形成された第三金属部材と、
前記第三金属部材の上面上に形成された銅を主成分とする第四金属部材と、
前記第三金属部材の形成位置に対応した前記第四金属部材の上面上に接合する銅を主成分とする配線部材と、
を備え、
前記第一金属部材の材料は、アルミニウムであり、前記第二金属部材の材料は、銅である、半導体装置。 - 前記第三金属部材の材料は、ニッケルである、請求項1に記載の半導体装置。
- 第一主面を有する半導体素子と、
前記第一主面上に形成された第一金属部材と、
前記第一金属部材の上面上に形成された第二金属部材と、
前記第二金属部材の上面上に形成された第三金属部材と、
前記第三金属部材の上面上に形成された銅を主成分とする第四金属部材と、
前記第三金属部材の形成位置に対応した前記第四金属部材の上面上に接合する銅を主成分とする配線部材と、
前記第一金属部材、前記第二金属部材、前記第三金属部材および前記第四金属部材のすくなくとも一つの金属部材間には、前記配線部材の前記第四金属部材との接合領域に対応する位置に開口部を有して配置される絶縁部材と、
を備え、
前記絶縁部材は、前記金属部材間の外周領域に配置され、前記開口部内では、前記第一金属部材および前記第二金属部材の少なくとも一方が凸形状である、半導体装置。 - 前記第二金属部材および前記第三金属部材のいずれか一方の硬度は、前記第四金属部材の硬度以上の材料である、請求項1から請求項3のいずれか1項に記載の半導体装置。
- 前記第二金属部材の硬度は、前記第三金属部材の硬度以下の材料である、請求項1から請求項4のいずれか1項に記載の半導体装置。
- 前記第一金属部材の硬度は、前記第二金属部材および前記第三金属部材の硬度以下の材料である、請求項1から請求項5のいずれか1項に記載の半導体装置。
- 前記第四金属部材の外縁は、前記第四金属部材よりも下方に形成される前記第一金属部材から前記第三金属部材の少なくともいずれかの外縁よりも内側に形成されている、請求項1から請求項6のいずれか1項に記載の半導体装置。
- 前記絶縁部材上に配置される前記第二金属部材、前記第三金属部材および前記第四金属部材の長さは、10μm以上100μm以下である、請求項3に記載の半導体装置。
- 前記第一金属部材の材料は、アルミニウムであり、前記第二金属部材の材料は、銅であり、前記第三金属部材の材料は、ニッケルである、請求項3から請求項8のいずれか1項に記載の半導体装置。
- 前記第三金属部材は、前記第二金属部材の上面上に部分的に形成されている、請求項1から請求項9のいずれか1項に記載の半導体装置。
- 前記第三金属部材の形状は、円形または多角形である、請求項10に記載の半導体装置。
- 前記第三金属部材の厚みは、1μm以上50μm以下である、請求項1から請求項11のいずれか1項に記載の半導体装置。
- 請求項1から請求項12のいずれか1項に記載の半導体装置を有し、入力される電力を変換して出力する主変換回路と、
前記主変換回路を制御する制御信号を前記主変換回路に出力する制御回路と、
を備えた、電力変換装置。 - 第一主面を有する半導体素子を準備する半導体素子準備工程と、
前記第一主面上に第一金属部材を形成する第一金属部材形成工程と、
前記第一金属部材の上面上に第二金属部材を形成する第二金属部材形成工程と、
前記第二金属部材の上面上に第三金属部材を形成する第三金属部材形成工程と、
前記第三金属部材の上面上に銅を主成分とする第四金属部材を形成する第四金属部材形成工程と、
前記第三金属部材の形成位置に対応した前記第四金属部材の上面上に銅を主成分とする配線部材を接合する配線部材形成工程と、
を備え、
前記第一金属部材の材料は、アルミニウムであり、前記第二金属部材の材料は、銅である、半導体装置の製造方法。 - 前記第三金属部材の材料は、ニッケルである、請求項14に記載の半導体装置の製造方法。
- 第一主面を有する半導体素子を準備する半導体素子準備工程と、
前記第一主面上に第一金属部材を形成する第一金属部材形成工程と、
前記第一金属部材の上面上に第二金属部材を形成する第二金属部材形成工程と、
前記第二金属部材の上面上に第三金属部材を形成する第三金属部材形成工程と、
前記第三金属部材の上面上に銅を主成分とする第四金属部材を形成する第四金属部材形成工程と、
前記第三金属部材の形成位置に対応した前記第四金属部材の上面上に銅を主成分とする配線部材を接合する配線部材形成工程と、
前記第一金属部材、前記第二金属部材、前記第三金属部材および前記第四金属部材のすくなくとも一つの金属部材間には、前記配線部材の前記第四金属部材との接合領域に対応する位置に開口部を有する絶縁部材を形成する工程と、
を備え、
前記絶縁部材は、前記金属部材間の外周領域に配置され、前記開口部内では、前記第一金属部材および前記第二金属部材の少なくとも一方が凸形状である、半導体装置の製造方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2020/029642 WO2022029828A1 (ja) | 2020-08-03 | 2020-08-03 | 半導体装置、半導体装置の製造方法および電力変換装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP6892023B1 true JP6892023B1 (ja) | 2021-06-18 |
JPWO2022029828A1 JPWO2022029828A1 (ja) | 2022-02-10 |
Family
ID=76429656
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2020564692A Active JP6892023B1 (ja) | 2020-08-03 | 2020-08-03 | 半導体装置、半導体装置の製造方法および電力変換装置 |
Country Status (5)
Country | Link |
---|---|
US (1) | US20230253349A1 (ja) |
JP (1) | JP6892023B1 (ja) |
CN (1) | CN116134593A (ja) |
DE (1) | DE112020007480T5 (ja) |
WO (1) | WO2022029828A1 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2023181210A1 (ja) * | 2022-03-23 | 2023-09-28 | 三菱電機株式会社 | 半導体装置及びその製造方法並びに電力変換装置 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016082230A (ja) * | 2014-10-13 | 2016-05-16 | ゼネラル・エレクトリック・カンパニイ | ワイヤボンドを有するパワーオーバーレイ構造体およびその製造方法 |
JP2016115700A (ja) * | 2014-12-11 | 2016-06-23 | 株式会社神戸製鋼所 | 電極構造 |
JP2017107937A (ja) * | 2015-12-08 | 2017-06-15 | 三菱電機株式会社 | 電力用半導体装置 |
JP2018186220A (ja) * | 2017-04-27 | 2018-11-22 | 株式会社 日立パワーデバイス | 半導体装置 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2016143557A1 (ja) | 2015-03-10 | 2016-09-15 | 三菱電機株式会社 | パワー半導体装置 |
-
2020
- 2020-08-03 JP JP2020564692A patent/JP6892023B1/ja active Active
- 2020-08-03 WO PCT/JP2020/029642 patent/WO2022029828A1/ja active Application Filing
- 2020-08-03 DE DE112020007480.3T patent/DE112020007480T5/de active Pending
- 2020-08-03 CN CN202080104728.2A patent/CN116134593A/zh active Pending
- 2020-08-03 US US18/015,085 patent/US20230253349A1/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016082230A (ja) * | 2014-10-13 | 2016-05-16 | ゼネラル・エレクトリック・カンパニイ | ワイヤボンドを有するパワーオーバーレイ構造体およびその製造方法 |
JP2016115700A (ja) * | 2014-12-11 | 2016-06-23 | 株式会社神戸製鋼所 | 電極構造 |
JP2017107937A (ja) * | 2015-12-08 | 2017-06-15 | 三菱電機株式会社 | 電力用半導体装置 |
JP2018186220A (ja) * | 2017-04-27 | 2018-11-22 | 株式会社 日立パワーデバイス | 半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
WO2022029828A1 (ja) | 2022-02-10 |
CN116134593A (zh) | 2023-05-16 |
US20230253349A1 (en) | 2023-08-10 |
DE112020007480T5 (de) | 2023-05-17 |
JPWO2022029828A1 (ja) | 2022-02-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6892023B1 (ja) | 半導体装置、半導体装置の製造方法および電力変換装置 | |
JP2019102535A (ja) | 半導体モジュール、その製造方法及び電力変換装置 | |
WO2020136810A1 (ja) | 半導体装置、半導体装置の製造方法及び電力変換装置 | |
US11495509B2 (en) | Semiconductor device and method for manufacturing semiconductor device | |
JP6927437B1 (ja) | パワーモジュールおよび電力変換装置 | |
JP2014053403A (ja) | パワーモジュール半導体装置 | |
JP7109650B2 (ja) | 電力用半導体装置および電力変換装置 | |
US10083889B2 (en) | Electronic component package including sealing resin layer, metal member, ceramic substrate, and electronic component and method for manufacturing the same | |
WO2020246456A1 (ja) | 半導体装置および電力変換装置 | |
WO2021240748A1 (ja) | 半導体装置およびその製造方法ならびに電力変換装置 | |
JP2020043154A (ja) | 半導体装置及びその製造方法、並びに、電力変換装置 | |
CN116888708A (zh) | 半导体元件、电力转换装置以及半导体元件的制造方法 | |
JP7088421B1 (ja) | 半導体装置および電力変換装置 | |
JP7438466B1 (ja) | 半導体装置及びその製造方法並びに電力変換装置 | |
US11830795B2 (en) | Semiconductor device, power conversion device, and method for manufacturing semiconductor device | |
JP7176662B1 (ja) | 半導体装置および電力変換装置 | |
JP2021061332A (ja) | 半導体装置および電力変換装置 | |
WO2022249951A1 (ja) | パワー半導体装置及び電力変換装置 | |
JP6885522B1 (ja) | 半導体装置、電力変換装置および半導体装置の製造方法 | |
JP7314886B2 (ja) | 素子パッケージおよび半導体装置 | |
JP2023013642A (ja) | 半導体装置 | |
JP4962409B2 (ja) | 半導体装置及びその製法 | |
WO2020110860A1 (ja) | 半導体装置、電力用半導体モジュール、電力変換装置および電力用半導体モジュールの製造方法 | |
JP2024061247A (ja) | 半導体装置、電力変換装置および半導体装置の製造方法 | |
CN111788694A (zh) | 半导体元件、半导体装置、电力变换装置以及半导体元件的制造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20201117 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20201117 |
|
A871 | Explanation of circumstances concerning accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A871 Effective date: 20201117 |
|
A975 | Report on accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A971005 Effective date: 20201218 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20210112 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20210215 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20210427 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20210510 |
|
R151 | Written notification of patent or utility model registration |
Ref document number: 6892023 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |