JP6876337B2 - Nitride semiconductor substrate and its manufacturing method and semiconductor device - Google Patents

Nitride semiconductor substrate and its manufacturing method and semiconductor device Download PDF

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JP6876337B2
JP6876337B2 JP2018552571A JP2018552571A JP6876337B2 JP 6876337 B2 JP6876337 B2 JP 6876337B2 JP 2018552571 A JP2018552571 A JP 2018552571A JP 2018552571 A JP2018552571 A JP 2018552571A JP 6876337 B2 JP6876337 B2 JP 6876337B2
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nitride semiconductor
nitride
semiconductor substrate
layer
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JPWO2018097102A1 (en
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藤原 康文
康文 藤原
婉新 朱
婉新 朱
小泉 淳
淳 小泉
ブランドン ミッチェル
ブランドン ミッチェル
トム グレゴーキービックス
トム グレゴーキービックス
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Osaka University NUC
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    • H01S5/30Structure or shape of the active region; Materials used for the active region
    • H01S5/32Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
    • H01S5/323Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/32308Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm
    • H01S5/32341Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm blue laser based on GaN or GaP

Description

本発明は、表面の転位密度が低減された窒化物半導体基板とその製造方法、および前記窒化物半導体基板を用いて作製された半導体デバイスに関する。 The present invention relates to a nitride semiconductor substrate having a reduced dislocation density on the surface, a method for producing the same, and a semiconductor device manufactured by using the nitride semiconductor substrate.

近年、発光ダイオード(LED:Light Emitting Diode)やレーザダイオード(LD:Laser Diode)等の発光デバイスが広く用いられるようになっている。例えばLEDは、各種表示デバイス、携帯電話を始め液晶ディスプレイのバックライト、白色照明等に用いられ、一方、LDは、ブルーレイディスク用光源としてハイビジョン映像の録画再生、光通信、CD、DVD等に用いられている。 In recent years, light emitting devices such as light emitting diodes (LEDs: Light Emitting Diodes) and laser diodes (LDs: Laser Diodes) have come into widespread use. For example, LEDs are used for various display devices, backlights for liquid crystal displays such as mobile phones, white lighting, etc., while LDs are used as light sources for Blu-ray discs for recording and playback of high-definition video, optical communication, CDs, DVDs, etc. Has been done.

また、最近では、携帯電話用MMIC(monolithic microwave integrated circuit:モノリシックマイクロ波集積回路)、HEMT(High Electron Mobility Transistor:高電子移動度トランジスタ)等の高周波デバイスや、自動車関連向けのインバーター用パワートランジスタ、ショットキーバリアダイオード(SBD)等の高出力デバイスの用途が拡大している。 Recently, high-frequency devices such as MMICs (monolithic microwave integrated circuits) for mobile phones, HEMTs (High Electron Mobility Transistors), power transistors for automobiles, inverters for automobiles, etc. Applications of high power devices such as Schottky barrier diodes (SBDs) are expanding.

これらのデバイスを構成する半導体素子は、窒化ガリウム(GaN)等の窒化物半導体層が形成された窒化物半導体基板を用いて作製されている。このような窒化物半導体基板としては、バルク状単結晶窒化物から切り出されて直接作製された窒化物半導体バルク基板、サファイア等の基材上に単結晶窒化物を成長させた後に基材を除去することにより作製された(擬似的)窒化物半導体バルク基板、基材上に単結晶窒化物を成長させ基材を残したままテンプレートとして半導体デバイスの製造に用いられる窒化物半導体基板がある。 The semiconductor elements constituting these devices are manufactured by using a nitride semiconductor substrate on which a nitride semiconductor layer such as gallium nitride (GaN) is formed. As such a nitride semiconductor substrate, the substrate is removed after the single crystal nitride is grown on a substrate such as a nitride semiconductor bulk substrate or sapphire directly produced by cutting out from a bulk single crystal nitride. There are (pseudo) nitride semiconductor bulk substrates produced by the above, and nitride semiconductor substrates used for manufacturing semiconductor devices as templates while growing single crystal nitrides on the substrate and leaving the substrate.

そして、このような窒化物半導体基板においては、LEDの内部量子効率やLDの発振性能等の特性や、寿命が窒化物半導体基板の表面の転位密度(TDD:Threading dislocation density)と関係していることが分かっており、高品質、長寿命の半導体デバイス、特に、上記した高周波デバイスや高出力デバイスでは、転位密度10cm−2オーダー以下の窒化物半導体基板が必要とされている(非特許文献1)。In such a nitride semiconductor substrate, characteristics such as the internal quantum efficiency of the LED and the oscillation performance of the LD, and the lifetime are related to the dislocation density (TDD: Sharing dislocation density) on the surface of the nitride semiconductor substrate. it has been found, high-quality, long-life semiconductor devices, particularly, in high frequency devices and high-power devices described above, the following nitride semiconductor substrate dislocation density 10 6 cm -2 order is required (non-patent Document 1).

このように転位密度が低い窒化物半導体基板は、上記した窒化物半導体バルク基板を直接作製する方法により得ることができるが、その工程は複雑であり多大なコストが掛かるため、サファイア基材を用いて窒化物半導体基板を作製する場合に比べて50〜60倍高い価格となっている。このため、安価なサファイア基材等を用いて、低転位密度の窒化物半導体基板を安価に提供することができる窒化物半導体基板の製造技術が強く求められている。 A nitride semiconductor substrate having such a low dislocation density can be obtained by the method of directly manufacturing the above-mentioned nitride semiconductor bulk substrate, but the process is complicated and enormous cost is required, so a sapphire substrate is used. The price is 50 to 60 times higher than that of manufacturing a nitride semiconductor substrate. Therefore, there is a strong demand for a technique for manufacturing a nitride semiconductor substrate that can inexpensively provide a nitride semiconductor substrate having a low dislocation density by using an inexpensive sapphire base material or the like.

しかし、サファイア等の基材上に、有機金属気相成長法(MOCVD:Metal−organic chemical vapor deposition)等を用いて窒化物半導体薄膜を形成させることにより窒化物半導体基板を作製した場合、得られた窒化物半導体基板の転位密度は10〜1010cm−2オーダーになり、得られた窒化物半導体基板では設計通りの特性および寿命が得られないことが知られている。However, it is obtained when a nitride semiconductor substrate is produced by forming a nitride semiconductor thin film on a substrate such as sapphire by using a metal-organic chemical vapor deposition (MOCVD) or the like. It is known that the transition density of the nitride semiconductor substrate is on the order of 10 8 to 10 10 cm- 2 , and the obtained nitride semiconductor substrate does not have the characteristics and life as designed.

転位密度を低減する方法としては、GaN等の窒化物半導体層の厚みを厚くすることが考えられるが、サファイア等の基材とGaN等の窒化物とでは熱膨張係数に差があるため、窒化物半導体層の厚みを厚くした場合には基材との界面に反りが発生するという問題がある。 As a method of reducing the dislocation density, it is conceivable to increase the thickness of the nitride semiconductor layer such as GaN. However, since there is a difference in thermal expansion coefficient between the base material such as sapphire and the nitride such as GaN, nitrided. When the thickness of the physical semiconductor layer is increased, there is a problem that the interface with the base material is warped.

そこで、サファイア等の基材を用いて転位密度が低減された窒化物半導体層を形成させる方法として、サファイア基材上に窒化物のバッファー層を形成した後、非晶質の酸化珪素(a−SiO)を用いて選択成長(SAG:selective area growth)マスクを形成し、選択成長マスク上に窒化物半導体層をラテラルエピタキシする方法(ELOG:epitaxial lateral overgrowth:エピタキシャル横方向被覆成長法)により、エピタキシ層で転位密度を10〜10cm−2オーダーに低減させることが提案されている(特許文献1、2)。Therefore, as a method of forming a nitride semiconductor layer having a reduced dislocation density using a substrate such as sapphire, an amorphous silicon oxide (a-) is formed after forming a nitride buffer layer on the sapphire substrate. By a method of forming a selective growth (SAG: selective area growth) mask using SiO 2 ) and laterally epitaxing the nitride semiconductor layer on the selective growth mask (ELOG: epitaxial lateral cover growth method). It has been proposed to reduce the dislocation density to the order of 10 6 to 10 7 cm- 2 in the epitaxy layer (Patent Documents 1 and 2).

しかし、この方法は、選択成長マスクの形成に際して基材を成長装置から取り出して行う必要があり、工程が複雑化し生産効率が低下する。また、低転位密度の領域は選択成長マスクのパターンにより形成されるものであるため、低転位密度の領域が基材上に点在することになり大面積化を図ることができず、窒化物半導体基板の大型化を図ることが難しい。 However, in this method, it is necessary to take out the base material from the growth apparatus when forming the selective growth mask, which complicates the process and lowers the production efficiency. Further, since the low dislocation density region is formed by the pattern of the selective growth mask, the low dislocation density region is scattered on the substrate, and the area cannot be increased, so that the nitride is nitrided. It is difficult to increase the size of the semiconductor substrate.

Kazuhito Ban 他8名、「Internal Quantum Efficiency of Whole−Composition−Range AlGaN Multiquantum Wells」、Appl.Phys.Express 4(2011)052101Kazuhito Ban and 8 others, "International Quantum Efficiency of Where-Composion-Ranger AlGaN Multiquantum Wells", Appl. Phys. Express 4 (2011) 052101

特開2010−199620号公報JP-A-2010-199620 特開2015−095585号公報Japanese Unexamined Patent Publication No. 2015-095585

本発明は、サファイア等の安価な基材上であっても、十分に転位密度が低減された窒化物半導体基板を大面積で製造することができる窒化物半導体基板の製造技術を提供することを課題とする。 The present invention provides a technique for manufacturing a nitride semiconductor substrate capable of manufacturing a nitride semiconductor substrate having a sufficiently reduced dislocation density in a large area even on an inexpensive substrate such as sapphire. Make it an issue.

前記したように、サファイア基材を用いて、高性能、長寿命の半導体デバイスを作製するためには、表面の転位密度が低く制御された窒化物半導体基板を製造する必要があるが、ELOG法では大面積化を図ることができず、窒化物半導体基板の大型化を図ることが難しい。 As described above, in order to manufacture a high-performance, long-life semiconductor device using a sapphire substrate, it is necessary to manufacture a nitride semiconductor substrate in which the dislocation density on the surface is controlled to be low. However, it is difficult to increase the size of the nitride semiconductor substrate.

本発明者は、Euが添加されたGaN(Eu添加GaN層)を発光層とする赤色発光ダイオードの作製に世界に先駆けて成功しているが、その過程において、サファイア基材上に、ドーピング材料が添加されていないアンドープGaN層(ud−GaN層)、ドーピング材料としてEuが添加されたGaN層(Eu添加GaN層)の順に積層して多層化された窒化物半導体層では、転位密度が低下していることを見出した。 The present inventor has succeeded for the first time in the world in producing a red light emitting diode using an Eu-added GaN (Eu-added GaN layer) as a light emitting layer, and in the process, a doping material is placed on a sapphire substrate. The dislocation density is reduced in the nitride semiconductor layer in which the undoped GaN layer (ud-GaN layer) to which is not added and the GaN layer to which Eu is added as the doping material (Eu-added GaN layer) are laminated in this order to form multiple layers. I found that I was doing it.

この知見に基づき、本発明者は、このような積層構造を窒化物半導体基板に適用することができれば、転位密度を十分に低下させて、高性能、長寿命の半導体デバイスの作製が可能になると考え、種々の実験と検討を行った。 Based on this finding, the present inventor believes that if such a laminated structure can be applied to a nitride semiconductor substrate, the dislocation density can be sufficiently reduced and a high-performance, long-life semiconductor device can be manufactured. We thought about it and conducted various experiments and studies.

その結果、このような積層構造を採用した場合、Eu添加GaN層におけるEu添加量が1原子%程度、具体的には、0.01〜2原子%という不純物レベルともいえる少量であっても、劇的に転位密度が低下して、10cm−2オーダー以下の転位密度という高性能、長寿命の半導体デバイスの作製に好適な低転位密度の窒化物半導体基板が得られるという驚くべき結果を得た。As a result, when such a laminated structure is adopted, even if the amount of Eu added in the Eu-added GaN layer is as small as about 1 atomic%, specifically, 0.01 to 2 atomic%, which can be said to be an impurity level. dramatically dislocation density is lowered, 10 6 cm -2 order performance of less dislocation density, the surprising result that the nitride semiconductor substrate of suitable low dislocation density semiconductor device fabrication of long life can be obtained Obtained.

具体的には、積層構造とすることにより、サファイア基材からの貫通転位がEu添加GaN層を通過する際にその方向が曲げられて表面まで達することがなくなり、サファイア基材上に作製された窒化物半導体基板でありながらも、転位密度が劇的に低下することを見出した。 Specifically, by adopting a laminated structure, when the penetrating dislocations from the sapphire base material pass through the Eu-added GaN layer, the direction is not bent and reaches the surface, and the dislocations are formed on the sapphire base material. It was found that the dislocation density is dramatically reduced even though it is a nitride semiconductor substrate.

そして、ud−GaN層とEu添加GaN層との好ましい積層方法について、さらに、実験と検討を進めたところ、以下の知見を得た。 Then, as a result of further experiments and studies on a preferable lamination method of the ud-GaN layer and the Eu-added GaN layer, the following findings were obtained.

即ち、積層回数を1回とする場合には、ud−GaN層の上に積層されるEu添加GaN層の厚みの増加に比例して転位密度が低下し、総厚が3μm以下という薄さでありながら、十分に転位密度が低下した窒化物半導体基板を提供することができることを見出した。 That is, when the number of laminations is one, the dislocation density decreases in proportion to the increase in the thickness of the Eu-added GaN layer laminated on the ud-GaN layer, and the total thickness is as thin as 3 μm or less. However, they have found that it is possible to provide a nitride semiconductor substrate having a sufficiently reduced dislocation density.

一方、積層回数を複数回にして、窒化物半導体層を超格子構造の窒化物半導体層とした場合には、Eu添加GaN層の厚みがud−GaN層厚みの1/10程度であっても、積層回数の増加に比例して転位密度が低下することを見出した。そして、このような超格子構造とすることにより、総厚が3μm以下という薄さでありながら、十分に転位密度が低下した窒化物半導体基板を提供することができることが分かった。 On the other hand, when the number of laminations is multiple and the nitride semiconductor layer is a nitride semiconductor layer having a superlattice structure, even if the thickness of the Eu-added GaN layer is about 1/10 of the thickness of the ud-GaN layer. , It was found that the dislocation density decreases in proportion to the increase in the number of laminations. Then, it was found that by adopting such a superlattice structure, it is possible to provide a nitride semiconductor substrate having a total thickness of 3 μm or less and a sufficiently reduced dislocation density.

そして、ud−GaN層とEu添加GaN層との積層は、ELOG法と異なり、サファイア基材上の全面で行うことができるため、窒化物半導体層の大面積化を実現することができ、窒化物半導体基板の大型化を図ることができる。 Unlike the ELOG method, the ud-GaN layer and the Eu-added GaN layer can be laminated on the entire surface of the sapphire substrate, so that the area of the nitride semiconductor layer can be increased and nitrided. The size of the physical semiconductor substrate can be increased.

なお、このような積層構造を形成させることによってサファイア基材からの貫通転位がEu添加GaN層において曲げられて表面まで達することがなくなり、転位密度が低下した理由としては、以下のように推測される。 By forming such a laminated structure, the penetrating dislocations from the sapphire substrate are not bent in the Eu-added GaN layer and reach the surface, and the reason why the dislocation density is lowered is presumed as follows. To.

即ち、Eu添加GaN層においては、EuがGaと置換する形で導入されるが、Euの原子半径はGaに比べて約1.5倍大きいために、Gaと置換されたEuの周囲に歪が生じて、非晶質部分が形成される。その結果、貫通転位等の転位はEu添加GaN層で直線的に伝播されなくなり、表面の転位密度が低下したと推測される。 That is, in the Eu-added GaN layer, Eu is introduced in a form of replacing Ga, but since the atomic radius of Eu is about 1.5 times larger than that of Ga, it is distorted around the Eu replaced with Ga. Is generated, and an amorphous portion is formed. As a result, it is presumed that dislocations such as through dislocations are not linearly propagated in the Eu-added GaN layer, and the dislocation density on the surface is lowered.

上記においては、窒化物としてGaN、添加元素としてEuを挙げて説明したが、窒化物としては、GaN以外のAlN、InN等のいわゆるGaN系の窒化物(InGaNやAlGaN等の混晶を含む)であっても同様に扱うことができる。そして、添加元素としてはEuに限定されず、Sc、Y、およびLaからLuまでのランタノイド系元素を総称した希土類元素であれば、同様に転位密度が十分に低下した窒化物半導体基板を提供することができる。 In the above description, GaN is used as the nitride and Eu is used as the additive element, but as the nitride, so-called GaN-based nitrides such as AlN and InN other than GaN (including mixed crystals such as InGaN and AlGaN) are used. However, it can be treated in the same way. The additive element is not limited to Eu, and if it is a rare earth element that collectively refers to Sc, Y, and lanthanoid elements from La to Lu, a nitride semiconductor substrate having a sufficiently reduced rearrangement density is similarly provided. be able to.

また、基材としては、サファイアの他に、SiCやSiを用いてもよく、また、厚みの薄いGaNを基材として用いてもよい。SiCは安価であり、かつ熱伝導性が高く放熱性に優れているため、高パワーの半導体デバイス製造に好適な窒化物半導体基板を安価に提供することができる。そして、Siは大きなサイズの基材を容易に入手することが可能であるため、大型化された窒化物半導体基板を提供することができる。また、厚みの薄いGaNを基材として用いることにより、GaNバルク基板を安価に提供することができる。 Further, as the base material, in addition to sapphire, SiC or Si may be used, or GaN having a thin thickness may be used as the base material. Since SiC is inexpensive, has high thermal conductivity, and is excellent in heat dissipation, it is possible to inexpensively provide a nitride semiconductor substrate suitable for manufacturing a high-power semiconductor device. Since Si can easily obtain a large-sized base material, it is possible to provide a large-sized nitride semiconductor substrate. Further, by using GaN having a thin thickness as a base material, a GaN bulk substrate can be provided at low cost.

以上のように、本技術によれば、基材上に窒化物半導体層が形成された窒化物半導体基板において、窒化物半導体層を局所的な歪が異なる2以上の窒化物層を用いて交互に積層された構造に形成することにより、基材側からの転位の少なくとも一部が曲げられて、表面に到達するまでに消滅させることができる。その結果、窒化物半導体層の表面における転位密度が、高性能、長寿命の半導体デバイスの作製に好適とされる10cm−2オーダー以下にまで低下した窒化物半導体基板を提供することができる。As described above, according to the present technology, in a nitride semiconductor substrate in which a nitride semiconductor layer is formed on a base material, the nitride semiconductor layers are alternately used by using two or more nitride layers having different local strains. By forming the structure laminated on the substrate, at least a part of the dislocations from the substrate side can be bent and disappear by the time it reaches the surface. As a result, it is possible to provide the dislocation density on the surface of the nitride semiconductor layer, a high performance, a nitride semiconductor substrate was reduced to 10 6 cm -2 order below are suitable for manufacturing a semiconductor device of long life ..

また、基材上に形成された窒化物半導体層を基材から取り外すことにより、取り外された窒化物半導体層を窒化物半導体バルク基板として用いることができる。 Further, by removing the nitride semiconductor layer formed on the base material from the base material, the removed nitride semiconductor layer can be used as the nitride semiconductor bulk substrate.

請求項1〜14に記載の発明は上記の知見に基づくものであり、請求項1に記載の発明は、
基材上に窒化物半導体層が形成された窒化物半導体基板であって、
前記窒化物半導体層が、
ドーピング材料が添加されていない厚み0.1〜50nmのアンドープ窒化物層と、
ドーピング材料として希土類元素が添加された厚み0.1〜2000nmの希土類元素添加窒化物層とが1回積層されて形成されており、
前記窒化物半導体層の表面における転位密度が10cm−2オーダー以下であることを特徴とする窒化物半導体基板である。
The inventions according to claims 1 to 14 are based on the above findings, and the invention according to claim 1 is based on the above findings.
A nitride semiconductor substrate in which a nitride semiconductor layer is formed on a base material.
The nitride semiconductor layer
An undoped nitride layer with a thickness of 0.1 to 50 nm to which no doping material is added,
A rare earth element-added nitride layer having a thickness of 0.1 to 2000 nm to which a rare earth element is added as a doping material is laminated once and formed.
A nitride semiconductor substrate, wherein the dislocation density on the surface of the nitride semiconductor layer is not more than 10 6 cm -2 order.

そして、請求項2に記載の発明は、
基材上に窒化物半導体層が形成された窒化物半導体基板であって、
前記窒化物半導体層が、
ドーピング材料が添加されていない厚み0.1〜50nmのアンドープ窒化物層と、
ドーピング材料として希土類元素が添加された厚み0.1〜200nmの希土類元素添加窒化物層とが複数回積層されて超格子構造に形成されており、
前記窒化物半導体層の表面における転位密度が10cm−2オーダー以下であることを特徴とする窒化物半導体基板である。
The invention according to claim 2 is
A nitride semiconductor substrate in which a nitride semiconductor layer is formed on a base material.
The nitride semiconductor layer
An undoped nitride layer with a thickness of 0.1 to 50 nm to which no doping material is added,
A rare earth element-added nitride layer having a thickness of 0.1 to 200 nm added as a doping material is laminated multiple times to form a superlattice structure.
A nitride semiconductor substrate, wherein the dislocation density on the surface of the nitride semiconductor layer is not more than 10 6 cm -2 order.

また、請求項3に記載の発明は、
積層回数が2〜300回であることを特徴とする請求項2に記載の窒化物半導体基板である。
Further, the invention according to claim 3 is
The nitride semiconductor substrate according to claim 2, wherein the number of laminations is 2 to 300 times.

また、請求項4に記載の発明は、
前記窒化物半導体層における窒化物が、GaN、InN、AlN、またはこれらのいずれか2つ以上の混晶であることを特徴とする請求項1ないし請求項3のいずれか1項に記載の窒化物半導体基板である。
Further, the invention according to claim 4 is
The nitride according to any one of claims 1 to 3, wherein the nitride in the nitride semiconductor layer is GaN, InN, AlN, or a mixed crystal of any two or more of these. It is a physical semiconductor substrate.

また、請求項5に記載の発明は、
前記希土類元素が、Euであることを特徴とする請求項1ないし請求項4のいずれか1項に記載の窒化物半導体基板である。
Further, the invention according to claim 5 is
The nitride semiconductor substrate according to any one of claims 1 to 4, wherein the rare earth element is Eu.

また、請求項6に記載の発明は、
前記Euの添加量が、0.01〜2原子%であることを特徴とする請求項5に記載の窒化物半導体基板である。
Further, the invention according to claim 6 is
The nitride semiconductor substrate according to claim 5, wherein the amount of Eu added is 0.01 to 2 atomic%.

また、請求項7に記載の発明は、
総厚が3μm以下であることを特徴とする請求項1ないし請求項6のいずれか1項に記載の窒化物半導体基板である。
Further, the invention according to claim 7 is
The nitride semiconductor substrate according to any one of claims 1 to 6, wherein the total thickness is 3 μm or less.

また、請求項8に記載の発明は、
前記基材がサファイア、SiC、Si、GaNのいずれかであることを特徴とする請求項1ないし請求項7のいずれか1項に記載の窒化物半導体基板である。
Further, the invention according to claim 8 is
The nitride semiconductor substrate according to any one of claims 1 to 7, wherein the base material is any one of sapphire, SiC, Si, and GaN.

また、請求項9に記載の発明は、
基材上に窒化物半導体層が形成された窒化物半導体基板であって、
前記窒化物半導体層が、局所的な歪が異なる厚み0.1〜50nmのアンドープ窒化物層および厚み0.1〜2000nmの希土類元素添加窒化物層が交互に1回積層された構造を有しており、
前記窒化物半導体層の表面における転位密度が10cm−2オーダー以下であることを特徴とする窒化物半導体基板である。
Further, the invention according to claim 9 is
A nitride semiconductor substrate in which a nitride semiconductor layer is formed on a base material.
The nitride semiconductor layer has a structure in which an undoped nitride layer having a thickness of 0.1 to 50 nm and a rare earth element-added nitride layer having a thickness of 0.1 to 2000 nm having different local strains are alternately laminated once. And
A nitride semiconductor substrate, wherein the dislocation density on the surface of the nitride semiconductor layer is not more than 10 6 cm -2 order.

また、請求項10に記載の発明は、
基材上に窒化物半導体層が形成された窒化物半導体基板であって、
前記窒化物半導体層が、局所的な歪が異なる厚み0.1〜50nmのアンドープ窒化物層および厚み0.1〜200nmの希土類元素添加窒化物層が交互に複数回積層された超格子構造を有しており、
前記窒化物半導体層の表面における転位密度が10cm−2オーダー以下であることを特徴とする窒化物半導体基板である。
Further, the invention according to claim 10 is
A nitride semiconductor substrate in which a nitride semiconductor layer is formed on a base material.
The nitride semiconductor layer has a superlattice structure in which an undoped nitride layer having a thickness of 0.1 to 50 nm and a rare earth element-added nitride layer having a thickness of 0.1 to 200 nm having different local strains are alternately laminated a plurality of times. Have and
A nitride semiconductor substrate, wherein the dislocation density on the surface of the nitride semiconductor layer is not more than 10 6 cm -2 order.

また、請求項11に記載の発明は、
基材側からの転位の少なくとも一部が、前記窒化物半導体層の前記交互に積層された構造において曲げられて、表面に到達するまでに消滅していることを特徴とする請求項9または請求項10に記載の窒化物半導体基板である。
Further, the invention according to claim 11
9. Or claim, wherein at least a part of the dislocations from the substrate side is bent in the alternately laminated structure of the nitride semiconductor layer and disappears by the time it reaches the surface. Item 10. The nitride semiconductor substrate according to claim 10.

また、請求項12に記載の発明は、
前記窒化物半導体層が、前記基材から取り外されて窒化物半導体バルク基板として形成されていることを特徴とする請求項9ないし請求項11のいずれか1項に記載の窒化物半導体基板である。
Further, the invention according to claim 12
The nitride semiconductor substrate according to any one of claims 9 to 11, wherein the nitride semiconductor layer is removed from the base material to form a nitride semiconductor bulk substrate. ..

そして、上記した本発明に係る窒化物半導体基板は、十分に転位密度が低下した窒化物半導体基板であるため、発光デバイスだけでなく、高周波デバイスや高出力デバイスにも好適に使用することができる。 Since the nitride semiconductor substrate according to the present invention described above is a nitride semiconductor substrate having a sufficiently reduced dislocation density, it can be suitably used not only for light emitting devices but also for high frequency devices and high output devices. ..

即ち、請求項13に記載の発明は、
請求項1ないし請求項12のいずれか1項に記載の窒化物半導体基板を用いて作製されていることを特徴とする半導体デバイスである。
That is, the invention according to claim 13 is
A semiconductor device characterized in that it is manufactured by using the nitride semiconductor substrate according to any one of claims 1 to 12.

また、請求項14に記載の発明は、
発光デバイス、高周波デバイス、高出力デバイスのいずれかであることを特徴とする請求項13に記載の半導体デバイスである。
Further, the invention according to claim 14
The semiconductor device according to claim 13, wherein the semiconductor device is any of a light emitting device, a high frequency device, and a high output device.

上記した本発明に係る窒化物半導体基板は、有機金属気相エピタキシャル法(OMVPE法)を用いて、900〜1200℃の温度条件で、途中で反応容器から取り出すことなく一連の工程で、ドーピング材料が添加されていないアンドープ窒化物層と、ドーピング材料としてEuなどの希土類元素が添加された希土類元素添加窒化物層とを、サファイア等の基材上に積層させることにより製造することができる。 The above-mentioned nitride semiconductor substrate according to the present invention is a doping material using an organic metal vapor phase epitaxial method (OMVPE method) in a series of steps under temperature conditions of 900 to 1200 ° C. without taking it out of the reaction vessel in the middle. It can be produced by laminating an undoped nitride layer to which is not added and a rare earth element-added nitride layer to which a rare earth element such as Eu is added as a doping material on a substrate such as sapphire.

窒化物層の成長に際して、その成長温度を高くすると、表面まで貫通した転位によるピット(穴)が大きくなり、転位密度を十分に低減させることができない。一方、温度を低くすると、ピットが小さくなり転位密度を十分に低減させることができる。 When the growth temperature of the nitride layer is raised, the pits (holes) due to dislocations penetrating to the surface become large, and the dislocation density cannot be sufficiently reduced. On the other hand, when the temperature is lowered, the pits become smaller and the dislocation density can be sufficiently reduced.

このため、本発明においては、窒化物層の成長温度を900〜1100℃に設定する。このような温度条件とすることにより、希土類元素添加窒化物層を通過して表面まで達した転位によるピットを小さくさせることができ、さらに、Euなどの希土類元素を窒化物を構成するGaやAl、Inと確実に置換させて添加することができるため、十分に転位密度を低下させた窒化物半導体基板を製造することができる。 Therefore, in the present invention, the growth temperature of the nitride layer is set to 900 to 1100 ° C. By setting such a temperature condition, it is possible to reduce the pits due to dislocations that have passed through the rare earth element-added nitride layer and reached the surface, and further, rare earth elements such as Eu can be used as Ga or Al to form the nitride. , In can be reliably substituted and added, so that a nitride semiconductor substrate having a sufficiently reduced dislocation density can be manufactured.

そして、アンドープ窒化物層と希土類元素添加窒化物層の形成は、GaN結晶の成長に際してEuなどを添加するか否かで行うことができるため、反応容器から取り出すことなく一連の工程で行うことができ、高い生産効率で、大型化された窒化物半導体基板を安価に製造することができる。 Since the undoped nitride layer and the rare earth element-added nitride layer can be formed by adding Eu or the like when the GaN crystal grows, it can be performed in a series of steps without taking it out of the reaction vessel. It is possible to inexpensively manufacture a large-sized nitride semiconductor substrate with high production efficiency.

即ち、請求項15に記載の発明は、
基材上に窒化物半導体層が形成された窒化物半導体基板の製造方法であって、
基材上にGaN、InN、AlN、またはこれらのいずれか2つ以上の混晶を成長させて、ドーピング材料が添加されていないアンドープ窒化物層を0.1〜50nmの厚みに形成する工程と、
前記アンドープ窒化物層の上に、GaN、InN、AlN、またはこれらのいずれか2つ以上の混晶を母体材料とし、ドーピング材料として希土類元素をGa、InあるいはAlと置換するように添加することにより、希土類元素添加窒化物層を0.1〜2000nmの厚みに形成する工程とを備えており、
前記2つの工程を、有機金属気相エピタキシャル法を用いて、900〜1200℃の温度条件の下で、反応容器から取り出すことなく一連の形成工程によって行うことを特徴とする窒化物半導体基板の製造方法である。
That is, the invention according to claim 15
A method for manufacturing a nitride semiconductor substrate in which a nitride semiconductor layer is formed on a base material.
A step of growing GaN, InN, AlN, or a mixed crystal of any two or more of these on a substrate to form an undoped nitride layer having no doping material added to a thickness of 0.1 to 50 nm. ,
On the undoped nitride layer, GaN, InN, AlN, or a mixed crystal of any two or more of these is used as a base material, and a rare earth element is added as a doping material so as to replace Ga, In, or Al. It is provided with a step of forming a rare earth element-added nitride layer to a thickness of 0.1 to 2000 nm.
Manufacture of a nitride semiconductor substrate, wherein the two steps are carried out by a series of forming steps using an organic metal vapor phase epitaxial method under a temperature condition of 900 to 1200 ° C. without taking out from the reaction vessel. The method.

そして、請求項16に記載の発明は、
基材上に窒化物半導体層が形成された窒化物半導体基板の製造方法であって、
基材上にGaN、InN、AlN、またはこれらのいずれか2つ以上の混晶を成長させて、ドーピング材料が添加されていないアンドープ窒化物層を形成する工程と、
前記アンドープ窒化物層の上に、GaN、InN、AlN、またはこれらのいずれか2つ以上の混晶を母体材料とし、ドーピング材料として希土類元素をGa、InあるいはAlと置換するように添加することにより、希土類元素添加窒化物層を0.1〜200nmの厚みに形成する工程とを備えており、
前記2つの工程を、有機金属気相エピタキシャル法を用いて、900〜1200℃の温度条件の下で、反応容器から取り出すことなく一連の形成工程によって、交互に、複数回繰り返し行うことを特徴とする窒化物半導体基板の製造方法である。
The invention according to claim 16 is
A method for manufacturing a nitride semiconductor substrate in which a nitride semiconductor layer is formed on a base material.
A step of growing GaN, InN, AlN, or a mixed crystal of any two or more of these on a substrate to form an undoped nitride layer to which no doping material is added.
On the undoped nitride layer, GaN, InN, AlN, or a mixed crystal of any two or more of these is used as a base material, and a rare earth element is added as a doping material so as to replace Ga, In, or Al. It is provided with a step of forming a rare earth element-added nitride layer to a thickness of 0.1 to 200 nm.
The feature is that the above two steps are alternately repeated a plurality of times by a series of forming steps using an organic metal vapor phase epitaxial method under a temperature condition of 900 to 1200 ° C. without taking out from the reaction vessel. This is a method for manufacturing a nitride semiconductor substrate.

前記したように、積層を繰り返して超格子構造の窒化物半導体層とすることにより、総厚が3μm以下という薄さでありながら、十分に転位密度が低下した窒化物半導体基板を製造することができる。 As described above, by repeating the lamination to form a nitride semiconductor layer having a superlattice structure, it is possible to manufacture a nitride semiconductor substrate having a total thickness of 3 μm or less and a sufficiently reduced dislocation density. it can.

また、請求項17に記載の発明は、
前記希土類元素として、Euを用いることを特徴とする請求項15または請求項16に記載の窒化物半導体基板の製造方法である。
Further, the invention according to claim 17
The method for producing a nitride semiconductor substrate according to claim 15 or 16, wherein Eu is used as the rare earth element.

Euは、ランタノイド系の希土類元素の内でも、Gaと置換された際、周囲に歪みを生じさせて転位の伝播を抑制するに適切な原子半径を有しているため、効率的に表面の転位密度を低下させることができる。 Even among the rare earth elements of the lanthanoid system, Eu has an atomic radius suitable for causing distortion in the surroundings and suppressing the propagation of dislocations when replaced with Ga, so that dislocations on the surface are efficiently performed. The density can be reduced.

また、Euは、Eu化合物の入手が容易であるためドーピング材料として好ましい。 In addition, Eu is preferable as a doping material because the Eu compound is easily available.

また、請求項18に記載の発明は、
Euを、Eu{N[Si(CH、Eu(C1119、Eu[C(CH(C)]のいずれかにより供給することを特徴とする請求項17に記載の窒化物半導体基板の製造方法である。
Further, the invention according to claim 18
Eu by any of Eu {N [Si (CH 3 ) 3 ] 2 } 3 , Eu (C 11 H 19 O 2 ) 3 , Eu [C 5 (CH 3 ) 4 (C 3 H 7 )] 2. The method for manufacturing a nitride semiconductor substrate according to claim 17, wherein the nitride semiconductor substrate is supplied.

具体的なEu源としては、例えば、Eu[C(CH、Eu[C(CHH]、Eu{N[Si(CH、Eu(C、Eu(C1119、Eu[C(CH(C)]等を挙げることができるが、これらの内でも、Eu{N[Si(CHやEu(C1119、Eu[C(CH(C)]は、反応装置内での蒸気圧が高いため、効率的な添加を行うことができる。Specific Eu sources include, for example, Eu [C 5 (CH 3 ) 5 ] 2 , Eu [C 5 (CH 3 ) 4 H] 2 , Eu {N [Si (CH 3 ) 3 ] 2 } 3 , Eu (C 5 H 7 O 2 ) 3 , Eu (C 11 H 19 O 2 ) 3 , Eu [C 5 (CH 3 ) 4 (C 3 H 7 )] 2 and the like can be mentioned. However, Eu {N [Si (CH 3 ) 3 ] 2 } 3 and Eu (C 11 H 19 O 2 ) 3 , Eu [C 5 (CH 3 ) 4 (C 3 H 7 )] 2 are in the reactor. Since the steam pressure is high, efficient addition can be performed.

また、請求項19に記載の発明は、
前記基材として、サファイア、SiC、Si、GaNのいずれかを用いることを特徴とする請求項15ないし請求項18のいずれか1項に記載の窒化物半導体基板の製造方法である。
Further, the invention according to claim 19
The method for manufacturing a nitride semiconductor substrate according to any one of claims 15 to 18, wherein any one of sapphire, SiC, Si, and GaN is used as the base material.

また、請求項20に記載の発明は、
さらに、基材上に形成された窒化物半導体層を前記基材から取り外して、窒化物半導体バルク基板とする工程を備えていることを特徴とする請求項15ないし請求項19のいずれか1項に記載の窒化物半導体基板の製造方法である。
Further, the invention according to claim 20
Further, any one of claims 15 to 19, further comprising a step of removing the nitride semiconductor layer formed on the base material from the base material to obtain a nitride semiconductor bulk substrate. The method for manufacturing a nitride semiconductor substrate according to the above.

基材上に形成された窒化物半導体層を基材から取り外すことにより、窒化物半導体層を窒化物半導体バルク基板として用いることができる。 By removing the nitride semiconductor layer formed on the base material from the base material, the nitride semiconductor layer can be used as the nitride semiconductor bulk substrate.

本発明によれば、サファイア等の安価な基材上であっても、十分に転位密度が低減された窒化物半導体基板を大面積で製造することができる窒化物半導体基板の製造技術を提供することができる。 According to the present invention, there is provided a technique for manufacturing a nitride semiconductor substrate capable of manufacturing a nitride semiconductor substrate having a sufficiently reduced dislocation density in a large area even on an inexpensive substrate such as sapphire. be able to.

本発明の一実施の形態に係る窒化物半導体基板の構成を示す模式図である。It is a schematic diagram which shows the structure of the nitride semiconductor substrate which concerns on one Embodiment of this invention. 本発明の一実施の形態に係る窒化物半導体基板のTEM画像である。It is a TEM image of the nitride semiconductor substrate which concerns on one Embodiment of this invention. 本発明の一実施の形態に係る窒化物半導体基板の表面のAFM画像である。It is an AFM image of the surface of the nitride semiconductor substrate which concerns on one Embodiment of this invention. 本発明の一実施の形態に係る窒化物半導体基板におけるEu添加GaN層の表面のAFM画像である。It is an AFM image of the surface of the Eu-added GaN layer in the nitride semiconductor substrate which concerns on one Embodiment of this invention. 本発明の一実施の形態に係る窒化物半導体基板の断面を特定の方向から観察したTEM画像である。It is a TEM image which observed the cross section of the nitride semiconductor substrate which concerns on one Embodiment of this invention from a specific direction. 本発明の他の実施の形態に係る窒化物半導体基板の構成を示す模式図である。It is a schematic diagram which shows the structure of the nitride semiconductor substrate which concerns on other embodiment of this invention. 本発明の他の実施の形態に係る窒化物半導体基板の表面のAFM画像である。6 is an AFM image of the surface of a nitride semiconductor substrate according to another embodiment of the present invention. 本発明の他の実施の形態に係る窒化物半導体基板における積層回数と転位密度との関係を示す図である。It is a figure which shows the relationship between the number of stacking | dislocation density in the nitride semiconductor substrate which concerns on other embodiment of this invention. 本発明の他の実施の形態に係る窒化物半導体基板のTEM像である。3 is a TEM image of a nitride semiconductor substrate according to another embodiment of the present invention.

以下、本発明を実施の形態に基づいて説明する。なお、以下においては、基材としてサファイア、窒化物半導体層としてGaN層、添加される希土類元素としてEuを例に挙げて説明するが、前記したように、これらに限定されるものではない。 Hereinafter, the present invention will be described based on the embodiments. In the following description, sapphire as a base material, a GaN layer as a nitride semiconductor layer, and Eu as an added rare earth element will be described as examples, but the present invention is not limited to these.

[1]第1の実施の形態
本実施の形態においては、サファイア基材上に、アンドープ窒化物層(ud−GaN層)と、希土類元素としてEuが添加された希土類元素添加窒化物層(Eu添加GaN層)とが1層ずつ積層されて、窒化物半導体層が形成された窒化物半導体基板について説明する。
[1] First Embodiment In the present embodiment, an undoped nitride layer (ud-GaN layer) and a rare earth element-added nitride layer (Eu) to which Eu is added as a rare earth element are added on a sapphire substrate. The nitride semiconductor substrate on which the added GaN layer) is laminated one by one to form the nitride semiconductor layer will be described.

1.窒化物半導体基板の基本的な構成
最初に本実施の形態に係る窒化物半導体基板の基本的な構成について説明する。図1は、本実施の形態に係る窒化物半導体基板の構成を示す模式図である。図1において、1は窒化物半導体基板、10はサファイア基材、20はud−GaN層21およびEu添加GaN層22をペアとして1回積層した窒化物半導体層である。
1. 1. Basic Configuration of Nitride Semiconductor Substrate First, the basic configuration of the nitride semiconductor substrate according to the present embodiment will be described. FIG. 1 is a schematic view showing the configuration of a nitride semiconductor substrate according to the present embodiment. In FIG. 1, 1 is a nitride semiconductor substrate, 10 is a sapphire substrate, and 20 is a nitride semiconductor layer in which an ud-GaN layer 21 and an Eu-added GaN layer 22 are laminated once as a pair.

なお、本実施の形態に係る窒化物半導体基板はサファイア基材上に窒化物半導体層を形成させたままテンプレートとして半導体デバイスの製造に用いられる場合もあり、その際、窒化物半導体層はバッファー(buffer)層として機能するため、この窒化物半導体層をバッファー(buffer)層と表現する場合もある。 The nitride semiconductor substrate according to the present embodiment may be used as a template for manufacturing a semiconductor device with the nitride semiconductor layer formed on the sapphire substrate, and at that time, the nitride semiconductor layer is used as a buffer ( Since it functions as a buffer layer, this nitride semiconductor layer may be referred to as a buffer layer.

そして、本実施の形態においては、図1に示すように、サファイア基材10と窒化物半導体層20との間に、サファイア基材10とGaNの格子定数の差(格子不整合)によるクラックの発生を防止するために475℃程度で低温成長させたLT−GaN層30と、サファイア基材10と窒化物半導体層(バッファー層)20との間の距離を大きくして転位の影響を抑制するためのud−GaN層40とを予め形成している。 Then, in the present embodiment, as shown in FIG. 1, cracks between the sapphire base material 10 and the nitride semiconductor layer 20 due to the difference in lattice constants between the sapphire base material 10 and GaN (lattice mismatch) occur. In order to prevent the occurrence, the distance between the LT-GaN layer 30 grown at a low temperature of about 475 ° C., the sapphire base material 10 and the nitride semiconductor layer (buffer layer) 20 is increased to suppress the influence of dislocations. The ud-GaN layer 40 for this purpose is formed in advance.

2.窒化物半導体基板の製造方法
次に、本実施の形態に係る窒化物半導体基板の製造方法について、厚み10nmのud−GaN層21および厚み300nmのEu添加GaN層22を積層して窒化物半導体基板1を製造した例を挙げて、具体的に説明する。
2. Method for Manufacturing Nitride Semiconductor Substrate Next, regarding the method for manufacturing the nitride semiconductor substrate according to the present embodiment, the ud-GaN layer 21 having a thickness of 10 nm and the Eu-added GaN layer 22 having a thickness of 300 nm are laminated to form a nitride semiconductor substrate. A specific description will be given with reference to an example in which 1 is manufactured.

最初に、有機金属気相成長法(OMVPE法)を用いて、サファイア基材10上に、成長温度475℃、圧力100kPaの条件下、成長速度1.3μm/hで厚み約30nmのLT−GaN層30を形成し、その後、LT−GaN層30上に、成長温度1150℃、圧力100kPaの条件下、成長速度0.8μm/hで厚さ約2μmのud−GaN層40を形成した。 First, using the metalorganic vapor phase growth method (OMVPE method), LT-GaN having a growth rate of 1.3 μm / h and a thickness of about 30 nm on a sapphire substrate 10 under the conditions of a growth temperature of 475 ° C. and a pressure of 100 kPa. The layer 30 was formed, and then the ud-GaN layer 40 having a growth rate of 0.8 μm / h and a thickness of about 2 μm was formed on the LT-GaN layer 30 under the conditions of a growth temperature of 1150 ° C. and a pressure of 100 kPa.

次に、同様にOMVPE法を用いて、ud−GaN層40上に、成長温度960℃、圧力100kPaの条件下、成長速度0.8μm/hで厚み300nmのEu添加GaN層22を形成した。 Next, similarly, using the OMVPE method, an Eu-added GaN layer 22 having a growth rate of 0.8 μm / h and a thickness of 300 nm was formed on the ud-GaN layer 40 under the conditions of a growth temperature of 960 ° C. and a pressure of 100 kPa.

次に、同様にOMVPE法を用いて、Eu添加GaN層22上に、成長温度960℃、圧力100kPaの条件下、成長速度0.8μm/hで厚み10nmのud−GaN層21を形成した。このように、Eu添加GaN層22とud−GaN層21とを1層ずつ積層することにより、窒化物半導体層20を形成させ、窒化物半導体基板1の製造を完了した。 Next, similarly, using the OMVPE method, an ud-GaN layer 21 having a growth rate of 0.8 μm / h and a thickness of 10 nm was formed on the Eu-added GaN layer 22 under the conditions of a growth temperature of 960 ° C. and a pressure of 100 kPa. In this way, the nitride semiconductor layer 20 was formed by laminating the Eu-added GaN layer 22 and the ud-GaN layer 21 one by one, and the production of the nitride semiconductor substrate 1 was completed.

なお、上記において、Ga原料としてはトリメチルガリウム(TMGa)を用い、供給量は0.55sccmとした。そして、N原料としてはアンモニア(NH)を用い、供給量は4.0slmとした。また、Eu有機原料としてはキャリアガス(水素ガス:H)でバブリングしたEu[C(CH(C)]を用い、供給量は1.5slmとした(供給温度:115℃)。In the above, trimethylgallium (TMGa) was used as the Ga raw material, and the supply amount was 0.55 sccm. Ammonia (NH 3 ) was used as the N raw material, and the supply amount was 4.0 slm. As the Eu organic raw material, Eu [C 5 (CH 3 ) 4 (C 3 H 7 )] 2 bubbled with a carrier gas (hydrogen gas: H 2 ) was used, and the supply amount was 1.5 slm (supply temperature). : 115 ° C).

このとき、OMVPE装置の配管バルブ等を通常仕様のもの(耐熱温度80〜100℃)から高温特殊仕様のものに変更することにより、Eu原料の供給温度を115〜135℃の十分高い温度に保って、十分な量のEuを反応管に供給できるようにした。 At this time, by changing the piping valve of the OMVPE device from the normal specification (heat resistant temperature 80 to 100 ° C) to the high temperature special specification, the supply temperature of the Eu raw material is maintained at a sufficiently high temperature of 115 to 135 ° C. Therefore, a sufficient amount of Eu can be supplied to the reaction tube.

そして、本実施の形態において、各層の形成は、途中で試料を反応管より取り出すことなく、成長の中断がないように一連の工程で行った。 Then, in the present embodiment, the formation of each layer was carried out in a series of steps so that the sample was not taken out from the reaction tube in the middle and the growth was not interrupted.

3.転位密度の評価
(1)TEM画像に基づく評価
上記で得られた窒化物半導体基板の表面における転位密度について、まず、透過型電子顕微鏡(TEM)を用いて断面を観察して、転位密度の低減効果について評価した。
3. 3. Evaluation of dislocation density (1) Evaluation based on TEM image Regarding the dislocation density on the surface of the nitride semiconductor substrate obtained above, first, the cross section is observed using a transmission electron microscope (TEM) to reduce the dislocation density. The effect was evaluated.

図2は、窒化物半導体基板のTEM画像である。図2より、この窒化物半導体基板においては、最下層のサファイア基材の上に形成されたud−GaN層に発生した転位が表面に向けて伝播されていることが分かる。しかし、これらの転位の内、右側の濃色の1点鎖線で丸く囲んだ部分では表面まで転位が到達しているものの、左側の薄色の1点鎖線で丸く囲んだ部分では転位が表面に到達するまでに、ud−GaN層とEu添加GaN層が積層された窒化物半導体層(バッファー層)内で消滅している。この結果より、本実施の形態によれば、窒化物半導体基板において、転位密度を低減できることが確認できる。 FIG. 2 is a TEM image of a nitride semiconductor substrate. From FIG. 2, it can be seen that in this nitride semiconductor substrate, dislocations generated in the ud-GaN layer formed on the lowermost sapphire substrate are propagated toward the surface. However, of these dislocations, the dislocations reach the surface in the part circled by the dark one-dot chain line on the right side, but the dislocations reach the surface in the part circled by the light-colored one-dot chain line on the left side. By the time it reaches, it has disappeared in the nitride semiconductor layer (buffer layer) in which the ud-GaN layer and the Eu-added GaN layer are laminated. From this result, it can be confirmed that the dislocation density can be reduced in the nitride semiconductor substrate according to the present embodiment.

(2)AFM画像に基づく評価
次に、窒化物半導体層(バッファー層)の形成の前後において表面に現われた転位の様子を原子間力顕微鏡(AFM)により観察して、転位密度の低減効果について評価した。なお、観察は1μm四方の同じ箇所で行った。
(2) Evaluation based on AFM image Next, the state of dislocations appearing on the surface before and after the formation of the nitride semiconductor layer (buffer layer) is observed with an atomic force microscope (AFM), and the effect of reducing the dislocation density is observed. evaluated. The observation was performed at the same location 1 μm square.

図3は窒化物半導体基板の表面のAFM画像であり、(a)は窒化物半導体層(バッファー層)形成前のud−GaN層の表面、(b)窒化物半導体層(バッファー層)形成後の窒化物半導体層(バッファー層)の表面を示している。 FIG. 3 is an AFM image of the surface of the nitride semiconductor substrate, (a) is the surface of the ud-GaN layer before the nitride semiconductor layer (buffer layer) is formed, and (b) is after the nitride semiconductor layer (buffer layer) is formed. The surface of the nitride semiconductor layer (buffer layer) is shown.

図3(a)に示すように、ud−GaN層の表面では、丸で囲んだ多くの箇所に転位に基づくピットが存在しており、その径も大きい。これに対して、窒化物半導体層(バッファー層)の表面では、図3(b)に示すように、1点鎖線の丸で囲んだ広い箇所に少しのピットが存在するだけで、その径も小さくなっている。 As shown in FIG. 3A, on the surface of the ud-GaN layer, pits based on dislocations exist at many points circled, and their diameters are also large. On the other hand, on the surface of the nitride semiconductor layer (buffer layer), as shown in FIG. 3 (b), there are only a few pits in a wide area circled by the alternate long and short dash line, and the diameter is also large. It's getting smaller.

この結果より、上記と同様に、本実施の形態によれば、窒化物半導体基板において転位密度を低減できることが確認できる。なお、ピットの径が小さくなった理由としては、GaN層において形成されるピットの径はその成長温度と関係しており、上層となるEu添加GaN層の成長を960℃という低温で行ったことにより、ピットの径が小さくなったためと考えられる。そして、ピットの径が小さくなってピットが塞がれると、転位密度がさらに低減される。 From this result, it can be confirmed that the dislocation density can be reduced in the nitride semiconductor substrate according to the present embodiment in the same manner as described above. The reason why the diameter of the pits became smaller is that the diameter of the pits formed in the GaN layer is related to the growth temperature, and the growth of the Eu-added GaN layer as the upper layer was performed at a low temperature of 960 ° C. It is probable that the diameter of the pit became smaller due to this. When the diameter of the pit becomes smaller and the pit is closed, the dislocation density is further reduced.

具体的に転位密度を測定したところ、図3(a)では10〜10オーダーであったのに対して、図3(b)では10オーダーまで低減されていた。The measured specific dislocation density, whereas was 10 108 to 109 order in FIG. 3 (a), it had been reduced to 10 6 Order in FIG 3 (b).

(3)Eu添加GaN層の厚みと転位密度との関係
本発明者は、さらに、Eu添加GaN層の厚みと転位密度との関係について評価するために、上記と同様にして、厚み10nmのud−GaN層上に、Eu添加GaN層を厚み900nmまで成長させ、厚みが転位密度にどのように影響するのか評価した。
(3) Relationship between the thickness of the Eu-added GaN layer and the dislocation density The present inventor further evaluates the relationship between the thickness of the Eu-added GaN layer and the dislocation density in the same manner as above. An Eu-added GaN layer was grown on the −GaN layer to a thickness of 900 nm, and how the thickness affects the dislocation density was evaluated.

具体的には、Eu添加GaN層の厚みが100nm、300nm、900nmとなった時点で、上記と同様に、表面に現われた転位の様子をAFMにより観察した。 Specifically, when the thickness of the Eu-added GaN layer was 100 nm, 300 nm, and 900 nm, the state of dislocations appearing on the surface was observed by AFM in the same manner as described above.

図4は、それぞれの厚みのEu添加GaN層の表面のAFM画像であり、(a)は厚み100nm、(b)は厚み300nm、(c)は厚み900nmにおける結果である。 FIG. 4 is an AFM image of the surface of the Eu-added GaN layer of each thickness, where (a) is a thickness of 100 nm, (b) is a thickness of 300 nm, and (c) is a result of a thickness of 900 nm.

図4より、Eu添加GaN層の厚みが増すにつれて、1点鎖線の丸で囲んで示すように、ピットが減少しており、厚み900nmでは殆ど消失していることが分かる。 From FIG. 4, it can be seen that as the thickness of the Eu-added GaN layer increases, the pits decrease as shown by circled by the alternate long and short dash line, and almost disappear at a thickness of 900 nm.

具体的に転位密度を測定したところ、図4(a)では10オーダー、図4(b)では10オーダー、図4(c)では10オーダーであり、厚みが増すにつれて、劇的に転位密度が低下することが確認できた。The measured specific dislocation density, FIGS. 4 (a) in 108 order, and FIG. 4 (b) in 107 order, a 106 order in FIG. 4 (c), the as the thickness increases dramatically It was confirmed that the dislocation density decreased.

(4)本実施の形態における転位密度の伝播
ここで、本実施の形態における転位密度の伝播について、図5を用いて説明する。なお、図5は、上記で作製された窒化物半導体基板の断面を特定の方向、具体的には、上向きg=[002]およびg=[110]方向から観察したTEM画像であり、それぞれを上下に配置して示している。
(4) Propagation of dislocation density in the present embodiment Here, the propagation of the dislocation density in the present embodiment will be described with reference to FIG. Note that FIG. 5 is a TEM image obtained by observing the cross section of the nitride semiconductor substrate produced above from a specific direction, specifically, upward g = [002] and g = [110] directions. It is shown by arranging it vertically.

図5において、g=[002]方向はらせん転位(Screw dislocation)を決定する方向であり、g=[110]方向は刃状転位(edge dislocation)を決定する方向である。しかし、図5から分かるように、これらの転位の他に、g=[002]方向およびg=[110]方向の双方に、いくつかの転移が混合転位(Mix dislocation)として現れており、これらの混合転位は窒化物半導体層(バッファー層)によって、その成長、消滅が支配されている。 In FIG. 5, the g = [002] direction is the direction for determining the screw dislocation, and the g = [110] direction is the direction for determining the edge dislocation. However, as can be seen from FIG. 5, in addition to these dislocations, some dislocations appear as mixed dislocations (Mix dislocation) in both the g = [002] direction and the g = [110] direction. The growth and disappearance of the mixed dislocations are controlled by the nitride semiconductor layer (buffer layer).

具体的に、図5では、混合転位が窒化物半導体層(バッファー層)のEu添加GaN層に伝播した際、まず、らせん転位が収束されて消滅し、その後、刃状転位のベクトル(edge vector)が収束されて、1点鎖線の白抜き楕円で囲まれた箇所においては、2つの混合転位が表面まで到達することなく消滅している。 Specifically, in FIG. 5, when the mixed dislocations propagate to the Eu-added GaN layer of the nitride semiconductor layer (buffer layer), the spiral dislocations first converge and disappear, and then the edge vector (edge vector). ) Is converged, and the two mixed dislocations disappear without reaching the surface at the part surrounded by the white ellipse of the one-point chain line.

4.本実施の形態における効果
以上のように、本実施に形態においては、安価なサファイア基材上に、ud−GaN層とEu添加GaN層を適切な厚みで1回積層するという簡便な方法で、10cm−2オーダー以下という十分に低転位密度の窒化物半導体基板を得ることができるため、高性能、長寿命の半導体デバイスを安価に提供するという近年の要請に好適に応えることができる。
4. Effects in the present embodiment As described above, in the present embodiment, the ud-GaN layer and the Eu-added GaN layer are laminated once with an appropriate thickness on an inexpensive sapphire base material by a simple method. Since a nitride semiconductor substrate having a sufficiently low dislocation density of 10 6 cm- 2 orders or less can be obtained, it is possible to suitably meet the recent demand for inexpensively providing a high-performance, long-life semiconductor device.

[2]第2の実施の形態
上記した第1の実施の形態においては、ud−GaN層の上に積層されるEu添加GaN層の厚みの増加に合わせて転位密度を低減させることができるが、Eu添加GaN層が厚くなり過ぎると、基材であるサファイアと窒化物半導体層のGaNとでは熱膨張係数に差があるためサファイアと窒化物半導体層との界面に反りが発生して、窒化物半導体基板として使用できなくなる恐れがある。
[2] Second Embodiment In the first embodiment described above, the dislocation density can be reduced as the thickness of the Eu-added GaN layer laminated on the ud-GaN layer increases. If the Eu-added GaN layer becomes too thick, the sapphire as the base material and the GaN of the nitride semiconductor layer have different thermal expansion coefficients, so that the interface between the sapphire and the nitride semiconductor layer is warped and nitrided. There is a risk that it cannot be used as a physical semiconductor substrate.

そこで、本実施の形態においては、サファイア基材上にud−GaN層とEu添加GaN層とを交互に積層することを複数回繰り返して、ud−GaN層とEu添加GaN層の複数ペアを積層して超格子構造の窒化物半導体層を形成することにより、薄くても十分に転位密度が低減された窒化物半導体基板を製造している。 Therefore, in the present embodiment, the ud-GaN layer and the Eu-added GaN layer are alternately laminated on the sapphire substrate a plurality of times, and a plurality of pairs of the ud-GaN layer and the Eu-added GaN layer are laminated. By forming a nitride semiconductor layer having a superlattice structure, a nitride semiconductor substrate having a sufficiently reduced dislocation density even if it is thin is manufactured.

1.窒化物半導体基板の基本的な構成
最初に本実施の形態に係る窒化物半導体基板の基本的な構成について説明する。図6は、本実施の形態に係る窒化物半導体基板の構成を示す模式図である。なお、図6における符号は窒化物半導体基板が2である以外は図1と同様である。図6より分かるように、本実施の形態においては、窒化物半導体層20が、Eu添加GaN層22とud−GaN層21を交互に複数回積層されており、また、Eu添加GaN層22の酸化を抑制するという観点から最表層にud−GaN層21が形成されている点を除いては、第1の実施の形態に係る窒化物半導体基板と同様の構成となっている。
1. 1. Basic Configuration of Nitride Semiconductor Substrate First, the basic configuration of the nitride semiconductor substrate according to the present embodiment will be described. FIG. 6 is a schematic view showing the configuration of the nitride semiconductor substrate according to the present embodiment. The reference numerals in FIG. 6 are the same as those in FIG. 1 except that the nitride semiconductor substrate is 2. As can be seen from FIG. 6, in the present embodiment, the nitride semiconductor layer 20 is laminated with the Eu-added GaN layer 22 and the ud-GaN layer 21 alternately a plurality of times, and the Eu-added GaN layer 22 The structure is the same as that of the nitride semiconductor substrate according to the first embodiment, except that the ud-GaN layer 21 is formed on the outermost surface layer from the viewpoint of suppressing oxidation.

2.窒化物半導体基板の製造方法
そして、本実施の形態に係る窒化物半導体基板2の製造方法についても、ud−GaN層21とEu添加GaN層22の形成を繰り返しながら行って、ud−GaN層21とEu添加GaN層22の複数ペアを積層することを除いては、第1の実施の形態に係る窒化物半導体基板の製造方法と同様である。なお、本実施の形態においても、各層の形成は、途中で試料を反応管より取り出すことなく、成長の中断がないように一連の工程で行った。
2. Method for Manufacturing Nitride Semiconductor Substrate The method for manufacturing the nitride semiconductor substrate 2 according to the present embodiment also repeats the formation of the ud-GaN layer 21 and the Eu-added GaN layer 22 to repeat the formation of the ud-GaN layer 21. The method is the same as that of the method for manufacturing a nitride semiconductor substrate according to the first embodiment, except that a plurality of pairs of the Eu-added GaN layer 22 and the Eu-added GaN layer 22 are laminated. Also in this embodiment, the formation of each layer was carried out in a series of steps so that the sample was not taken out from the reaction tube in the middle and the growth was not interrupted.

3.転位密度の評価
(1)AFM画像に基づく評価
上記した窒化物半導体基板の製造方法を用い、厚み10nmのud−GaN層21および厚み1nmのEu添加GaN層22を、交互に40回(40ペア)積層して作製された窒化物半導体基板2の転位密度について、第1の実施の形態と同様に、AFM画像に基づいて転位密度の低減効果を評価した。
3. 3. Evaluation of dislocation density (1) Evaluation based on AFM image Using the above-mentioned method for manufacturing a nitride semiconductor substrate, the ud-GaN layer 21 having a thickness of 10 nm and the Eu-added GaN layer 22 having a thickness of 1 nm were alternately formed 40 times (40 pairs). ) Regarding the dislocation density of the nitride semiconductor substrate 2 produced by laminating, the effect of reducing the dislocation density was evaluated based on the AFM image as in the first embodiment.

図7は窒化物半導体基板の表面のAFM画像である。この図7と、厚み900nmのEu添加GaN層を1回積層した窒化物半導体基板の表面のAFM画像である図4(c)とを比較すると、総厚480nm(最表層のud−GaN層を含む)と図4(c)に比べて約半分の厚みでありながらも、さらに、転位密度が低下していることが分かる。 FIG. 7 is an AFM image of the surface of the nitride semiconductor substrate. Comparing this FIG. 7 with FIG. 4 (c), which is an AFM image of the surface of a nitride semiconductor substrate in which an Eu-added GaN layer having a thickness of 900 nm is laminated once, a ud-GaN layer having a total thickness of 480 nm (the outermost layer) is obtained. It can be seen that the dislocation density is further reduced, although the thickness is about half that of FIG. 4 (c).

この結果より、本実施の形態によれば、複数回積層して超格子構造の窒化物半導体層としたことにより、それぞれのEu添加GaN層において転位が曲げられて、薄い総厚であっても劇的に転位密度を低下できることが確認できた。 From this result, according to the present embodiment, by laminating a plurality of times to form a nitride semiconductor layer having a superlattice structure, dislocations are bent in each Eu-added GaN layer, and even if the total thickness is thin. It was confirmed that the dislocation density can be dramatically reduced.

(2)ペア数(積層回数)の転位密度低減への影響
次に、ペア数(積層回数)の転位密度低減への影響を調べるために、上記した窒化物半導体基板の製造方法を用い、厚み10nmのud−GaN層21および厚み3nmのEu添加GaN層22を交互に積層して、ペア数(積層回数)を13(実験A)、40(実験B)、70(実験C)と変えた3種類の窒化物半導体層が形成された窒化物半導体基板2について、それぞれ転位密度を測定した。
(2) Effect of number of pairs (number of stacks) on reduction of dislocation density Next, in order to investigate the effect of number of pairs (number of stacks) on reduction of dislocation density, the above-mentioned method for manufacturing a nitride semiconductor substrate was used to obtain thickness. The 10 nm ud-GaN layer 21 and the Eu-added GaN layer 22 having a thickness of 3 nm were alternately laminated, and the number of pairs (number of layers) was changed to 13 (Experiment A), 40 (Experiment B), and 70 (Experiment C). The dislocation density of each of the nitride semiconductor substrates 2 on which the three types of nitride semiconductor layers were formed was measured.

測定結果を表1に示すと共に、図8に示す。なお、図8において横軸はペア数、縦軸は転位密度(×10cm−2)である。また、実験Bにおいて40ペア積層して作製された窒化物半導体基板の断面TEM像を図9に示す。The measurement results are shown in Table 1 and FIG. The horizontal axis represents the number of pairs in FIG. 8, a vertical axis represents the dislocation density (× 10 6 cm -2). Further, FIG. 9 shows a cross-sectional TEM image of the nitride semiconductor substrate produced by laminating 40 pairs in Experiment B.

Figure 0006876337
Figure 0006876337

表1および図7より、最もペア数の少ない13ペアでも転位密度は10cm−2オーダーであり、ペア数が多くなるにつれて転位密度が低下することが分かる。From Table 1 and Figure 7, the most dislocation density in pairs having a small number of 13 pairs is 10 6 cm -2 order, it can be seen that the dislocation density decreases as the number of pairs increases.

そして、図9では、Dislocation1とDislocation2、2つの転位が存在しているが、Dislocation1では、窒化物半導体層(バッファー層)内に入った後、収束されて消滅している。一方、Dislocation2では、消滅はしていないものの、ペアを通過するにつれて転位のサイズが小さくなっている。この結果から見ても、表1および図7において、70ペアとさらにペア数を増やした実験Cにおいて、さらに、転位密度が低下していることが理解できる。 Then, in FIG. 9, two dislocations, Dislocation 1 and Dislocation 2, are present, but in Dislocation 1, after entering the nitride semiconductor layer (buffer layer), they are converged and disappear. On the other hand, in Dislocation 2, although it has not disappeared, the size of the dislocation becomes smaller as it passes through the pair. From this result, it can be understood that in Table 1 and FIG. 7, the dislocation density was further reduced in Experiment C in which the number of pairs was further increased to 70 pairs.

そして、上記の結果は、青色レーザによるピックアップやSiやSiC等を用いた縦型パワートランジスタを作製する場合に必要とされる転位密度(10cm−2オーダー)を満たしているため、本実施の形態に係る窒化物半導体基板は、サファイア基材上に形成されているにも拘らず、Blu−Rayに用いられるピックアップ用青色レーザおよび縦型パワートランジスタの製造に使用できることが分かる。The above results, because they meet the dislocation density (10 6 cm -2 order) required in the case of manufacturing a vertical power transistor using a pickup or Si and SiC or the like by the blue laser, this embodiment It can be seen that the nitride semiconductor substrate according to the above embodiment can be used for manufacturing a blue laser for pickup and a vertical power transistor used for Blu-Ray, although it is formed on a sapphire substrate.

また、ペア数が多くなるに従い転位密度が低減されるため、さらにペア数を増やしてさらに転位密度を低減させることにより、Blu−Rayに用いられる書き込み用の青色レーザに必要とされている10cm−2オーダーが達成できることが期待される。Further, since the dislocation density is reduced as the number of pairs increases, by reducing the further dislocation density further increase the number of pairs, 10 4 that is required for a blue laser for writing to be used in the Blu-Ray It is expected that the cm- 2 order can be achieved.

以上、本発明によれば、第1の実施の形態および第2の実施の形態に示したように、安価なサファイア基材等を用いて、高品質の窒化物半導体の製造を可能とする窒化物半導体基板を提供することができる。また、窒化物層を基材全面に形成することが可能なため、大面積化が可能であり実用性に優れる。 As described above, according to the present invention, as shown in the first embodiment and the second embodiment, nitridation that enables the production of high-quality nitride semiconductors by using an inexpensive sapphire substrate or the like. A physical semiconductor substrate can be provided. Further, since the nitride layer can be formed on the entire surface of the base material, the area can be increased and the practicality is excellent.

そして、上記の窒化物半導体基板から基材を除去することにより、窒化物半導体バルク基板とすることもできるため、半導体デバイス用の窒化物半導体基板として、さらに利用が広がる可能性がある。 Then, by removing the base material from the above-mentioned nitride semiconductor substrate, a nitride semiconductor bulk substrate can be obtained, so that the use as a nitride semiconductor substrate for semiconductor devices may be further expanded.

以上、本発明を実施の形態に基づき説明したが、本発明は上記の実施の形態に限定されるものではない。本発明と同一および均等の範囲内において、上記の実施の形態に対して種々の変更を加えることが可能である。 Although the present invention has been described above based on the embodiments, the present invention is not limited to the above embodiments. Within the same and equal scope as the present invention, various modifications can be made to the above embodiments.

1、2 窒化物半導体基板
10 サファイア基材
20 窒化物半導体層(バッファー層)
21 ud−GaN層
22 Eu添加GaN層
30 LT−GaN層
40 ud−GaN層
1, 2 Nitride semiconductor substrate 10 Sapphire substrate 20 Nitride semiconductor layer (buffer layer)
21 ud-GaN layer 22 Eu-added GaN layer 30 LT-GaN layer 40 ud-GaN layer

Claims (20)

基材上に窒化物半導体層が形成された窒化物半導体基板であって、
前記窒化物半導体層が、
ドーピング材料が添加されていない厚みが窒化物結晶の格子定数以上で50nm以下のアンドープ窒化物層と、
ドーピング材料として希土類元素が添加された厚みが窒化物結晶の格子定数以上で2000nm以下の希土類元素添加窒化物層とが1回積層されて形成されており、
前記窒化物半導体層の表面における転位密度が10cm−2オーダー以下であることを特徴とする窒化物半導体基板。
A nitride semiconductor substrate in which a nitride semiconductor layer is formed on a base material.
The nitride semiconductor layer
An undoped nitride layer having a thickness of 50 nm or less, which is equal to or greater than the lattice constant of the nitride crystal, to which no doping material is added.
A rare earth element-added nitride layer having a thickness of 2000 nm or less, which is equal to or more than the lattice constant of the nitride crystal, is laminated once as a doping material.
Nitride semiconductor substrate, wherein the dislocation density on the surface of the nitride semiconductor layer is not more than 10 6 cm -2 order.
基材上に窒化物半導体層が形成された窒化物半導体基板であって、
前記窒化物半導体層が、
ドーピング材料が添加されていない厚みが窒化物結晶の格子定数以上で50nm以下のアンドープ窒化物層と、
ドーピング材料として希土類元素が添加された厚みが窒化物結晶の格子定数以上で200nm以下の希土類元素添加窒化物層とが複数回積層されて超格子構造に形成されており、
前記窒化物半導体層の表面における転位密度が10cm−2オーダー以下であることを特徴とする窒化物半導体基板。
A nitride semiconductor substrate in which a nitride semiconductor layer is formed on a base material.
The nitride semiconductor layer
An undoped nitride layer having a thickness of 50 nm or less, which is equal to or greater than the lattice constant of the nitride crystal, to which no doping material is added.
A superlattice structure is formed by laminating a rare earth element-added nitride layer having a thickness of 200 nm or less, which is equal to or more than the lattice constant of the nitride crystal, to which a rare earth element has been added as a doping material multiple times.
Nitride semiconductor substrate, wherein the dislocation density on the surface of the nitride semiconductor layer is not more than 10 6 cm -2 order.
積層回数が2〜300回であることを特徴とする請求項2に記載の窒化物半導体基板。 The nitride semiconductor substrate according to claim 2, wherein the number of laminations is 2 to 300 times. 前記窒化物半導体層における窒化物が、GaN、InN、AlN、またはこれらのいずれか2つ以上の混晶であることを特徴とする請求項1ないし請求項3のいずれか1項に記載の窒化物半導体基板。 The nitride according to any one of claims 1 to 3, wherein the nitride in the nitride semiconductor layer is GaN, InN, AlN, or a mixed crystal of any two or more of these. Material semiconductor substrate. 前記希土類元素が、Euであることを特徴とする請求項1ないし請求項4のいずれか1項に記載の窒化物半導体基板。 The nitride semiconductor substrate according to any one of claims 1 to 4, wherein the rare earth element is Eu. 前記Euの添加量が、0.01〜2原子%であることを特徴とする請求項5に記載の窒化物半導体基板。 The nitride semiconductor substrate according to claim 5, wherein the amount of Eu added is 0.01 to 2 atomic%. 総厚が3μm以下であることを特徴とする請求項1ないし請求項6のいずれか1項に記載の窒化物半導体基板。 The nitride semiconductor substrate according to any one of claims 1 to 6, wherein the total thickness is 3 μm or less. 前記基材がサファイア、SiC、Si、GaNのいずれかであることを特徴とする請求項1ないし請求項7のいずれか1項に記載の窒化物半導体基板。 The nitride semiconductor substrate according to any one of claims 1 to 7, wherein the base material is any one of sapphire, SiC, Si, and GaN. 基材上に窒化物半導体層が形成された窒化物半導体基板であって、
前記窒化物半導体層が、局所的な歪が異なる厚みが窒化物結晶の格子定数以上で50nm以下のアンドープ窒化物層および厚みが窒化物結晶の格子定数以上で2000nm以下の希土類元素添加窒化物層が交互に1回積層された構造を有しており、
前記窒化物半導体層の表面における転位密度が10cm−2オーダー以下であることを特徴とする窒化物半導体基板。
A nitride semiconductor substrate in which a nitride semiconductor layer is formed on a base material.
The nitride semiconductor layer has an undoped nitride layer having a thickness different from the lattice constant of the nitride crystal and having a thickness of 50 nm or less, and a rare earth element-added nitride layer having a thickness of 2000 nm or less having a lattice constant of the nitride crystal or more. Has a structure in which is alternately laminated once.
Nitride semiconductor substrate, wherein the dislocation density on the surface of the nitride semiconductor layer is not more than 10 6 cm -2 order.
基材上に窒化物半導体層が形成された窒化物半導体基板であって、
前記窒化物半導体層が、局所的な歪が異なる厚みが窒化物結晶の格子定数以上で50nm以下のアンドープ窒化物層および厚みが窒化物結晶の格子定数以上で200nm以下の希土類元素添加窒化物層が交互に複数回積層された超格子構造を有しており、
前記窒化物半導体層の表面における転位密度が10cm−2オーダー以下であることを特徴とする窒化物半導体基板。
A nitride semiconductor substrate in which a nitride semiconductor layer is formed on a base material.
The nitride semiconductor layer has an undoped nitride layer having a thickness different from that of the nitride crystal and having a thickness of 50 nm or more and a lattice constant of a nitride crystal having a thickness of 200 nm or less. Has a superlattice structure in which is alternately laminated multiple times.
Nitride semiconductor substrate, wherein the dislocation density on the surface of the nitride semiconductor layer is not more than 10 6 cm -2 order.
基材側からの転位の少なくとも一部が、前記窒化物半導体層の前記交互に積層された構造において曲げられて、表面に到達するまでに消滅していることを特徴とする請求項9または請求項10に記載の窒化物半導体基板。 9. Or claim, wherein at least a part of the dislocations from the substrate side is bent in the alternately laminated structure of the nitride semiconductor layer and disappears by the time it reaches the surface. Item 10. The nitride semiconductor substrate according to item 10. 請求項9ないし請求項11のいずれか1項に記載の窒化物半導体基板から前記基材が取り外されて形成されている窒化物半導体層であることを特徴とする窒化物半導体バルク基板。A nitride semiconductor bulk substrate, which is a nitride semiconductor layer formed by removing the base material from the nitride semiconductor substrate according to any one of claims 9 to 11. 請求項1ないし請求項12のいずれか1項に記載の窒化物半導体基板を用いて作製されていることを特徴とする半導体デバイス。 A semiconductor device made by using the nitride semiconductor substrate according to any one of claims 1 to 12. 発光デバイス、高周波デバイス、高出力デバイスのいずれかであることを特徴とする請求項13に記載の半導体デバイス。 The semiconductor device according to claim 13, wherein the semiconductor device is any one of a light emitting device, a high frequency device, and a high output device. 基材上に窒化物半導体層が形成された窒化物半導体基板の製造方法であって、
基材上にGaN、InN、AlN、またはこれらのいずれか2つ以上の混晶を成長させて、ドーピング材料が添加されていないアンドープ窒化物層を窒化物結晶の格子定数以上で50nm以下の厚みに形成する工程と、
前記アンドープ窒化物層の上に、GaN、InN、AlN、またはこれらのいずれか2つ以上の混晶を母体材料とし、ドーピング材料として希土類元素をGa、InあるいはAlと置換するように添加することにより、希土類元素添加窒化物層を窒化物結晶の格子定数以上で2000nm以下の厚みに形成する工程とを備えており、
前記2つの工程を、有機金属気相エピタキシャル法を用いて、900〜1200℃の温度条件の下で、反応容器から取り出すことなく一連の形成工程によって行うことを特徴とする窒化物半導体基板の製造方法。
A method for manufacturing a nitride semiconductor substrate in which a nitride semiconductor layer is formed on a base material.
GaN, InN, AlN, or a mixed crystal of any two or more of these is grown on the substrate, and the undoped nitride layer to which no doping material is added has a thickness of 50 nm or less at the lattice constant of the nitride crystal or more. And the process of forming
On the undoped nitride layer, GaN, InN, AlN, or a mixed crystal of any two or more of these is used as a base material, and a rare earth element is added as a doping material so as to replace Ga, In, or Al. This includes a step of forming the rare earth element-added nitride layer to a thickness of 2000 nm or less, which is equal to or more than the lattice constant of the nitride crystal.
Manufacture of a nitride semiconductor substrate, wherein the two steps are carried out by a series of forming steps using an organic metal vapor phase epitaxial method under a temperature condition of 900 to 1200 ° C. without taking out from the reaction vessel. Method.
基材上に窒化物半導体層が形成された窒化物半導体基板の製造方法であって、
基材上にGaN、InN、AlN、またはこれらのいずれか2つ以上の混晶を成長させて、ドーピング材料が添加されていないアンドープ窒化物層を形成する工程と、
前記アンドープ窒化物層の上に、GaN、InN、AlN、またはこれらのいずれか2つ以上の混晶を母体材料とし、ドーピング材料として希土類元素をGa、InあるいはAlと置換するように添加することにより、希土類元素添加窒化物層を窒化物結晶の格子定数以上で200nm以下の厚みに形成する工程とを備えており、
前記2つの工程を、有機金属気相エピタキシャル法を用いて、900〜1200℃の温度条件の下で、反応容器から取り出すことなく一連の形成工程によって、交互に、複数回繰り返し行うことを特徴とする窒化物半導体基板の製造方法。
A method for manufacturing a nitride semiconductor substrate in which a nitride semiconductor layer is formed on a base material.
A step of growing GaN, InN, AlN, or a mixed crystal of any two or more of these on a substrate to form an undoped nitride layer to which no doping material is added.
On the undoped nitride layer, GaN, InN, AlN, or a mixed crystal of any two or more of these is used as a base material, and a rare earth element is added as a doping material so as to replace Ga, In, or Al. This comprises a step of forming the rare earth element-added nitride layer to a thickness of 200 nm or less, which is equal to or greater than the lattice constant of the nitride crystal.
The feature is that the above two steps are alternately repeated a plurality of times by a series of forming steps using an organic metal vapor phase epitaxial method under a temperature condition of 900 to 1200 ° C. without taking out from the reaction vessel. A method for manufacturing a nitride semiconductor substrate.
前記希土類元素として、Euを用いることを特徴とする請求項15または請求項16に記載の窒化物半導体基板の製造方法。 The method for producing a nitride semiconductor substrate according to claim 15 or 16, wherein Eu is used as the rare earth element. Euを、Eu{N[Si(CH、Eu(C1119、Eu[C(CH(C)]のいずれかにより供給することを特徴とする請求項17に記載の窒化物半導体基板の製造方法。 Eu by any of Eu {N [Si (CH 3 ) 3 ] 2 } 3 , Eu (C 11 H 19 O 2 ) 3 , Eu [C 5 (CH 3 ) 4 (C 3 H 7 )] 2. The method for manufacturing a nitride semiconductor substrate according to claim 17, wherein the nitride semiconductor substrate is supplied. 前記基材として、サファイア、SiC、Si、GaNのいずれかを用いることを特徴とする請求項15ないし請求項18のいずれか1項に記載の窒化物半導体基板の製造方法。 The method for producing a nitride semiconductor substrate according to any one of claims 15 to 18, wherein any one of sapphire, SiC, Si, and GaN is used as the base material. さらに、基材上に形成された窒化物半導体層を前記基材から取り外して、窒化物半導体バルク基板とする工程を備えていることを特徴とする請求項15ないし請求項19のいずれか1項に記載の窒化物半導体基板の製造方法。 Further, any one of claims 15 to 19, further comprising a step of removing the nitride semiconductor layer formed on the base material from the base material to obtain a nitride semiconductor bulk substrate. The method for manufacturing a nitride semiconductor substrate according to.
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