JP5367637B2 - Semiconductor element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor element having an excellent characteristic. <P>SOLUTION: The semiconductor element includes: an electron running layer formed of AlxGayIn1-x-yN (0&le;x&le;1, 0&le;y&le;1, 0&le;1-x-y&le;1) of a thickness below a critical film thickness with respect to at least AlN, or SiC of a thickness below a critical film thickness with respect to at least AlN on AlN formed on an AlN substrate or SiC substrate or formed on a GaN substrate; and an AlzGa1-zN (0&lt;z&le;1) gate. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a semiconductor element such as a semiconductor laser, and more particularly to a semiconductor element using materials for a light emitting layer and an active region that have significantly different characteristics such as a lattice constant and a refractive index between a substrate and a crystal.

  Since GaN-based devices do not provide high-quality GaN substrates, attempts have been made to use sapphire, SiC, spinel, Si, etc. substrates with large lattice irregularities. Among them, the one using sapphire is considered the most promising because the reliability of the laser for several thousand hours has been confirmed. However, in GaN / sapphire-based optical semiconductor devices, it is difficult to grow high-quality crystals due to the different crystal structures. After growing the GaN buffer layer at a low temperature, the temperature is raised to crystallize, and then the device structure is created. That is done. However, it is difficult to grow high-quality crystals even with this method. For this reason, a method of forming a selective growth mask having a window having a low aperture ratio after forming a buffer layer and lateral epitaxy of the AlGaN layer on the selective growth mask using this window as a starting point has also been attempted. With this method, the dislocation density can be easily reduced in a part of the layer that has undergone lateral epitaxy, so forming the laser active layer on it will lower the dislocation density in the active layer and increase the luminous efficiency. I can do it. However, this method is complicated and it is difficult to increase the area. Further, there is a concept that it is important to form GaInN having a high In composition and to form quantum dots in the active region in order to increase the light emission efficiency. For this reason, before forming the active layer, a layer with a large difference in lattice constant is formed to form an island-like structure, and an active layer is formed on the irregularities to form quantum dots to improve the laser characteristics. Attempts have been made (see Patent Document 1).

Japanese Patent Laid-Open No. 10-215029

  An object of the present invention is to provide a semiconductor device having good characteristics.

The semiconductor device of the present invention, A l N provided on the crystal, at least the critical film thickness or less of the thickness of the AlxGayIn1-x-yN (0 ≦ x <1,0 ≦ y ≦ 1,0 ≦ respect to the AlN crystal 1-x-y ≦ 1) crystal, or a critical film thickness or less of the thickness of the SiC crystal, the electron transit layer consisting of either at least for the AlN crystal, provided in the electron transit layer Al And a layer containing N, and a field effect transistor having a gate electrode on the opposite side of the electron transit layer across the layer containing Al and N .

  In the semiconductor device of the present invention, the active region or the entire active region is formed in substantially the same plane. Here, “substantially in the same plane” means that the roughness of the plane is inclined in the same direction from the crystallographic singular plane within several times the so-called inclined substrate formed by the polishing method. Furthermore, if the average angle between the interface formed by the substrate and the layer immediately above the substrate and the interface that is not parallel to this interface is q1, the surface roughness is reduced except for the surface roughness in a very small region with a diameter of several tens of nanometers or less. Is less than a fraction of q1. It shall include unevenness within several tens of nm with respect to the average plane orientation.

  In the case of an optical semiconductor element, this step is desirably less than half of the thickness of the active layer. In an electronic device, it is desirable that the thickness is not more than a fraction of the thickness of an active region (a carrier transit layer in a field effect device, or a junction region between a base collector and an emitter in a heterobipolar transistor).

  When the active layer or the heterointerface of the active region is inclined from the singular plane of the crystal, it goes without saying that the lower limit of the step becomes one atomic layer or several times as much as the inclination. When using the singular surface of the crystal, the lower limit of the step is larger than the irregularity of its surface on the singular surface.

  The semiconductor element of the present invention is formed on a substrate having a plane orientation different from the (0 0 0 1) plane of GaN or AlN by 0.05 degrees or more using a wurtzite structure crystal such as AlN or GaN. Also good. This includes 2H—SiC. In particular, the substrate is AlN or GaN, and one of (h m −h−m n) (| n / h | or | n / m | is 3 or more or 1/3 or less, n is not 0, h and m One of them is not 0, and h, m, and n are integers). In this case, not only the just surface but also a slightly inclined surface may be used. Further, 2H—SiC may be used instead of AlN or GaN. In hexagonal SiC, a substrate having an off angle from the (0 0 0 1) plane of 2H—SiC and having a plane orientation corresponding to the plane orientation may be used. Also in the case of a ZnSe-based crystal, a singular surface (1 1 n) (| n | is 3 or more) or its slightly inclined surface is used as the heterointerface of the active layer.

  Further, when the lattice constants of the substrate, the light emitting layer of the optical device, and the traveling layer of the electronic device (hereinafter referred to as the operation region) are different, (h m −h−m n) (| n / h | or | n / m | Is one or more or 1/3 or less, n is a non-zero integer, h and m are integers and one of h or m is not 0), and a quantum well is provided between the substrate and the operating region.

  On AlN having a thickness of 2 μm or more provided on AlN, SiC, or GaN, GaxInyAl1-xyN (0 ≦ x <1, 0 ≦ y ≦ 1, 0 ≦ 1−x below the critical film thickness for AlN). -Y ≦ 1) or SiC or a combination thereof, and an electron transit layer is provided, and AlpGaqIn1-p-qN (0 ≦ p <1, 0 ≦ q ≦ 1, 0 ≦ 1-pq ≦ 1) is provided as a gate. Form a field effect device.

  In the present invention, since the device regions are formed in the same plane, the special crystals are uniform within the size of the device. For this reason, the luminous efficiency of the optical device, the wavelength, the operating voltage of the electronic device, the amplification factor, etc. are uniform within the element, and a high-performance element can be obtained.

  In general, it is difficult to carry out a uniform process with a wafer edge of mm even when crystal growth or polishing is performed. For this reason, in an actual wafer process, chips can be obtained except for several mm at both ends. Since the area is effective by the square, if the half of one side of the wafer is an area where chips cannot be taken, the yield is drastically reduced. For this reason, the minimum size of the wafer is about 1 cm. At this time, if an inclination angle of several degrees is formed on the entire wafer, a step of about several hundred μm is formed at both ends of the wafer. As described later as the principle of this embodiment, when a polishing is performed after forming a buffer layer of several hundred μm or more, an inclined surface is formed with respect to the interface between the substrate and the buffer layer with an effective wafer size. And an active region can be formed subsequently.

  When selective growth is performed after forming the selective growth film on the substrate or the buffer layer formed on the substrate by changing the coverage rate around the operation region, the thickness on the side with the higher coverage rate is increased. An inclined surface can be formed using this difference. By introducing a periodic structure into the mask, inclined surfaces can be formed periodically throughout the wafer. Further, if the operation region is formed as it is, the operation region can be formed on the inclined surface, and the semiconductor element which is the principle of this embodiment can be realized later. Furthermore, if the selective growth mask is removed after forming the inclined surface, and the layer of the operation region is formed, the selective growth film is removed and the growth rate is substantially uniform, so that a uniform operation region layer with less uneven thickness can be realized. A semiconductor device of the present invention with higher performance can be realized.

  The semiconductor device of the present invention uses a wurtzite structure crystal such as AlN, GaN, or 2H—SiC, and has different plane orientations at an angle of 0.5 ° or more from the (0 0 0 1) plane of GaN, AlN, or 2H—SiC. It may be formed on the substrate. In the case of GaN, the light emission efficiency was drastically improved when the off angle was 0.5 degrees or more. In the case of AlN, the step of the surface observed by AFM is aligned in one direction when the off angle is 0.5 degrees or more. In the case of 2H—SiC, when the off angle is 0.5 ° or more, the shape of the step becomes flat, and when AlGaN-based material is deposited thereon, the flatness can be improved. Further, the operating area of the device is defined as (h m −h−m n) (where one of | h / n | or | m / n | is 3 or more and 1/3 or less, n is not 0, h and m are integers, When h or m is formed on a singular surface or a slightly inclined surface substrate thereof, a large number of steps with the same direction are formed, so that the distance required for the step flow during crystal growth can be reduced. Since the variation can be reduced, the flatness can be improved. In particular, when an SiC crystal is used for the substrate, an angle tilted from the (0 0 0 1) plane is considered as 2H SiC, and tilted in the direction in which the index plane appears, the wurtzite or urzite-like crystal formed thereon Grows on the index plane or an inclined plane inclined to the index plane. In Japanese Patent Application Laid-Open No. 9-180998, when the angle formed by the SiC substrate from the C axis is between 0 ° and 53 ° on 4H or 6H SiC, the thermal expansion coefficient matches with AlGaN formed on the SiC. It is stated that good quality crystals can be obtained. However, even with other crystal structures of SiC, even if the wafer is 4H or 6H and the off angle from the C axis is 53 degrees or more, good quality crystals were obtained if the conditions of the present invention were satisfied.

  Furthermore, in the wurtzite crystal, the direction in which the propagation of the transition is easy is the C-axis direction. Therefore, when the heterojunction is formed, the transition is not perpendicular to the crystal growth. For this reason, the transition is (h m −h−m n) (| n / h | or | n / m | is 3 or more or 1/3 or less, n is not 0, and one of h or m is 0. Not, h, m and n- are integers). That is, when a wurtzite buffer layer is formed on a sapphire substrate and the surface of the GaN buffer layer is tilted from the (0 0 0 1) plane substantially parallel to the sapphire substrate surface by etching, polishing, or selective growth, Is not perpendicular to the growth surface of the buffer layer, the direction of dislocation is easily changed at the upper heterojunction interface of the buffer layer, and the transition is (h m −h−m n) (| n / h | or | n One of / m | is 3 or more or 1/3 or less, n is not 0, one of h or m is not 0, h, m, and n− are integers). For this reason, when an active region is formed on a number of heterojunctions, dislocations deviate from the growth direction, and an active layer can be formed in a low dislocation region, thereby improving device reliability.

  In addition, including the case where the active region is slightly inclined from the singular plane, in the semiconductor element of the present invention, the device is formed on a substantially flat surface of the crystal. For this reason, crystal growth proceeds in a region having a uniform and high-density step with a fixed direction. For this reason, the crystal growth direction proceeds uniformly in one direction, and the In composition, impurity concentration, etc. can be controlled uniformly.

  The thermal conductivity of AlN is about twice that of GaN. For sapphire, there are about 5 times. For this reason, when AlN is used as the substrate, the thermal resistance in the operating region is greatly reduced, and the temperature characteristics can be improved. When SiC is used as the substrate, the thermal conductivity is 1.5 times or more, but the insulating property cannot be maintained because the band gap is smaller than that of GaN. When AlN of 2 μm or more was provided on SiC, the leakage current on the substrate side of AlN / SiC was almost the same as when GaN HEMT was formed on the sapphire substrate. When AlN was provided on GaN with a thickness of 2 μm or more, the leak current on the substrate side of AlN / GaN was lowered and the pinch-off characteristics were improved. This is because both AlN and GaN are nitrides, and high-quality crystals of GaN can be easily obtained. When a traveling layer of GaN, GaInAlN, or SiC having a thickness less than the critical film thickness for AlN on AlN having a thickness of 2 μm or more provided on AlN or SiC, the critical voltage between the gate and drain was almost constant. When the thickness of the traveling layer was set to be equal to or greater than the critical film thickness, the critical voltage rapidly decreased. At this time, when SiC is used as the traveling layer, the critical film thickness is large with respect to AlN and the electron barrier can be made high, so that an element having a large gain can be obtained. Further, by providing AlN or AlGaN having a critical film thickness or less with respect to AlN of the substrate as a gate, high insulation similar to that of the substrate can be ensured.

  According to the present invention, in the hexagonal material, the characteristics of the material of the device formed by the substrate and the epitaxy, in particular, the optical characteristics are excellent by suppressing the entry of crystal defects due to the difference in lattice constant into the device region. Optical semiconductor elements and electronic devices can be obtained.

1 is a schematic cross-sectional view of a semiconductor laser for explaining a principle 1 of an embodiment of the present invention. FIG. 3 is a schematic cross-sectional view of a semiconductor laser for explaining the principle 2 of the embodiment of the present invention. FIG. 5 is a schematic cross-sectional view of a semiconductor laser manufacturing method for explaining the principle 2 of the embodiment of the present invention. FIG. 3 is a schematic cross-sectional view of a semiconductor laser for explaining the principle 3 of the embodiment of the present invention. FIG. 6 is a schematic perspective view and a top view of a semiconductor laser manufacturing method for explaining the principle 3 of the embodiment of the present invention. FIG. 6 is a schematic perspective view and a top view of a semiconductor laser manufacturing method for explaining the principle 3 of the embodiment of the present invention. FIG. 6 is a schematic cross-sectional view of a semiconductor laser for explaining the principle 4 of the embodiment of the present invention. FIG. 6 is a schematic cross-sectional view of a semiconductor laser manufacturing method for explaining the principle 4 of the embodiment of the present invention. FIG. 6 is a schematic cross-sectional view of a semiconductor laser for explaining the principle 5 of the embodiment of the present invention. 1 is a schematic cross-sectional view of an optical semiconductor element according to Embodiment 1 of the present invention. FIG. 3 is a schematic cross-sectional view of a field effect transistor according to a second embodiment of the present invention. FIG. 5 is a schematic cross-sectional view of a field effect transistor according to a third embodiment of the present invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. First, the principle of the device structure in an embodiment of the present invention to be described later will be described.

(Principle 1)
FIG. 1 shows a semiconductor laser according to Principle 1 of the present invention, which is a cross section perpendicular to the light guiding direction with respect to an active layer of an edge-emitting semiconductor laser formed on a sapphire substrate.

  In the figure, (101)-(114) are sapphire substrate (101), GaN low temperature growth buffer layer (102), GaN high temperature growth layer (103), and oblique polished surface (surfaces having a (0 0 0 1) surface, respectively) 104), a GaN buffer layer (105) and an AlGaN cladding layer (106), a GaN light guide layer, a light emitting layer made of MQ1-Ga1-xInxN / Ga1-yInyN, a GaN light guide layer, an AlGaN current blocking layer, a GaN light guide layer Active layer (107), AlGaN cladding layer (108), GaN contact layer (109), mesa structure (110) forming an active region, AlGaN buried layer (111), n-electrode contact surface (112), n An electrode (113) and a p-electrode (114).

This laser was produced by the following process. First, a GaN buffer layer (102) was formed on a sapphire substrate (101) by low temperature growth by MOCVD. At this time, TMG or TEG could be used as a Ga raw material. As the nitrogen source, when ammonia is used, the growth temperature may be between 480-550 ° C., and when monomethylhydrazine or dimethylhydrazine or hydrazine having these methyl groups and ammonia are used. It was good if it was between 350-500 degreeC. When the growth temperature was lowered by using a raw material having a methyl group in hydrazine, the GaN low-temperature growth buffer layer (102) was dense and uneven, and the characteristics of the high-temperature buffer (103) layer could be improved. . The temperature is raised to 1500 ° C., and (103) of the GaN buffer layer is grown by 0.5-2 microns using the thickness of TMG and NH 3, and then the growth rate is increased to about 20 microns, and then (1 −1 0 0 ) Polishing was performed at an angle of 2 degrees to the surface direction to give a polished surface (104). Next, an n-GaN layer (105) and an n-AlGaN layer (106) were grown by MOCVD. A GaN light guide layer, a Ga1-xInxN / Ga1-yInyN MQW light emitting layer, and an active layer (107) made of a GaN light guide layer were grown thereon. Further, a p-AlGaN cladding layer (108) and a p-GaN contact layer (109) were grown. Thereafter, SiO ₂ and a resist were laminated on the p-GaN contact layer (109), and a mask having a stripe structure was formed in the (1 1 −2 0) direction by an ordinary lithography method. Thereafter, using this mask, an n-AlGaN layer (106), a GaN light guide layer, a light emitting layer made of MQ1-Ga1-xInxN / Ga1-yInyN, an active layer (107) made of a GaN light guide layer, p-AlGaN The clad layer (108), the clad layer (108), and the p-GaN contact layer (109) were etched into the mesa structure (110) by ECR or ICP etching. At this time, the width of the mesa in the active layer (107) portion was 1 μm, which was slightly narrower than the upper and lower layers. This is important for current confinement. Thereafter, both sides thereof were embedded with p-AlGaN (111). Thereafter, the p-AlGaN (111) was left about 100-200 μm in width and the outside was etched, and the n-AlGaN layer (106) was etched halfway. Here, a selective growth mask may be formed on the surface of the n-AlGaN layer (106), and p-AlGaN (111) may be selectively grown with the same width to leave the surface of the n-AlGaN layer (106). Thereafter, the n-AlGaN layer (106) was etched by ECR etching to expose the surface (112) of the n-GaN (105). At this time, the end point of etching was detected when the Al composition suddenly decreased during etching. Thereafter, an n-electrode (113) was formed on the n-electrode contact surface (112), and a p-electrode (114) was formed on the top of the mesa structure to form a laser structure.

  At this time, the heterojunction interface formed by the n-AlGaN layer (106), the active layer (107), and the p-AlGaN cladding layer (108) has a refractive index difference between the sapphire substrate (101) and the GaN low-temperature growth buffer layer (102). It has a slope of 2 degrees with respect to the large heterojunction interface. Further, the refractive index difference between the heterojunction interface formed by the n-AlGaN layer (106), the active layer (107), and the p-AlGaN cladding layer (108), the sapphire substrate (101) and the GaN low-temperature growth buffer layer (102), and GaN. The distance from the heterojunction interface having a large refractive index difference formed by the low temperature growth buffer layer (102) is 20 μm or more. Further, the width of the active layer (107) is as narrow as about 1.2 μm. Therefore, even if the light from the active layer (107) is reflected at the heterojunction interface between the sapphire substrate (101) and the GaN low-temperature growth buffer layer (102), it does not return directly to the active layer, and the laser mode is affected. I did not receive it.

  Further, when the GaN buffer layer (103) was grown to form the polished surface (104), the following method was also used. CH2Cl2, GaCl3, GaCl5, or HCl was added to the raw material to grow a GaN layer (103) of about 300 μm at a growth rate of 60 μm / h. Thereafter, the surface was tilted by 3 degrees in the (1 −1 0 0) plane direction of GaN, and this surface was polished to form a polished surface. At this time, a mirror surface with little damage could be obtained by mechanochemical etching in a phosphoric acid etchant. In this case, since the GaN layer (103) can be polished close to 300 μm, an inclination of 3 degrees can be formed on the entire wafer having a width of 1 cm.

(Principle 2)
FIG. 2 shows an edge-emitting semiconductor device according to Principle 2 of the present invention, which is a cross section perpendicular to the light guiding direction of the active layer of a ridge-type edge-emitting semiconductor device formed on a sapphire substrate.

  (201)-(216) in the figure are formed by etching, a sapphire substrate (201) whose surface is a (0 0 0 1) plane, a GaN low temperature growth buffer layer (202), a GaN high temperature growth layer (203), respectively. Slope (204), n-GaN buffer layer (205), n-AlGaN n-cladding layer (206), GaN light guide layer, Ga1-xInxN / Ga1-yInyN MQW light emitting layer, GaN light guide layer, and AlGaN current blocking layer Active layer (207), p-AlGaN cladding layer (208), p-GaN contact layer (209), current confinement mesa structure (210), passivation film (211), p-electrode (212) ), N electrode (213), eaves (214) formed during etching, etched surface (215) when eaves formed during etching are removed A mesa structure for device isolation (216).

  FIG. 3 is an optical semiconductor device manufacturing process diagram of Principle 2 of FIG. 2, and the manufacturing method will be described below with reference to FIG.

  First, a GaN buffer layer (202) was formed on a sapphire substrate (201) by low temperature growth by MOCVD. Next, the temperature was raised to 1050 ° C., and a GaN buffer layer (203) was grown by 8 μm using TMG and NH. Next, a selective etching mask (301) was formed with a width of 250 μm and an interval of 50 μm (FIG. 3a). Next, selective etching was performed with high energy by the ICP or ECR method to form an etched surface (204) and eaves (214) (FIG. 3b). At this time, the angle of the beam with respect to the crystal surface can be arbitrarily selected. However, in the semiconductor laser according to the principle 2, a stripe of the selective etching mask (301) is provided in the (1 -1 0 0) direction, and this vertical The etching beam was incident from the direction, and the substrate surface was tilted by about 19.5 degrees from the (0 0 0 1) plane to the (1 1 -2 0) plane. At this time, even if the incident direction of the beam is inclined in the stripe direction, if the vertical component of the beam stripe satisfies this condition, substantially the same etching can be performed, and there is a smoother etching with the component in the stripe direction. I can do it. By the above method, a predetermined (204) slope is formed in the space portion of the selective etching mask (301). In order to make the inclination of the slope uniform, the width of the space portion of the selective growth mask needs to be approximately 10 microns or more. On the other hand, when the etching reaches the sapphire substrate, the growth at a later stage tends to be non-uniform. For this reason, it is desirable that the thickness of the GaN buffer layer (203) is thicker than the etching depth. By the way, the GaN buffer layer is desirably about 10 μm or less (an order of magnitude). For this reason, the width of the space portion of the mask is desirably 1 mm or less. However, this limit is loose for the maximum value. When etching is performed, etching is performed up to the bottom of the selective etching mask (301), but this width substantially matches the width of the inclined surface (204). For this reason, the width of the selective etching mask (301) is necessarily wider than the width of the space. After forming the inclined surface (204), a GaN buffer layer (205) and an AlGaN cladding layer (206), a GaN light guide layer, a Ga1-xInxN / Ga1-yInyN MQW light emitting layer, a GaN light guide layer, and an AlGaN current block are formed by MOCVD. An active layer (207) composed of a GaN light guide layer, an AlGaN cladding layer (208), and a GaN contact layer (209) were sequentially formed (FIG. 3c). Next, an AlGaN cladding layer (206), a GaN light guide layer, a Ga1-xInxN / Ga1-yInyN MQW light-emitting layer, and a GaN light guide layer are formed by lithography, except for a portion with few crystal defects formed on the inclined surface (204). The active layer (207) composed of the AlGaN current blocking layer and the GaN light guide layer, the AlGaN cladding layer (208), the GaN contact layer (209), and the GaN buffer layer (205) were partially removed. Further, a part of the GaN contact layer (209) and the AlGaN cladding layer (208) is left on the inclined surface (204) by a normal patterning method so as to leave a stripe structure (210) having a width of 2 μm in the direction perpendicular to the inclined direction. Was removed by etching (FIG. 3d). Thereafter, an insulating film (211), a p-electrode (212), and an n-electrode (113) were formed (FIG. 3e).

  In the ridge structure laser such as the semiconductor laser according to the principle 2, the current spread in the active layer (207) is larger than the stripe structure (210) for current confinement, and the light emitting region is expanded by several μm. However, in Principle 2, the interface formed by the substrate (201) and the GaN buffer layer (202), the n-AlGaN layer (106) and the GaN light guide layer, a light emitting layer composed of MQW of Ga1-xInxN / Ga1-yInyN, The interface formed by the three layers of the active layer (107) made of the GaN light guide layer and the p-AlGaN cladding layer (108) has an inclination of about 20 degrees, and the GaN buffer layer (203) is 8 μm thick. For this reason, the reflected light at the interface between the substrate (201) and the GaN buffer layer (202) is reflected at a position shifted by 6 μm or more from the light emitting region, so that it does not return to the active layer light emitting region, and the optical disturbance It did not cause.

  In the case of the principle 2 laser, the light output was more than twice that of a laser having a similar structure grown on the (0 0 0 1) plane. This is because the inclination of the inclined surface is approximately 20 degrees from the (0 0 0 1) plane, and is approximately coincident with the (1 1 4) plane, so when Mg is doped into the AlGaN cladding layer (208), saturated Mg This is because both the concentration and the saturation carrier concentration are increased by about 40% compared to the (0 0 1) plane.

  Of the principle 2, those formed as shown in FIG. 2 (b) were able to increase the yield. This is because the unevenness is small compared to the case of FIG. 2A, and it is easy to grow uniformly when growing the layer of (205)-(209), and the eaves remaining after etching (214) This is due to the fact that there is little breakage during the process.

(Principle 3)
FIG. 4 is an end surface light emitting semiconductor device according to Principle 3 of the present invention, and is a cross section perpendicular to the light guiding direction of the active layer of a buried type end surface light emitting semiconductor device formed on a sapphire substrate.

  (401)-(412) in the figure are sapphire substrates (401) whose surfaces are (0 0 0 1) planes, a first buffer layer (402) comprising a GaN low temperature growth buffer layer and a high temperature buffer layer, and selective growth. N-GaN second buffer layer (403), n-AlGaN cladding (404), GaN light guide layer, Ga1-xInxN / Ga1-yInyN MQW light emitting layer, GaN light guide layer, and AlGaN current blocking layer Active layer (405) made of GaN light guide layer, p-AlGaN cladding layer (406), p-GaN contact layer (407), current confinement mesa structure (408), AlGaN buried layer (409), etching surface (410 ), N electrode (411), and p electrode (412).

  5 and 6 are optical semiconductor element production process diagrams according to Principle 3 of FIG. 4, and the production method will be described below with reference to FIGS.

First, a GaN first buffer layer (402) grown at 45 nm at 480 ° C. and 6 μm at 1080 ° C. was formed on a sapphire substrate (401). Next, a 10 μm SiO ₂ mask (501), a 30 μm space, a 200 μm mask (502), and a 50 μm space total 300 μm pattern were repeatedly formed from the left. Thereafter, a GaN second buffer layer (403), an AlGaN cladding (404), a GaN light guide layer, a Ga1-xInxN / Ga1-yInyN MQW light-emitting layer, a GaN light guide layer, an AlGaN current blocking layer, and a GaN light guide layer are formed. An active layer (405), an AlGaN cladding layer (406), and a GaN contact layer (407) were selectively grown. FIG. 5A is a bird's eye view of selective growth, and FIG. 5B is a top view of the selective growth mask pattern. Next, SiO ₂ (506) was patterned to a width of 1.5 μm, and a current confinement mesa structure (408) was formed using this SiO ₂ (506) as a mask (FIG. 6A). Next, the mesa structure (408) was buried with an AlGaN buried layer (409) (FIG. 6B). Thereafter, the AlGaN buried layer (409) and a part of the GaN second buffer layer (403) were partially etched to form an n-electrode (411) on the GaN second buffer layer (405). Further, after removing SiO ₂ (506), a p-electrode (412) was formed (FIG. 6C).

(Principle 4)
FIG. 7 shows an optical semiconductor device according to Principle 4 of the present invention, in which the waveguide direction formed on the SiC substrate is inclined with respect to the substrate.

  (701)-(713) in the figure are the p-SiC substrate (701), p-GaN buffer layer (702), p-GaN layer, and p-GaAlN layer each having a (0 0 0 1) surface. A clad layer (703), an GaN light guide layer, an AlGaN current blocking layer, a GaN light guide layer, a Ga1-xInxN / Ga1-yInyN MQW light emitting layer, and an active layer (704) comprising a GaN light guide layer, an active layer (704) ), A n-AlGaN cladding layer (706), an n-GaN contact layer (707), an n-electrode (708), a p-electrode (709), a resonator These are end surfaces (710) and (711), an AR coat film (712), and an HR coat film (713).

  FIG. 8 is an optical semiconductor device production process diagram according to Principle 4 of FIG. 7, and the production method will be described below with reference to FIG.

First, a GaN buffer layer (702) was formed on the SiC substrate (701) by MOCVD. Next, as shown in FIG. 8A, a SiO ₂ selective growth mask (801) having a repeated pattern of thick and narrow gaps was formed. Here, the narrow gap portion was 50 μm, the thick portion was 300 μm, and the width of the entire mask was 600 μm. The repetition pitch between the thick part and the narrow part was 1 mm. Next, a cladding layer (703) made of a GaN layer and a GaAlN layer, a GaN light guide layer, an AlGaN current blocking layer, a GaN light guide layer, a Ga1-xInxN / Ga1-yInyN MQW light emitting layer, and an active layer made of a GaN light guide layer (704) was selectively formed by MOCVD, and a diffraction grating (705) was formed on the GaN light guide layer in the active layer (704). A cross section AB in the stripe direction at this time is shown in FIG. The growth rate was slow in the wide part of the mask gap and fast in the narrow part. Next, an AlGaN clad layer (706) and a GaN contact layer (707) were grown by MOCVD (FIG. 8C). Thereafter, the width of 1 μm is left, the GaN contact layer (707), the AlGaN cladding layer (706), the GaN light guide layer, the AlGaN current blocking layer, the GaN light guide layer, the Ga1-xInxN / Ga1-yInyN MQW light-emitting layer, and the GaN light. The mesa structure (802) was formed by etching to the middle of the GaN layer of the active layer (704) made of the guide layer and the clad layer (703) made of the GaN layer and the GaAlN layer. Thereafter, both sides of the mesa were embedded with an AlGaN layer (803). After forming an n-electrode (708) and a p-electrode (709), the flat portion (804) was removed by etching, and chip end faces (710) and (711) were formed at the same time. Thereafter, the wafer was formed into a bar shape and an AR film (712) was formed from SiN. After that, a passivation film of SiN was formed on the end face (711), and an HR coating film (713) of hafnium oxide and SiO ₂ was formed.

  In the laser according to the principle 4, since the interface between the substrate (701) and the GaN- (702) and the interface around the active layer (704) are inclined in the longitudinal direction of the resonator, the substrate (701) and the GaN- (702) The light reflected at the interface formed by the light is concentrated on the end surface (710) side on which the AR coating film (712) is formed. For this reason, the output of the laser was able to be taken out efficiently. In addition, since the laser according to the principle 4 uses p-type SiC as the substrate, the electrode resistance can be reduced. Moreover, since p-AlGaN can be formed before forming the active layer, diffusion into the active layer could be suppressed even when Mg was added at a higher concentration than when the p-side was formed on the active layer. . In addition, since the crystal axis and the mesa direction are almost parallel when forming the mesa, a mesa structure with good objectivity can be formed, and the threshold value can be lowered because there is little light leakage.

  In the laser according to the principle 4, a diffraction grating is manufactured. In particular, the threshold value can be lowered particularly when the wavelength of the resonator determined by the diffraction grating is set to a wavelength longer by several tens of meV than the peak wavelength of light emission of the active layer. It was. This is because the active layer is tilted from the singular plane of the crystal, so that the portion with a high In composition is regularly formed in the active layer, and an energy region with high carrier injection efficiency is formed on the longer wavelength side than the emission peak. It is because it has been.

  In the laser according to Principle 4, a diffraction grating is manufactured and AR and HR coatings are applied to the end face. However, if the end face is etched or polished so that the end face is perpendicular to the direction of the resonator, there is no such end face treatment. Both can be laser-oscillated.

(Principle 5)
FIG. 9 shows a light-emitting element according to Principle 5 of the present invention, which is an embedded light-emitting element formed on a sapphire substrate.

  In the figure, (901)-(920) are a sapphire substrate (901), a GaN low temperature buffer layer (902), a GaN high temperature buffer layer (903), a GaN second buffer layer (904), an MQW buffer layer made of AlGaN and GaInN ( 905), n-GaN third buffer layer (906), n-GaInN layer (907), n-GaN layer (908), n-GaAlN intermediate composition layer (909), n-GaAlN cladding layer (910), GaN An active layer (911) comprising a light guide layer, a GaInN / GaInN MQW light emitting layer, a GaInN light guide layer, a GaN light guide layer and an AlGaN light guide layer, a p-GaN etch stop layer (912), a p-GaAlN cladding layer ( 915), p-AlGaN intermediate composition layer (916), p-GaN contact layer (917), passivation film (918), n-electrode (919) p electrode (920), p-AlGaN buried layer (913) consists of n-GaAlN buried layer (914).

  In the light emitting device according to the fifth principle, a GaN low temperature buffer layer (902) having a thickness of 50 nm and a GaN high temperature buffer layer (903) having a thickness of 300 μm are formed on a sapphire substrate (901), and then a GaN high temperature buffer layer (903). Was polished at an angle of 2 degrees in the (1 -1 0 0) direction. Thereafter, a GaN second buffer layer (904), an MQW buffer layer (905) made of AlGaN and GaInN, a GaN third buffer layer (906), a GaInN layer (907), a GaN layer (908), and a GaAlN intermediate composition layer (909) , GaAlN cladding layer (910), GaN light guide layer, GaInN / GaInN MQW light emitting layer, GaInN light guide layer, GaN light guide layer, active layer (911) made of AlGaN light guide layer, GaN etch stop layer (912) A GaInN dummy layer was formed. A SiN selective growth mask is formed thereon with a width of 1.5 μm so that the waveguide direction is inclined with respect to the substrate, a part of the GaAlN cladding layer (910), a GaN light guide layer, and a GaInN / GaInN MQW. The mesa structure was formed by etching the light emitting layer, the GaInN light guide layer, the GaN light guide layer, and the active layer (911) composed of the AlGaN light guide layer, the GaN etch stop layer (912), and the GaInN dummy layer. Thereafter, a p-AlGaN buried layer (913) and an n-GaAlN buried layer (914) were formed. After removing the SiN film, the GaInN dummy layer was removed by phosphoric acid-based etchant or dry etching. Thereafter, a GaAlN cladding layer (915), an AlGaN intermediate composition layer (916), and a GaN contact layer (917) were formed by MOCVD. Thereafter, a part of the GaN layer (908), GaAlN intermediate composition layer (909), GaAlN cladding layer (910), GaAlN cladding layer (915), AlGaN intermediate composition layer (916), and GaN contact layer (917) are etched. Thus, the surface of the GaN layer (908) was exposed. Thereafter, a passivation film (918) was formed, and an n-electrode (919) and a p-electrode (920) were formed.

  In the semiconductor laser according to the principle 5, since the substrate is polished, in addition to the effect of suppressing the reflection of light, the inclination of the wafer is uniform, the composition of In in the active layer, and the Mg concentration in the p-cladding layer are particularly It was possible to make it uniform and to lower the laser threshold. Also, since MQW was provided between the substrate and the active layer, the transition ran parallel to the MQW, and the transition density was almost two orders of magnitude above and below the MQW. Furthermore, since the GaInN layer (907) is provided, it is possible to absorb the strain accompanying the difference in lattice constant between the upper part and the lower part, and to prevent the generation of transition on the active layer side by generating defects inside. It was. This effect occurs in the same way on the (0 0 0 1) plane, but in the case of the present invention, since it is inclined from the (0 0 0 1) plane, the transition does not grow in GaInN, and a large transition to the active layer side occurs. Less propagated as a net. For this reason, in the semiconductor laser according to Principle 5, even when AlGaN having a lattice constant that is significantly different from that of GaN provided on the substrate side is used for the buried layer, the occurrence of dislocation between the substrate and the buried layer is suppressed, and the buried laser The original performance could be demonstrated, and the threshold value could be reduced to a fraction of that of the ridge type laser. Further, in the semiconductor laser according to Principle 5, in order to reduce the electrode resistance, an AlGaN intermediate composition layer (916) having an intermediate Al composition is provided between the GaN contact layer (917) and the AlGaN cladding layer (915). This heterointerface also has the effect of preventing Mg diffusion. In the case of Principle 5, it is easy to increase the Mg doping concentration and the p-type carrier concentration, but for this reason, impurity diffusion may occur suddenly. By introducing the AlGaN intermediate composition layer (916), this influence can be reduced and the yield can be increased.

  The principle of the device structure according to the embodiment of the present invention has been described above. Next, embodiments of the present invention will be described based on the above-described principles.

(Embodiment 1)
FIG. 10 is a schematic explanatory diagram relating to the semiconductor optical device according to the first embodiment of the present invention.

  The SiC substrate (1101) is a substrate tilted by about 80 degrees in the (1 1 -2 0) direction from the (0 0 0 1) plane of p-type 6H—SiC, and (1102)-(1112) are p-GaN. Buffer layer (1102), p-AlGaN / GaN superlattice buffer layer (1103), p-GaN buffer layer (1104), p-GaInN buffer layer (1105), p-GaN contact layer (1106), p-AlGaN cladding Layer (1107), GaN / GaInN quantum well light emitting layer (1108), n-AlGaN cladding layer (1109), n-GaN contact layer (1110), insulating film (1111), n-electrode (1112), p-electrode (1113).

  In the case of the present embodiment, the grown GaN or the like grew on the (4 4-8 1) plane. Since the SiC substrate (1101) inclined by about 80 in the (1 1 -2 0) direction from the (0 0 0 1) plane was used, in terms of 2H SiC, a plane substantially coincident with the (4 4-8 1) plane Is out. The difference in lattice constant between SiC and GaN is small because a surface similar to the substrate was formed when GaN (1102) was grown. Since SiC was used for the substrate, the thermal conductivity was high and the temperature characteristics could be improved. In particular, the electrode resistance could be lowered by using a SiC substrate (1101) that tends to be p-type. Also, the plane orientation of the substrate (1101) is (4 4-8 1), and the dislocation in the active layer has a higher efficiency of changing the direction along the superlattice than in the case of (1 1 -2 4). The density could be lowered. In addition, the process was easy because the electrode could be taken from the back side of the substrate.

  Although 6-H SiC is used in the present embodiment, it goes without saying that SiC such as 4-H, 2-H, 15R, and 3C may be used. In this embodiment, SiC is used for the substrate, but when GaN of (44-81) is used for the substrate, a good crystal can be formed with nitride all the way to the light emitting region, and an element with high luminous efficiency was obtained. . Further, GaN has a wurtzite structure, and the crystal lattice completely coincides with the layer where the crystal lattice is epitaxy on the substrate with respect to the (4 4-8 1) plane crystal. Further, in the present embodiment, although tilted by about 80 degrees from the (0 0 0 1) plane, (h m −h−m n) (| n / h | or | n / m | converted to 2-H SiC. The present invention can be applied in any direction by using SiC having a surface orientation on which indexing is performed, i.e., one is 3 or more or 1/3 or less, and n is not 0). In the present embodiment, a p-type substrate is used, but it goes without saying that an n-type substrate may be used to pass current in the opposite direction.

(Embodiment 2)
FIG. 11 is a schematic explanatory diagram relating to the field effect transistor according to the second embodiment of the present invention.

  In the figure, (1201)-(1210) are formed by AlN substrate (1201), GaN electron transit layer (1202), 0.1 μm wide AlN gate layer (1203), GaN contact layer (1204), and Si ion implantation, respectively. High-concentration n-type source region (1205), high-concentration n-type drain region (1206) formed by ion implantation, insulating film (1207), source electrode (1208), gate electrode (1209), drain electrode (1210).

The GaN electron transit layer (1202) in this example has a lattice strain of about 2% with AlN. For this reason, the critical film thickness of GaN is 2 to 3 nm. Even in this embodiment, if the thickness is not less than this, a sudden increase in leakage current was recognized. In the case of GaN and AlN, the direction of the smallest electron barrier difference is about 1.5 times that of GaAs and AlAs. For this reason, the density of the two-dimensional electron gas can be increased by several orders of magnitude. The thickness of the GaN electron transit layer (1202) of this embodiment is about an order of magnitude smaller than that of a normal HEMT, but since the two-dimensional electron gas density that can be accumulated is high, the total sheet density is 10 ¹³ cm ⁻² or more. A high value was obtained. Moreover, since the thickness of the GaN traveling layer (1202) is thin and the breakdown voltage of AlN is high, the thickness of the AlN gate layer (1203) can be reduced to several tens of nanometers, and a large gain can be obtained. . In addition, the critical voltage of AlN and GaN was high, and ft was 50 GHz and high-speed operation was possible. Compared to the case where it is formed on a sapphire substrate, the dielectric constant of AlN is large, and since the GaN is thinner than the critical film thickness, the electric field spreads greatly and the gate drain is compared with the case where it is formed on the sapphire substrate with the same dimension. The voltage in between could be applied 30% or more. In addition, since the thermal conductivity of AlN is high, a field effect device having substantially the same structure as that of the case where a sapphire substrate is used was able to obtain operating power three times or more. When a part of the gate (1203) was doped with Si, the density of the two-dimensional electron gas could be increased.

(Embodiment 3)
FIG. 12 is a schematic explanatory diagram relating to the field effect transistor according to the third embodiment of the present invention.

  In the figure, (1301)-(1312) are a substrate (1301) inclined by about 10 degrees in the (1 1-2 0) direction from the SiC (0 0 0 1) plane, an AlGaN / GaN superlattice buffer (1302), AlN buffer layer (1303), GaN electron transit layer (1304), GaInN drain contact layer (1305) doped with high-concentration n-type impurities, GaInN source contact layer (1306) doped with high-concentration n-type impurities, AlN A gate layer (1307), a GaInN gate control layer (1308), an insulating film (1309), a drain electrode (1310), a gate electrode (1311), and a source electrode (1312).

In this embodiment (1 1 -2 -8) plane of GaN, AlN, since AlGaN is formed, the n- type impurity is apt captured, the p-type impurity of incoming difficult especially 2-dimensional electron gas It was able to increase the mobilities easily. In addition, since the SiC substrate was used, the thermal conductivity was high and the temperature rise was small, so that the density of the elements could be easily increased and the power of the element could be increased. Further, when the thickness of the AlN buffer layer (1303) was 2 μm or more, the leakage current between the gate and the drain and the crosstalk between the elements were not significantly different from those formed on the AlN substrate. In this embodiment, GaN is used for the electron transit layer, but SiC may also be used. In this case, since the lattice constant difference from AlN is small, the thickness of the electron transit layer can be increased to about 10-15 nm. In addition, since the hetero barrier with AlN is also increased, the density of the two-dimensional electron gas was as high as 10 ¹⁴ cm ⁻² .

  Although various embodiments of the present invention have been described above, the substrate of AlN, GaN, or SiC may be a bulk crystal or a substrate that has been deposited on another substrate and then separated from the other substrate. In addition, an element formed on the substrate having a sufficient thickness may be formed on another substrate as long as it shows a bulk property. In this case, the thickness is several tens of μm or more. Further, the substrate may be AlxGayIn1-xyN (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ 1-xy ≦ 1). In this case, the lattice constant may be any value between AlN, GaN, and InN. Since it can be set to a value, distortion applied to the device can be reduced. Also, it is possible to improve device characteristics such as reducing contact resistance electrically.

  The off direction of the substrate is not fixed to a specific crystal axis with respect to the off direction as well as the off angle from a specific singular plane, and may be various directions or directions slightly deviated from the crystal axis. Needless to say.

101, 201, 401, 901 ... sapphire substrates 102, 202, 902 ... GaN low temperature growth buffer layers 103, 203, 903 ... GaN high temperature growth layers 104, 204 ... slant polishing surfaces 105, 205 .. n-GaN buffer layers 106, 206, 404, 706, 910... N-AlGaN cladding layers 107, 207, 405, 704, 911... Active layers 108, 208, 406, 915. AlGaN cladding layers 109, 209, 407, 917... P-GaN contact layers 110... Mesa structures 111, 409... AlGaN buried layers 112. 411, 708, 919... N electrode 114, 212, 412, 709, 920... P electrode 2 0, 408 ... current confinement mesa structure 211, 918 ... passivation film 214 ... eaves 215, 410 ... etching surface 216 ... mesa structure 301 for element isolation ... etching mask 402 ... First buffer layer 403 ... n-GaN second buffer layer 501, 502, 506, 801 ... SiO ₂ mask 701 ... p-SiC substrate whose surface is a (0 0 0 1) plane 702... P-GaN buffer layer 703... Cladding layer 705 consisting of p-GaN layer and p-GaAlN layer... Diffraction grating 706... N-GaN contact layers 710 and 711. End surface 712... AR coating film 713... HR coating film 802... Mesa structure 803... AlGaN layer 804. Layer 905 ... MQW buffer layer 906 ... n-GaN third buffer layer 907 ... n-GaInN layer 913 ... p-AlGaN buried layer 914 ... n-GaAlN buried layer 908 ... n-GaN layer 909 ... n-GaAlN intermediate composition layer 912 ... p-GaN etch stop layer 916 ... p-GaAlN intermediate composition layer 1101 ... SiC substrate 1102 ... p-GaN buffer layer 1103 ... p-AlGaN / GaN superlattice buffer layer 1104 ... p-GaN buffer layer 1105 ... p-GaInN buffer layer 1106 ... p-GaN contact layer 1107 ... p-AlGaN cladding layer 1108 ..GaN / GaInN quantum well light emitting layer 1109... N-AlGaN cladding layer 1110... N-G N contact layer 1111 ... insulating film 1112 ... n-electrode 1113 ... p-electrode 1201 ... AlN substrate 1202, 1304 ... GaN electron transit layer 1203, 1307 ... AlN gate layer 1204 GaN contact layer 1205... N-source region 1206... N-drain region 1207 and 1309... Insulating films 1208 and 1312... Source electrodes 1209 and 1311. Drain electrode 1301 ... SiC substrate 1302 ... AlGaN / GaN superlattice buffer 1303 ... AlN buffer layer 1305 ... n-GaInN drain contact layer 1306 ... n-GaInN source contact layer 1308 GaInN gate control layer

Claims (5)

AlxGayIn1-xyN (0 ≦ x <1, 0 ≦ y ≦ 1, 0 ≦ 1-xy ≦ 1) provided on the AlN crystal and having a thickness that is at least a critical thickness with respect to the AlN crystal . An electron transit layer made of either a crystal or a SiC crystal having a thickness equal to or less than a critical film thickness with respect to the AlN crystal ,
A layer containing Al and N provided on the electron transit layer;
Comprising
A semiconductor device comprising a field effect transistor having a gate electrode on the opposite side of the electron transit layer across the layer containing Al and N. 2. The semiconductor element according to claim 1, wherein the layer containing Al and N provided on the electron transit layer is made of AlzGa1-zN (0 <z ≦ 1). The semiconductor element according to claim 1, wherein the layer containing Al and N provided on the electron transit layer is insulative. 4. The semiconductor device according to claim 1, further comprising a source region and a drain region provided so as to be joined to the electron transit layer.   A contact layer provided on the layer containing Al and N provided on the electron transit layer;
  The semiconductor element according to claim 1, wherein the gate electrode is provided so as to be in contact with the contact layer.

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