JP2006120855A - Group iii-v nitride semiconductor epitaxial wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a group III-V nitride semiconductor epitaxial wafer that comprises a buffer layer which suppresses occurrence and propagation of threading dislocation caused by defects of an SiC substrate. <P>SOLUTION: In the group III-V nitride semiconductor epitaxial wafer, an AlN buffer layer 2 is formed on an SiC substrate 1, and a group III-V nitride semiconductor crystal is formed on the AlN buffer layer 2. In the AlN buffer layer 2, group IV element is uniformly doped at concentration of 1×10<SP>19</SP>cm<SP>-3</SP>or higher. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a group III-V nitride semiconductor epitaxial wafer in which an aluminum nitride (AlN) buffer layer (a buffer layer made of AlN) is formed on a silicon carbide (SiC) substrate, and in particular, a high-quality III on a SiC substrate. A group III-V nitride semiconductor epitaxial wafer capable of growing a group V nitride semiconductor crystal and producing a nitride semiconductor device having better characteristics than conventional products (group III-V nitride semiconductor is an epitaxial method) The wafer is grown by the following method.

  An epitaxial wafer having a group III-V nitride semiconductor multilayer structure in which gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), and a mixed crystal thereof are laminated and grown in an optimum structure has already emitted blue light. It is on the market as an epitaxial wafer for diode (LED), and further, an epitaxial wafer for blue laser diode (LD) and an epitaxial wafer for ultraviolet LED are being developed. Further, III-V nitride semiconductor crystals are used not only for optical devices but also for epitaxial wafers for field effect transistors (FETs) such as GaN-high electron mobility transistors (HEMT) in response to the recent demand for high-power transistors. Development has also been made.

  As substrates used for these epitaxial wafers for optical / electronic devices, there are only sapphire substrates and SiC substrates that are in practical use and are on the market. Although the SiC substrate is inferior in terms of cost and manufacturing technology as compared with the sapphire substrate, there is an advantage that the thermal conductivity is remarkably high, and furthermore, it can have conductivity. Therefore, the current situation is that they are properly used according to the application of the device.

  When forming a group III-V nitride semiconductor crystal on these substrates, two types of crystal growth methods, ie, metal organic vapor phase epitaxy (MOVPE) and molecular beam epitaxy (MBE) are used. However, at present, the crystal growth method mainly used at the industrial level is the MOVPE method. This is because, unlike the MBE method, the MOVPE method does not require a high vacuum and can be easily grown on a large number of substrates at a time. The MOVPE method is performed by sending a plurality of source gases to a substrate heated in the reactor and thermally decomposing these source gases on the substrate.

  When a group III-V nitride semiconductor crystal is grown on a SiC substrate by the MOVPE method, the growth is performed on the (0001) plane of a hexagonal SiC crystal. However, even if a GaN crystal or an indium gallium nitride (InGaN) crystal, which is a III-V nitride semiconductor crystal, is grown directly on the substrate, it does not become a flat film due to poor wettability, but is formed in a hexagonal column shape. Is formed (three-dimensional nuclear growth). However, since AlN with good wettability is formed as a film (two-dimensional nucleus growth), normally, a III-V nitride semiconductor mixed crystal containing AlN or aluminum (Al) is used as a buffer layer on the SiC substrate. After the growth, a method of growing GaN, InGaN or the like as a required group III-V nitride semiconductor crystal on the buffer layer is employed.

In addition, when forming a group III-V nitride semiconductor crystal on a SiC substrate, as a device for obtaining a crystal having excellent planar flatness and electrical characteristics, (1) the thickness of the AlN thin film constituting the buffer layer is critical. A method in which a film thickness (4.6 nm) or less is set to be pseudomorphic to the SiC substrate so that misfit dislocations and threading dislocations caused thereby are not generated in the AlN thin film (for example, see Patent Document 1) And (2) a method of growing a nitride III-V compound semiconductor material on a SiC substrate having a C-plane surface (see, for example, Patent Document 2). In this Patent Document 2, first, thermal oxidation and removal of the oxide film are repeated several times to completely remove the polishing scratches on the SiC substrate, and an AlN buffer layer is grown on the C-plane SiC substrate at 1100 ° C. A first GaN layer, an aluminum gallium nitride (AlGaN) layer, and a second GaN layer are grown on the buffer layer at 1000 ° C.
JP-A-9-219540 JP 2003-17419 A

  However, the quality of the SiC substrate is still developing, and there is much room for improvement. In particular, there are many polishing flaws and crystal defects on the surface of the substrate, and it is difficult to say that it is strictly flat compared to a silicon (Si) substrate or a gallium arsenide (GaAs) substrate. For this reason, crystal defects on the substrate surface are caused, and threading dislocations are generated in the buffer layer and propagated to the nitride crystal thereon.

  Such threading dislocations shorten the lifetime of optical devices such as laser diodes (LDs) and light emitting diodes (LEDs), and in electronic devices such as high electron mobility transistors (HEMTs) and heterojunction bipolar transistors (HBTs) In order to greatly reduce the pressure resistance, it must be suppressed as much as possible.

  With the current SiC substrate manufacturing technology, it is impossible to completely suppress defects present in the substrate. Therefore, in order to stack a high-quality group III-V nitride semiconductor thin film crystal on the SiC substrate, the generation and propagation of threading dislocations in the buffer layer must be stopped.

  Accordingly, an object of the present invention is to provide a group III-V nitride semiconductor epitaxial wafer having a buffer layer that solves the above problems and suppresses the generation and propagation of threading dislocations due to defects in the SiC substrate. In other words, the present invention provides a buffer layer for preventing the occurrence of threading dislocations due to defects in the SiC substrate and suppressing propagation without requiring a complicated process, and can reduce the manufacturing cost without increasing the cost. The purpose is to realize the growth of dislocation III-V nitride semiconductor crystals.

  In order to achieve the above object, the present invention is configured as follows.

The group III-V nitride semiconductor epitaxial wafer according to the invention of claim 1 is a group III-V in which an AlN buffer layer is formed on a SiC substrate and a group III-V nitride semiconductor crystal is formed on the AlN buffer layer. The nitride semiconductor epitaxial wafer is characterized in that a group IV element is uniformly doped in the AlN buffer layer at a concentration of 1 × 10 ¹⁹ cm ⁻³ or more in the AlN buffer layer.

  The invention according to claim 2 is the group III-V nitride semiconductor epitaxial wafer according to claim 1, wherein the group IV element to be added is silicon (Si) or germanium (Ge).

  A third aspect of the present invention is the III-V nitride semiconductor epitaxial wafer according to the second aspect, wherein the thickness of the AlN buffer layer is 20 nm or more.

  A fourth aspect of the present invention is the III-V nitride semiconductor epitaxial wafer according to the third aspect, wherein the AlN buffer layer is grown by a MOVPE method.

  According to a fifth aspect of the present invention, in the III-V nitride semiconductor epitaxial wafer according to the fourth aspect, a temperature during the growth of the AlN buffer layer is set to 1000 ° C. or higher.

  A sixth aspect of the present invention is the III-V nitride semiconductor epitaxial wafer according to the fifth aspect, characterized in that a growth pressure during the growth of the AlN buffer layer is 200 Torr or less.

<Key points of the invention>
When the AlN buffer layer is grown on the SiC substrate, these group IV elements are always present on the surface of the growing AlN crystal by simultaneously supplying the silicon raw material or the germanium raw material. These group IV elements are covalent and strong, and also function as anti-surfactants on the crystal surface. Therefore, propagation of threading dislocations to the surface of the AlN buffer layer can be significantly reduced by selecting the optimum conditions.

  In detail, in the early stage of growth of the AlN buffer layer directly on the SiC substrate, the AlN reactive species supplied from the vapor phase diffuses on the surface of the SiC substrate for a certain period of time and eventually settles as a crystal nucleus in an arbitrary place. After AlN nuclei are randomly formed in the plane of the SiC substrate in this way, the nuclei expand with growth, and fusion with adjacent nuclei is repeated. Thus, two-dimensional nuclei grow and finally the AlN crystal becomes a flat film.

  However, if there are polishing scratches or defects on the SiC substrate, nuclear fusion (two-dimensional nucleus growth) is hindered at that point, and hole (pit) -like crystal defects remain when AlN becomes a film. Therefore, threading dislocations tend to occur from that point. When this threading dislocation propagates to the surface of the buffer layer, that is, when the next group III-V nitride crystal is grown without filling the pits, it becomes a dislocation penetrating to the surface of the crystal, resulting in deterioration of device characteristics. Cause.

  In order to suppress the propagation of this threading dislocation to the resurface, it must be eliminated during the growth of the AlN buffer layer or bend laterally.

  Therefore, the anti-surfactant technology is applied in the present invention. The atoms on the surface of AlN are bonded to the atoms in the lower layer, but since there is no upper layer, the bonding is not easy and the surface free energy is high. If a group IV element is supplied there, it will combine with the surplus hands and the free energy on the surface will be lowered. The AlN reactive species thereon causes surface diffusion to avoid group IV elements, and consequently promotes lateral growth of AlN. As a result, the dislocations are bent by the force of lateral growth, and together with the adjacent dislocations, loop dislocations are formed, and no higher than that. Also, because the energy of the dislocation is high, the group IV element stays at the dislocation and plays a role in blocking propagation.

  However, the surface diffusion length of Al is extremely shorter than the surface diffusion length of gallium (Ga) or indium (In), and it is difficult to achieve the lateral growth of AlN. Therefore, the group IV element was not supplied in a pulsed manner, but was continuously supplied during the growth of the AlN buffer layer. As a result, an anti-surfactant is always formed on the surface of the growing AlN, and the lateral growth is strongly promoted.

Also, Al _X Ga _Y In _Z N (X, Y, Z> 0, X + Y + Z = 1) mixed crystal can be grown as a buffer layer on the SiC substrate by selecting an optimum structure and conditions. However, when this technique is used, the difference in the surface diffusion length of Al, Ga, and In becomes more remarkable. For this reason, segregation of Ga and In in the buffer layer increases, and this causes crystal defects different from threading dislocations. Therefore, the present invention is limited to the AlN buffer layer only.

By laminating a group III-V nitride semiconductor crystal on the AlN buffer layer, an LD, LED, or high breakdown voltage HEMT or HBT having a longer life than before can be realized without changing the process technology. be able to. For example, on the i-type AlN buffer layer 2 (thickness 100 nm), an i-type GaN layer 3 (thickness 2000 nm) as a channel layer, an i-type Al _0.25 Ga _0.75 N layer (thickness 3 nm), and an n-type Al By sequentially growing and laminating an AlGaN layer composed of a _0.25 Ga _0.75 N layer (thickness 30 nm), an HEMT epitaxial wafer can be manufactured.

According to the present invention, in a group III-V nitride semiconductor epitaxial wafer in which an AlN buffer layer is formed on a SiC substrate, a group IV element is uniformly present in the AlN buffer layer at a concentration of 1 × 10 ¹⁹ cm ⁻³ or more. Therefore, it is possible to realize a group III-V nitride semiconductor epitaxial wafer having a lower dislocation density at a lower cost regardless of the structure of the group III-V nitride semiconductor crystal on the AlN buffer layer. it can. By using this group III-V nitride semiconductor epitaxial wafer, it is possible to realize LDs, LEDs, or HEMTs and HBTs having a higher withstand voltage than conventional ones without changing the process technology.

  Hereinafter, embodiments of the present invention will be described with a focus on examples.

<Example>
In order to confirm the effect of the present invention, as a prototype example, as shown in FIG. 1, a high purity AlN buffer layer 2 doped with Si is formed on a SiC substrate 1 which is a single crystal, and the concentration of Si to be doped is changed. 5.0 × 10 ¹⁸ cm ⁻³ (Comparative Example), 1.2 × 10 ¹⁹ cm ⁻³ (Example 1), 5.5 × 10 ¹⁹ cm ⁻³ (Example 2) A comparison was made.

  The SiC substrate 1 has a polytype of 4H and an on-axis, Si surface in the <0001> direction. Further, as surface treatment of the substrate, after thermal oxidation, cleaning with diluted hydrofluoric acid was performed. This removed foreign matter along with the oxide film on the surface. The surface state of the SiC substrate at this time is shown in FIG.

This SiC substrate 1 was placed on a susceptor of a crystal growth apparatus using the MOVPE method, and heated to the growth temperature of the buffer layer (here, 1100 ° C.) in a hydrogen atmosphere. Thereafter, baking was performed for 10 minutes, and trimethylaluminum (TMA) and ammonia (NH ₃ ) were simultaneously flowed to grow the AlN buffer layer 2. Further, monosilane was used as a Si raw material for the sample doped with Si. The furnace pressure at this time was 135 Torr (about 180 hPa), and the flow rates of TMA and NH ₃ were 2.00 × 10 ⁻⁵ mol / min and 4.46 × 10 ⁻³ mol / min, respectively. As shown in FIG. 1, an AlN buffer layer 2 was grown to 100 nm on a SiC substrate 1 as a sample.

  The surface state of the AlN buffer layer 2 of the prototype was examined. As shown in FIG. 1, the sample as a premise has a simple structure in which an AlN buffer layer 2 is grown on a SiC substrate 1 by 100 nm.

  For comparison, FIG. 3 shows the surface state of the AlN buffer layer 2 (conventional example) grown without using the technique invented this time. In the case of the conventional example, it can be seen that there are many nanoscale holes that are thought to be threading dislocations on the surface, and they are arranged in a shape along the polishing scratches.

Using the technology of the present invention, the doping concentration of Si is 5.0 × 10 ¹⁸ cm ⁻³ (Comparative Example), 1.2 × 10 ¹⁹ cm ⁻³ (Example 1), 5.5 × 10 ¹⁹ cm ^−3. The surface state of the AlN buffer layer 2 when changed to (Example 2) is shown in FIG. 4, FIG. 5, and FIG. 4, 5, and 6, the concentration of doped Si is 1.2 × 10 ¹⁹ cm ⁻³ , 5 compared with the AlN buffer layer (comparative example) having a concentration of 5.0 × 10 ¹⁸ cm ^−3. It can be seen that the AlN buffer layer (Examples 1 and 2) of 5 × 10 ¹⁹ cm ⁻³ is in a good surface state.

FIG. 7 shows the correlation between the dislocation density of the AlN buffer layer and the doping concentration when the concentration of Si to be doped is changed. There is a clear correlation between the concentration of Si to be doped and the dislocation density, and it can be seen that Si in the AlN buffer layer exerts a great effect on the flattening of the buffer layer. That is, in the AlN buffer layer 2, Si of the group IV element has a concentration of 1 × 10 ¹⁹ cm ^{−3 to} 9 × 10 ¹⁹ cm ⁻³ , for example 1.2 × 10 ¹⁹ cm ⁻³ (Example 1), 5 When the layer is uniformly doped at 5 × 10 ¹⁹ cm ⁻³ (Example 2), the dislocation density can be reduced.

  Next, SlMS measurement was also performed to confirm the Si concentration in the AlN buffer layer. Since measurement cannot be performed if the group III-V nitride semiconductor crystal is too thin, the i-type GaN layer 3 is grown on the AlN buffer layer 2 by 2 μm and measurement is performed. The structure of the measurement sample is shown in FIG. 8, and the result of SlMS analysis is shown in FIG.

Moreover, the surface of this sample when the concentration of doped Si was 5.0 × 10 ¹⁸ cm ⁻³ (comparative example) and 5.5 × 10 ¹⁹ cm ⁻³ (example 2) was examined. These AFM comparison results are shown in FIG. 10 (Comparative Example) and FIG. 11 (Example 2). Differential images are also shown side by side for easy viewing, but there are significant differences in dislocation density and surface roughness. Although steps occur on both sample surfaces, the sample with a doping concentration of 5.0 × 10 ¹⁸ cm ⁻³ (comparative example) has a dislocation density of 1.2 × 10 ⁹ cm ⁻³ and no steps. In contrast to the rule, in the sample (Example 2) which is 5.5 × 10 ¹⁹ cm ⁻³ , the dislocation density is as small as 5.0 × 10 ⁷ cm ⁻² and the steps are also regular.

<Other embodiments and modifications>
Since the concentration of group IV raw material that minimizes dislocations in the AlN buffer layer 2 described above, growth temperature, pressure, V / III ratio, atmosphere, film formation speed, and growth pressure differ depending on the equipment used, trial You have to make mistakes.

  In the above embodiment, the growth temperature of the buffer layer is 1100 ° C., but it may be 1000 ° C. or higher. For example, the buffer layer growth temperature can be set to 1200 ° C., and the temperature for growing the GaN layer thereon can be lowered to 1100 ° C. The pressure in the furnace is 135 Torr (about 180 hPa), but it may be 200 Torr (about 267 hPa) or less.

  Further, in the present invention, in order to prevent dislocation propagation from the surface of the SiC substrate to the surface of the AlN buffer layer, in order to bend or block the dislocation in the AlN buffer layer, a film thickness of a certain degree or more is required. In the above embodiment, the thickness of the AlN buffer layer is set to 100 nm. However, in order to make this dislocation bend or block, the thickness of the AlN buffer layer may be 20 nm or more.

  In the present embodiment, monosilane was used as the Si raw material, but the same effect can be obtained by using disilane having a lower decomposition temperature, or tetramethyl silicon or tetraethyl silicon, which are organic raw materials.

It is a figure which shows the structure of the prototype of the board | substrate for III-V nitride semiconductor growth of this invention. It is a figure which shows the surface state of a commercially available SiC substrate. It is a figure which shows the surface state of the AlN buffer layer which grew on the SiC substrate, without applying this invention technique. As a comparative example, it is a figure which shows the surface state of the AlN buffer layer which doped Si of 5.0 * 10 < ¹⁸ > cm < ^-3 > and grew on the SiC substrate. The figure which shows the surface state of the AlN buffer layer which doped Si of 1.2 * 10 < ¹⁹ > cm < ^-3 > and grew on the SiC substrate as Example 1 of the board | substrate for III-V group nitride semiconductor growth of this invention. It is. The figure which shows the surface state of the AlN buffer layer which doped Si of 5.5 * 10 < ¹⁹ > cm < ^-3 > as Example 2 of the board | substrate for III-V group nitride semiconductor growth of this invention, and grew on the SiC substrate. It is. It is a figure which shows the correlation of the dislocation density of an AlN buffer layer, and doping Si density | concentration. It is a structure figure of the sample which performed SIMS analysis. It is a figure which shows the SIMS measurement result of the SiN doped AlN buffer layer. It is a figure which shows the surface state of the i-type GaN layer grown on the AlN buffer layer shown in FIG. 4 as a comparative example. It is a figure which shows the surface state of the i-type GaN layer grown on the AlN buffer layer shown in FIG. 6 as Example 2 of this invention.

Explanation of symbols

1 SiC substrate 2 AlN buffer layer 3 i-type GaN layer

Claims (6)

In a group III-V nitride semiconductor epitaxial wafer in which an AlN buffer layer is formed on a SiC substrate, and a group III-V nitride semiconductor crystal is formed on the AlN buffer layer,
A group III-V nitride semiconductor epitaxial wafer, wherein a group IV element is uniformly doped in the AlN buffer layer at a concentration of 1 × 10 ¹⁹ cm ⁻³ or more. In the III-V nitride semiconductor epitaxial wafer according to claim 1,
A group III-V nitride semiconductor epitaxial wafer, wherein the group IV element to be added is silicon or germanium. In the group III-V nitride semiconductor epitaxial wafer according to claim 2,
A group III-V nitride semiconductor epitaxial wafer, wherein the AlN buffer layer has a thickness of 20 nm or more. In the III-V nitride semiconductor epitaxial wafer according to claim 3,
A group III-V nitride semiconductor epitaxial wafer, wherein the AlN buffer layer is grown by MOVPE. The group III-V nitride semiconductor epitaxial wafer according to claim 4,
A group III-V nitride semiconductor epitaxial wafer, wherein the temperature during growth of the AlN buffer layer is set to 1000 ° C. or higher. In the III-V nitride semiconductor epitaxial wafer according to claim 5,
A III-V nitride semiconductor epitaxial wafer, wherein a growth pressure during the growth of the AlN buffer layer is 200 Torr or less.