JP2005045153A - Manufacturing method of nitride semiconductor, semiconductor wafer, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the manufacturing method of a nitride semiconductor wherein the dislocation density on the overall surface of a wafer is made uniform by making the film thickness of a low-temperature buffer layer uniform on the overall surface of the wafer, and to provide a nitride semiconductor wafer and a nitride semiconductor device which have the nitride semiconductor obtained by the manufacturing method. <P>SOLUTION: The manufacturing method of a nitride semiconductor is the one wherein at least first and second nitride semiconductor layers are grown on a substrate. The growth temperature of the second nitride semiconductor layer grown on the first nitride semiconductor layer is set to 700-1,300 °C. The growth speed and growth temperature of the first nitride semiconductor layer are selected respectively from the scope of 0.5-2.3 μm/hour and from the scope of 430-580 °C. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a nitride semiconductor having a narrow distribution of dislocation density in the wafer surface, a nitride semiconductor wafer having a nitride semiconductor obtained by the method, and a nitride semiconductor device.

  In general, the easiest method for forming a semiconductor epitaxial layer is a method in which a single crystal substrate made of the same material as a semiconductor to be grown is formed, and a semiconductor crystal is vapor-phase grown on the substrate. The system has been successfully put into practical use. However, it is often unavoidable to grow a semiconductor crystal different from the substrate material on the substrate because it is technically difficult to obtain a single crystal substrate or the cost is high. As a combination of a substrate and a semiconductor crystal in such a case, for example, a silicon substrate and GaAs, a sapphire or silicon carbide substrate and a nitride semiconductor, a GaAs substrate and a II-VI group semiconductor, and the like are known.

  However, when a semiconductor different from the substrate material is grown on the substrate, dislocations are introduced at a high density into the grown semiconductor epitaxial layer due to mismatch of various characteristics such as lattice, thermal expansion coefficient, surface energy and the like. Dislocations in semiconductors become non-radiative recombination centers, scattering centers, etc. in semiconductor devices such as optical devices and electronic devices. Therefore, there is a problem that a device using a semiconductor with a high dislocation density is extremely inferior in performance and stability.

  Nitride semiconductors such as gallium nitride (GaN), aluminum gallium nitride (AlGaN), and indium gallium nitride (InGaN) are also difficult to grow bulk crystals, and single crystal substrates of a size that can withstand practical use have not yet been obtained. . Therefore, a method of epitaxially growing a nitride semiconductor crystal on a substrate such as sapphire or silicon carbide is generally used. However, as described above, the occurrence of dislocation is a serious problem.

Under these circumstances, Japanese Patent Publication No. 8-8217 (Patent Document 1) proposes a method for reducing the dislocation density of a nitride semiconductor layer by a two-stage growth method using a metal organic vapor phase epitaxy method (MOVPE method). did. In this method, after removing the oxide film on the surface by injecting hydrogen gas onto the substrate surface made of sapphire or the like at a high temperature of 1,000 ° C. or more (thermal cleaning), (a) at 400 to 600 ° C. on the substrate. A low temperature buffer layer made of GaN, AlN or the like is grown, (b) heated to about 1,000 ° C. (heat treatment), and (c) a nitride semiconductor layer made of GaN or the like is grown at about 1,000 ° C. In the step (a), since the crystal growth temperature is lower than the melting point of GaN, AlN or the like, a polycrystalline low-temperature buffer layer is formed. By raising the temperature to about 1,000 ° C. in the step (b), the low-temperature buffer layer is partially single-crystallized to form fine crystal grains. In the step (c), an epitaxial layer such as GaN is formed using the fine crystal grains as nuclei. The dislocation density of the GaN semiconductor layer on the sapphire substrate obtained by this method is about 10 ⁹ pieces / cm ² , and the dislocation density of the GaN semiconductor layer obtained by the conventional method (10 ¹⁰ to 10 ¹¹ pieces / cm ² ) Was lower.

As a method for reducing the dislocation density of the GaN semiconductor layer formed on the sapphire substrate to 1 × 10 ⁹ pieces / cm ² or less, the present inventors disclosed in Japanese Patent Application No. 2003-185486 a method including the following three steps (first Inventive method) was proposed.
(i) A step of forming a microcrystalline grain made of a nitride semiconductor by growing a low-temperature buffer layer on a substrate and heat-treating it.
(ii) A step of forming an island-shaped nitride semiconductor layer having a plurality of facet surfaces inclined with respect to the substrate surface using the fine crystal grains as a nucleus (film thickness> 1 μm).
(iii) The island-shaped nitride semiconductor layer is grown in a direction parallel to the surface of the substrate to bond the plurality of island-shaped nitride semiconductor layers to each other, and thus has a flat surface. Step of forming a crystal layer By this method, the dislocation density could be reduced to 10 ⁷ to 10 ⁶ pieces / cm ² .

  In order to industrially use the nitride semiconductor wafer obtained by the conventional two-step growth method and the method of the prior invention, it is important that the dislocation density is uniform over the entire surface of the wafer. This is because the dislocation density greatly affects the electrical and optical characteristics of the nitride semiconductor, and if the dislocation density is not uniform, the element characteristics formed thereon will also be non-uniform.

  The dislocation density greatly depends on the thickness of the low-temperature buffer layer formed in the conventional two-step growth method and the method of the prior invention. Therefore, in order to obtain a nitride semiconductor wafer having a uniform dislocation density over the entire wafer surface, it is necessary to make the thickness of the low-temperature buffer layer uniform. However, a method for uniformly controlling the film thickness of the low-temperature buffer layer over the entire wafer surface has not been known so far.

Japanese Patent Publication No.8-8217

  Accordingly, an object of the present invention is to make a nitride semiconductor having a uniform dislocation density over the entire surface of the wafer by making the film thickness of the low-temperature buffer layer uniform over the entire surface of the wafer, and nitride a nitride semiconductor obtained by the method. A semiconductor wafer and a nitride semiconductor device.

  As a result of diligent research in view of the above object, the present inventors have grown a first nitride semiconductor layer (low-temperature buffer layer) on a substrate and grown a second nitride semiconductor layer thereon. In this manufacturing method, the uniformity of the in-plane film thickness distribution of the low-temperature buffer layer strongly depends on the growth temperature and growth rate during the growth of the low-temperature buffer layer, and by appropriately controlling this growth temperature and growth rate, The inventors have discovered that the distribution of dislocation density on the surface of the second nitride semiconductor formed above can be made uniform, and have arrived at the present invention.

  In other words, the first manufacturing method of the present invention is a method for manufacturing a nitride semiconductor in which at least a first and second nitride semiconductor layer are grown on a substrate, and is formed on the first nitride semiconductor layer. The growth temperature of the second nitride semiconductor layer to be grown is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 2 μm / hour or more and less than 2.3 μm / hour, and the growth temperature is 480 to 520 ° C. It is characterized by.

  Here, in the present invention intended for the case where the film thickness and the growth rate are not uniform, it is necessary to pay attention to how the “growth rate” is defined. That is, the “growth rate” of the target layer in this specification is the growth rate of each point arranged at 1 cm intervals including the center point on a straight line passing through the center point when the wafer is regarded as a disk. Mean value. In this case, the above straight line is set so that the distribution of the growth rate becomes the largest.

  A second manufacturing method of the present invention is a nitride semiconductor manufacturing method in which at least a first and a second nitride semiconductor layer are grown on a substrate, and is grown on the first nitride semiconductor layer. The growth temperature of the second nitride semiconductor layer is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 1.8 μm / hour or more and less than 2 μm / hour, and the growth temperature is 470 to 530 ° C. It is characterized by that.

  A third manufacturing method of the present invention is a method for manufacturing a nitride semiconductor in which at least first and second nitride semiconductor layers are grown on a substrate, and is grown on the first nitride semiconductor layer. The growth temperature of the second nitride semiconductor layer is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 1.6 μm / hour or more and less than 1.8 μm / hour, and the growth temperature is 460 to 545 ° C. It is characterized by doing.

  A fourth manufacturing method of the present invention is a nitride semiconductor manufacturing method for growing at least a first nitride semiconductor layer and a second nitride semiconductor layer on a substrate, and is grown on the first nitride semiconductor layer. The growth temperature of the second nitride semiconductor layer is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 1.4 μm / hour or more and less than 1.6 μm / hour, and the growth temperature is 450 to 560 ° C. It is characterized by doing.

  A fifth manufacturing method of the present invention is a nitride semiconductor manufacturing method for growing at least a first nitride semiconductor layer and a second nitride semiconductor layer on a substrate, and is grown on the first nitride semiconductor layer. The growth temperature of the second nitride semiconductor layer is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 1.2 μm / hour or more and less than 1.4 μm / hour, and the growth temperature is 445 to 565 ° C. It is characterized by doing.

  A sixth manufacturing method of the present invention is a nitride semiconductor manufacturing method for growing at least first and second nitride semiconductor layers on a substrate, and is grown on the first nitride semiconductor layer. The growth temperature of the second nitride semiconductor layer is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 1 μm / hour or more and less than 1.2 μm / hour, and the growth temperature is 440 to 570 ° C. It is characterized by that.

  A seventh manufacturing method of the present invention is a nitride semiconductor manufacturing method in which at least a first and a second nitride semiconductor layer are grown on a substrate, and is grown on the first nitride semiconductor layer. The growth temperature of the second nitride semiconductor layer is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 0.8 μm / hour or more and less than 1 μm / hour, and the growth temperature is 435 to 575 ° C. It is characterized by that.

  An eighth manufacturing method of the present invention is a method for manufacturing a nitride semiconductor in which at least a first and a second nitride semiconductor layer are grown on a substrate, and is grown on the first nitride semiconductor layer. The growth temperature of the second nitride semiconductor layer is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 0.5 μm / hour or more and less than 0.8 μm / hour, and the growth temperature is 430 to 580 ° C. It is characterized by doing.

Crystal growth of the nitride semiconductor is preferably performed in a vapor phase growth apparatus, for example, in a metal organic vapor phase growth (MOVPE) apparatus or a hydride vapor phase growth (HVPE) apparatus. The substrate is preferably a single crystal substrate made of sapphire, silicon carbide, silicon, ZrB ₂ , ZnO, LiGaO ₂ or LiAlO ₂ . It said first and second nitride respective semiconductor _{In x Al y Ga z N (} x ≧ 0, y ≧ 0, z ≧ 0, x + y + z = 1) consist preferably.

  By using the manufacturing method of the present invention, the thickness variation of the first nitride semiconductor layer (low-temperature buffer layer) can be made within an average value ± 10% within the 2-inch wafer surface, Thereby, the dislocation density on the surface of the second nitride semiconductor can be made uniform. Specifically, the variation in the dislocation density on the second nitride semiconductor surface can be within an average value ± 10%.

  In the nitride semiconductor wafer of the present invention, a plurality of semiconductor layers are formed on the second nitride semiconductor layer obtained by the manufacturing method of the present invention. According to the manufacturing method of the present invention, since the distribution of dislocation density in the nitride semiconductor wafer surface can be made uniform, the characteristics of the nitride semiconductor device manufactured using this wafer can be made uniform. The semiconductor layer provided on the second nitride semiconductor crystal layer may be appropriately selected depending on the application of the semiconductor wafer.

  The semiconductor device of the present invention is composed of the nitride semiconductor wafer of the present invention, and has a device structure on the second nitride semiconductor layer. The semiconductor device may be a transistor such as a high electron mobility transistor (HEMT) or a field effect transistor (FET), a light emitting diode (LED), or the like.

  According to the method for producing a nitride semiconductor of the present invention, it is possible to produce a nitride semiconductor having a narrow distribution of in-plane dislocation density. Therefore, by using this nitride semiconductor, it is possible to obtain a nitride semiconductor device having uniform characteristics over the entire wafer surface.

  In the manufacturing method of the present invention, at least a first nitride semiconductor layer and a second nitride semiconductor layer are formed on a substrate. The method for forming the first and second nitride semiconductor layers is not particularly limited. For example, a normal two-stage growth method may be used, or the method of the prior invention may be used. When the method of the prior invention is used, it is possible to obtain a nitride semiconductor having a lower surface dislocation density.

  When using the method of the prior invention, first, a first nitride semiconductor layer (low-temperature buffer layer) is grown on a substrate at 430 to 580 ° C., and this is heat-treated at 700 to 1300 ° C., so that dislocations are not introduced. Form. Next, the second nitride semiconductor layer is grown at 700 to 1300 ° C. using the microcrystal grains as nuclei. The second nitride semiconductor layer uses a hydrogen / nitrogen mixed gas containing 63% by volume or more, preferably 82 to 100% by volume of hydrogen as a carrier gas. A step of growing thicker than 1 μm, and a step of planarizing the grown island-shaped nitride semiconductor layer using a hydrogen / nitrogen mixed gas containing 50% by volume or more, preferably 70 to 100% by volume of nitrogen as a carrier gas Can be formed. Since the island-shaped semiconductor layer has a large contact area between the substrate and the crystal, dislocations are introduced, and the dislocation propagates in the direction perpendicular to the substrate surface and reaches the facet plane during the growth process of the island-shaped semiconductor layer. Dislocations that reach the facet plane tend to change their propagation direction to a direction parallel to the substrate surface with a certain probability. Therefore, dislocations that propagate in the direction parallel to the substrate surface meet each other, forming a dislocation loop or two lines. The dislocations are synthesized into one, and the density decreases. For this reason, according to the method of the prior invention, a nitride semiconductor having a lower dislocation density appearing on the surface of the crystal layer can be obtained.

  Crystal growth of the nitride semiconductor is preferably performed in a vapor phase growth apparatus, for example, in a metal organic vapor phase growth (MOVPE) apparatus or a hydride vapor phase growth (HVPE) apparatus. The MOVPE method can grow a highly crystalline nitride semiconductor crystal, and the HVPE method can grow a nitride semiconductor crystal efficiently because the crystal growth rate is fast. The implementation conditions for the MOVPE method and the HVPE method may be set as appropriate. Further, the MOVPE method and the HVPE method may be combined. For example, a nitride semiconductor crystal is first epitaxially grown on a substrate by the MOVPE method to form a first nitride semiconductor layer (low-temperature buffer layer), and then a second nitride semiconductor layer is grown on the substrate by the HVPE method. Can also be done.

  The growth temperature and growth rate of the first nitride semiconductor layer formed on the substrate affect the film thickness distribution of the first nitride semiconductor layer, and the film thickness distribution of the first nitride semiconductor layer is above it. This affects the distribution of dislocation density on the surface of the second nitride semiconductor to be formed. In order to make the dislocation density distribution on the second nitride semiconductor surface within an average value ± 10%, it is desirable to make the film thickness distribution of the first nitride semiconductor layer within an average value ± 10%.

  By setting the growth rate and growth temperature of the first nitride semiconductor layer to any one of the following combinations, the film thickness distribution of the first nitride semiconductor layer can be within an average value ± 10%. That is, the growth rate is 2 μm / hour or more and less than 2.3 μm / hour, the growth temperature is 480 to 520 ° C., the growth rate is 1.8 μm / hour or more and less than 2 μm / hour, and the growth temperature is 470 to 530 ° C. Is 1.6 μm / hour or more and less than 1.8 μm / hour, the growth temperature is 460 to 545 ° C., the growth rate is 1.4 μm / hour or more and less than 1.6 μm / hour, the growth temperature is 450 to 560 ° C., and the growth rate is 1.2. μm / hour or more and less than 1.4 μm / hour, growth temperature is 445 to 565 ° C., growth rate is 1 μm / hour or more and less than 1.2 μm / hour, growth temperature is 440 to 570 ° C., growth rate is 0.8 μm / hour. The growth temperature is 435 to 575 ° C., the growth rate is 0.5 μm / hour or more and less than 0.8 μm / hour, and the growth temperature is 430 to 580 ° C.

  In all the above cases, the growth temperature of the second nitride semiconductor layer grown on the low-temperature buffer layer is set to 700 to 1300 ° C. If the temperature is lower than 700 ° C, an undesired deep level is introduced into the crystal when applied to the device, and if the temperature is higher than 1300 ° C, the flatness of the crystal surface exceeds 20 nm in terms of rms value and is used for the device. It is not preferable to do. Although the growth rate of the second nitride semiconductor layer is not particularly limited, it is preferably 2 to 4.8 μm / hour in the case of the usual two-stage growth method, and the semiconductor layer having an island structure in the case of the method of the previous invention. It is preferable that the growth rate is 1.5 to 4.8 μm / hour in the step of growing silicon and 2.2 to 10.9 μm / hour in the step of planarizing the grown island-shaped nitride semiconductor layer. The film thickness of the first nitride semiconductor layer is preferably 0.005 to 0.042 μm, and the film thickness of the second nitride semiconductor layer is preferably 0.3 to 10 μm.

The substrate is preferably a single crystal substrate made of sapphire, silicon carbide, silicon, ZrB ₂ , ZnO, LiGaO ₂ or LiAlO ₂ . First and second nitride semiconductor layer grown on the substrate, each _{In x Al y Ga z N (} x ≧ 0, y ≧ 0, z ≧ 0, x + y + z = 1) consist preferably. The first and second nitride semiconductor layers may be the same or different. For example, both the first and second nitride semiconductor layers may be semiconductor layers made of GaN, or the first nitride semiconductor layer is made of In _x Ga _1-x N (0 ≦ x ≦ 0.3). The second nitride semiconductor layer may be a semiconductor layer made of GaN.

At least one of the first and second nitride semiconductor layers may be an undoped layer, a silicon doped layer, an oxygen doped layer, an iron doped layer, a zinc doped layer, or a magnesium doped layer. Particularly in the case of a silicon doped layer, an oxygen doped layer, an iron doped layer, a zinc doped layer or a magnesium doped layer, the doping concentration is preferably 5 × 10 ¹⁹ atoms / cm ³ or less. When the doping concentration is too high, there arises a problem that the surface flatness of the final nitride semiconductor is impaired as well as the problem of crystal contamination.

  The nitride semiconductor wafer of the present invention is obtained by forming a nitride semiconductor layer on a substrate by the manufacturing method of the present invention, and a plurality of semiconductor layers are formed thereon. Since the dislocation density distribution over the entire surface of the nitride semiconductor layer can be narrowed by the manufacturing method of the present invention, a high-performance nitride semiconductor wafer can be obtained. The plurality of semiconductor layers formed on the nitride semiconductor crystal layer may be appropriately selected depending on the application of the semiconductor wafer. The plurality of semiconductor layers may be formed continuously in the same growth apparatus as the nitride semiconductor crystal layer, or may be formed in different growth apparatuses. The nitride semiconductor wafer of the present invention may be subjected to grinding, etching, heat treatment, etc. in addition to semiconductor layer formation.

  The semiconductor device of the present invention is constituted by the nitride semiconductor wafer of the present invention. High electron mobility transistor (HEMT), field effect by applying electrode formation, surface oxidation, doping, photolithography, etching, cleaning, dicing, assembly, etc. to the nitride semiconductor wafer of the present invention A transistor such as a transistor (FET) or a nitride semiconductor device such as a light emitting diode (LED) can be obtained.

  The present invention will be described in more detail with reference to the following examples, but the present invention is not limited thereto.

Example 1
A GaN layer was grown as a first and second nitride semiconductor layer on a C-plane sapphire substrate having a diameter of 50.8 mm (2 inches) and a thickness of 330 μm by the MOVPE method. First, the substrate is placed in a MOVPE apparatus and heated at 1135 ° C for 10 minutes in a 760 Torr hydrogen / nitrogen mixed gas atmosphere (total flow rate = 150 slm, hydrogen concentration = 33 vol%). Etc. were removed (thermal cleaning).

The substrate temperature is lowered to 430-580 ° C, the carrier gas flow rate is 140 slm, the hydrogen concentration in the carrier gas is 29% by volume, and ammonia (NH ₃ ) gas, which is a nitrogen material, is introduced into the growth apparatus at a flow rate of 10 slm. did. Furthermore, trimethyl gallium (TMG) is introduced into the growth apparatus as a Ga raw material, and the growth rate and growth temperature are changed so that the thickness of the GaN low-temperature buffer layer (first nitride semiconductor layer) becomes about 1 μm on the substrate. Grown up to.

  After completion of the growth, the temperature of the substrate was lowered to near room temperature and a sample was taken out, and the in-plane film thickness distribution was examined by observing the cross section with a scanning electron microscope (SEM). The measurement points for cross-sectional observation were determined according to the method described in the previous definition of growth rate. FIG. 1 shows the results of measuring the film thickness distribution of the low-temperature buffer layer. In FIG. 1, the abscissa represents the growth temperature, the ordinate represents the growth rate, and the condition (region) in which the in-plane film thickness distribution of the low-temperature buffer layer is within an average value ± 10% is indicated by hatching. Specifically, the growth rate of the low-temperature buffer layer is 2 μm / hour or more and less than 2.3 μm / hour, the growth temperature is 480 to 520 ° C., the growth rate is 1.8 μm / hour or more and less than 2 μm / hour, and the growth is performed. The region where the temperature is 470 to 530 ° C, the growth rate is 1.6 μm / hour or more and less than 1.8 μm / hour, the region where the growth temperature is 460 to 545 ° C, the growth rate is 1.4 μm / hour or more and less than 1.6 μm / hour, The growth temperature is 450 to 560 ° C., the growth rate is 1.2 μm / hour or more and less than 1.4 μm / hour, the growth temperature is 445 to 565 ° C., the growth rate is 1 μm / hour or more and less than 1.2 μm / hour. In the region where the growth temperature is 440 to 570 ° C., the growth rate is 0.8 μm / hour or more and less than 1 μm / hour, and the growth temperature is 435 to 575 ° C., the growth rate is 0.5 μm / hour or more and less than 0.8 μm / hour. And the growth temperature is in the range of 430 to 580 ° C. Outside this region, the film thickness distribution of the low-temperature buffer layer was an average value of ± 15% or more.

Example 2
After growing a low-temperature buffer layer (first nitride semiconductor layer) made of GaN to a thickness of 22 nm under the same conditions as in Example 1, the carrier gas flow rate was 80 slm and the hydrogen concentration in the carrier gas was 25 volumes. %, The ammonia gas flow rate was changed to 20 slm, the substrate temperature was 1075 ° C, and the GaN layer (second nitride semiconductor layer) was grown to a thickness of 2.2 μm at a growth rate of 4.4 μm / hour (usually Two-stage growth method). After the growth, the dislocation density distribution in the wafer surface was examined by a transmission electron microscope (TEM).

When the low temperature buffer layer is grown under the conditions (shaded area) shown in FIG. 1 in which the film thickness distribution of the low temperature buffer layer is within ± 10% in Example 1, the second nitridation grown thereon The average value of dislocation density on the surface of the physical semiconductor layer was 1 to 2 × 10 ⁹ pieces / cm ² , and the distribution of dislocation density was within ± 10% of the average value. When the low-temperature buffer layer was grown under conditions outside the hatched region in FIG. 1, the dislocation density distribution on the surface of the second nitride semiconductor layer was an average value of ± 13% or more.

  As is clear from the above results, in order to reduce the dislocation density distribution in the wafer plane, the film thickness distribution of the low temperature buffer layer is narrowed, and the low temperature buffer layer growth conditions for that are shown by the oblique lines in FIG. It can be seen that it is important to use region conditions.

Example 3
The growth conditions of the low-temperature buffer layer in the present invention were applied to the nitride semiconductor manufacturing method of the prior invention (Japanese Patent Application No. 2003-185486). First, a low-temperature buffer layer (first nitride semiconductor layer) made of GaN was grown to a thickness of 22 nm under the same conditions as in Example 1. Next, the carrier gas flow rate was 80 slm, the hydrogen concentration in the carrier gas was 29 vol%, the ammonia flow rate was 20 slm, and the substrate temperature was raised to 1075 ° C. to heat-treat the GaN layer. When the heat treatment of the GaN layer is completed, the hydrogen concentration in the carrier gas is set to 82% by volume, and as the second nitride semiconductor layer, the GaN layer is first formed at a substrate temperature of 1075 ° C. and a growth rate of 2.25 μm / hour and 2.25 μm. After growing to a thickness, the pressure inside the device is lowered to 300 Torr while growing, the carrier gas flow rate is 130 slm, the hydrogen concentration in the carrier gas is 23% by volume, the substrate temperature is 1005 ° C, and the GaN layer Was grown to a thickness of 3 μm at a growth rate of 3.1 μm / hour. After the growth was completed, the substrate temperature was lowered to 200 ° C. or lower, and the inside of the growth apparatus was filled with 760 Torr of nitrogen gas, and then the substrate was taken out of the growth apparatus.

When the grown sample was observed by TEM to examine the dislocation density and its distribution, when the low temperature buffer layer was grown under the conditions in the hatched region shown in FIG. The distribution was 6 × 10 ⁷ pieces / cm ² , and the dislocation density distribution was within an average value ± 8%. On the other hand, when the low temperature buffer layer was grown under conditions outside the shaded area shown in FIG. 1, the distribution of dislocation density was an average value of ± 11% or more.

Example 4
As substrates, single crystal substrates made of carbonized silicon, silicon, ZrB ₂ , ZnO, LiGaO ₂ and LiAlO ₂ were used, and GaN layers were grown on these substrates under the same conditions as in Example 3. In any case, when the low temperature buffer layer is grown under the conditions in the hatched region shown in FIG. 1, the distribution of dislocation density in the plane of the second nitride semiconductor layer is within an average value ± 9.5%. It was.

Example 5
The first and second layers are formed on the substrate in the same manner as in Example 3 except that In _x Al _y Ga _z N (x ≧ 0, y ≧ 0, z ≧ 0, x + y + z = 1) is grown instead of GaN. A nitride semiconductor layer was grown. As the group III raw material, trimethylindium (TMI) and trimethylaluminum (TMA) were used in addition to TMG, and the ratio of these raw materials was appropriately changed and grown. As a result, when the low-temperature buffer layer was grown under the conditions in the hatched region shown in FIG. 1 in the entire composition range, the in-plane dislocation density distribution was within an average value ± 10%. When the low-temperature buffer layer was grown under conditions outside the hatched region shown in FIG. 1, the dislocation density distribution was an average value of ± 12% or more.

Example 6, Comparative Example 1
As shown in FIG. 2, the first nitride semiconductor layer (low-temperature buffer layer) was grown on the sapphire substrate 1 as shown in FIG. 2 except that the growth temperature and growth rate were 520 ° C. and 1.0 μm / hour, respectively. An undoped GaN layer 3 (thickness 6000 nm) made of the first and second nitride semiconductor layers was formed. A blue LED structure crystal shown in FIG. 2 was continuously grown thereon. On the undoped GaN layer 3, an n-GaN layer 4 (thickness 3 μm), an InGaN / GaN multiple quantum well layer 5 (InGaN layer thickness 2 nm, GaN layer thickness 5 nm), p-Al _0.1 Ga _0.9 N layer 6 A p-GaN contact layer 7 (thickness 0.2 μm) was sequentially formed (thickness 20 nm) to obtain a nitride semiconductor wafer of Example 6 having a blue LED structure.

  For comparison, the same procedure as in the nitride semiconductor wafer of the example was performed except that the low-temperature buffer layer was grown under conditions outside the hatched region shown in FIG. 1 (growth temperature: 550 ° C., growth rate: 2.0 μm / hour). Thus, a nitride semiconductor wafer of Comparative Example 1 was obtained.

  The surfaces of both the obtained wafers were partially removed by RIE (Reactive Ion Etching) to expose a part of the n-GaN layer to form an n-electrode (Ti / Al electrode) 8. Further, a p-electrode (Ni / Au electrode) 9 was formed on the p-GaN contact layer to produce an LED. Approximately 8000 LED chips were obtained from each 2 inch wafer.

  When a current of 20 mA was applied to the LED of Example 6 and Comparative Example 1, the average light output and variation of the LED of Example 6 was 13 mW ± 6%, which was the average of the LED of Comparative Example 1. The light output and its variation were 12.5 mW ± 14%. From the above, it has been found that by making the dislocation density in the wafer surface uniform by the method of the present invention, the characteristics of the blue LED fabricated thereon can be made uniform.

Example 7, Comparative Example 2
The undoped GaN layer 13 (thickness) is formed on the sapphire substrate 11 as shown in FIG. 3 using the growth conditions (growth temperature: 520 ° C., growth rate: 1.0 μm / hour) of the low temperature buffer layer in the hatched region shown in FIG. 6000 nm), and an undoped Al _0.25 Ga _0.75 N layer 14 (thickness 3 nm), n-Al _0.25 Ga _0.75 N layer 15 (thickness 20 nm), and undoped Al _0.25 Ga _0.75 N layer 16 (thickness 5 nm) were sequentially formed to produce a nitride semiconductor wafer. A source electrode 17, a gate electrode 18 and a drain electrode 19 were formed on the obtained wafer using photolithography and a vacuum deposition process, and a high electron mobility transistor (HEMT) shown in FIG. 3 was produced (Example 7). ).

  For comparison, a nitride semiconductor wafer was fabricated in the same manner as in the example except that the low-temperature buffer layer was grown under conditions outside the hatched region in FIG. 1 (growth temperature: 550 ° C., growth rate: 2.0 μm / hour). The HEMT was manufactured (Comparative Example 2). Approximately 1000 HEMT devices were obtained from each 2 inch wafer.

  When the direct current transfer characteristics of the HEMTs of Example 7 and Comparative Example 2 were examined, the average value and the variation of the mutual conductance of the HEMT of Example 7 were 250 mS / mm ± 7%. The average value of the mutual conductance and the variation thereof were 240 mS / mm ± 15%. From the above, it has been found that by making the dislocation density in the wafer plane uniform by the method of the present invention, the characteristics of the HEMT fabricated thereon can be made uniform.

It is a graph which shows the growth conditions of the low temperature buffer layer from which the film thickness distribution of a low temperature buffer layer becomes less than the average value +/- 10%. It is a schematic sectional drawing which shows the structure of an example (blue LED) of the semiconductor device of this invention. It is a schematic sectional drawing which shows the structure of the other example (high electron mobility transistor) of the semiconductor device of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 11 ... Sapphire substrate 3, 13 ... Undoped GaN layer 4 ... n-GaN layer 5 ... InGaN / GaN multiple quantum well layer 6 ... p-Al _0.1 Ga _0.9 N layer 7. ..P-GaN contact layer 8 ... n-electrode 9 ... p-electrode
14 ... Undoped Al _0.25 Ga _0.75 N layer
15 ... n-Al _0.25 Ga _0.75 N layer
16 ... Undoped Al _0.25 Ga _0.75 N layer
17 ... Source electrode
18 ... Gate electrode
19 ... Drain electrode

Claims (12)

A method for manufacturing a nitride semiconductor, comprising growing at least a first nitride semiconductor layer and a second nitride semiconductor layer on a substrate, wherein the second nitride semiconductor layer is grown on the first nitride semiconductor layer. The method is characterized in that the temperature is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 2 μm / hour or more and less than 2.3 μm / hour, and the growth temperature is 480 to 520 ° C. A method for manufacturing a nitride semiconductor, comprising growing at least a first nitride semiconductor layer and a second nitride semiconductor layer on a substrate, wherein the second nitride semiconductor layer is grown on the first nitride semiconductor layer. The method is characterized in that the temperature is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 1.8 μm / hour or more and less than 2 μm / hour, and the growth temperature is 470 to 530 ° C. A method for manufacturing a nitride semiconductor, comprising growing at least a first nitride semiconductor layer and a second nitride semiconductor layer on a substrate, wherein the second nitride semiconductor layer is grown on the first nitride semiconductor layer. The method is characterized in that the temperature is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 1.6 μm / hour or more and less than 1.8 μm / hour, and the growth temperature is 460 to 545 ° C. A method for manufacturing a nitride semiconductor, comprising growing at least a first nitride semiconductor layer and a second nitride semiconductor layer on a substrate, wherein the second nitride semiconductor layer is grown on the first nitride semiconductor layer. The method is characterized in that the temperature is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 1.4 μm / hour or more and less than 1.6 μm / hour, and the growth temperature is 450 to 560 ° C. A method for manufacturing a nitride semiconductor, comprising growing at least a first nitride semiconductor layer and a second nitride semiconductor layer on a substrate, wherein the second nitride semiconductor layer is grown on the first nitride semiconductor layer. The method is characterized in that the temperature is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 1.2 μm / hour or more and less than 1.4 μm / hour, and the growth temperature is 445 to 565 ° C. A method for manufacturing a nitride semiconductor, comprising growing at least a first nitride semiconductor layer and a second nitride semiconductor layer on a substrate, wherein the second nitride semiconductor layer is grown on the first nitride semiconductor layer. The method is characterized in that the temperature is set to 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is set to 1 μm / hour or more and less than 1.2 μm / hour, and the growth temperature is set to 440 to 570 ° C. A method for manufacturing a nitride semiconductor, comprising growing at least a first nitride semiconductor layer and a second nitride semiconductor layer on a substrate, wherein the second nitride semiconductor layer is grown on the first nitride semiconductor layer. The method is characterized in that the temperature is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 0.8 μm / hour or more and less than 1 μm / hour, and the growth temperature is 435 to 575 ° C. A method for manufacturing a nitride semiconductor, comprising growing at least a first nitride semiconductor layer and a second nitride semiconductor layer on a substrate, wherein the second nitride semiconductor layer is grown on the first nitride semiconductor layer. The method is characterized in that the temperature is 700 to 1300 ° C., the growth rate of the first nitride semiconductor layer is 0.5 μm / hour or more and less than 0.8 μm / hour, and the growth temperature is 430 to 580 ° C. In the nitride semiconductor manufacturing method according to claim 1, and wherein the substrate is sapphire, silicon carbide, silicon, ZrB _2, ZnO, a single crystal substrate made of LiGaO ₂ or LiAlO ₂ how to. In the nitride semiconductor manufacturing method according to claim 1, wherein the first and second nitride semiconductor layers are each _{In x Al y Ga z N (} x ≧ 0, y ≧ 0, z ≧ 0, x + y + z = 1). A nitride semiconductor wafer having a nitride semiconductor manufactured by the method according to claim 1, wherein a plurality of semiconductor layers are formed on the second nitride semiconductor layer. Nitride semiconductor wafer. 12. A nitride semiconductor device using the nitride semiconductor wafer according to claim 11.

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