JP4633962B2 - Manufacturing method of nitride semiconductor substrate - Google Patents
Manufacturing method of nitride semiconductor substrate Download PDFInfo
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- JP4633962B2 JP4633962B2 JP2001149892A JP2001149892A JP4633962B2 JP 4633962 B2 JP4633962 B2 JP 4633962B2 JP 2001149892 A JP2001149892 A JP 2001149892A JP 2001149892 A JP2001149892 A JP 2001149892A JP 4633962 B2 JP4633962 B2 JP 4633962B2
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Description
【0001】
【産業上の利用分野】
本発明は窒化物半導体(InXAlYGa1-X-YN、0≦X、0≦Y、X+Y≦1)よりなる基板の製造方法に関する。
【0002】
【従来の技術】
一般に半導体を基板上に成長させる際、その成長させる半導体と格子整合した基板を用いると半導体の結晶欠陥が少なくなって結晶性が向上することが知られている。しかし、窒化物半導体は格子整合する基板が現在世の中に存在しないことから、一般にサファイア、スピネル、炭化ケイ素のような窒化物半導体と格子整合しない基板の上に成長されている。
【0003】
GaNバルク結晶を作製する試みは、様々な研究機関において成されているが、未だに数ミリ程度のものしか得られたという報告しかされておらず、実用化には程遠い状態である。
【0004】
GaN基板を作製する技術として、例えば特開平7−202265号公報、特開平7−165498号に、サファイア基板の上にZnOよりなるバッファ層を形成して、そのバッファ層の上に窒化物半導体を成長させた後、バッファ層を溶解除去する技術が記載されている。
【0005】
しかしながらサファイア基板の上に成長されるZnOバッファ層の結晶性は悪く、そのバッファ層の上に窒化物半導体を成長させても良質の窒化物半導体を得ることは難しい。さらに、薄膜のZnOよりなるバッファ層を溶解除去するのは非常に長時間を要し実用は難しい。
【0006】
【発明が解決しようとする課題】
本発明はこのような事情を鑑みて成されたものであって、その目的とするところは、発光効率や受光効率の高い窒化物半導体素子が作製できる 結晶性の良い窒化物半導体からなる基板を提供することにある。
【0007】
【課題を解決するための手段】
2層構造を有する窒化物半導体基板の製造方法であって、窒化物半導体と格子整合しない第1の基板上に、GaN、AlN、AlGaNから選ばれるバッファ層を介してn型不純物を含有する窒化物半導体が成長された第1のウェーハと、窒化物半導体と格子整合しない第2の基板上に、GaN、AlN、AlGaNから選ばれるバッファ層を介して前記第1の基板上の窒化物半導体とは膜厚が異なり、ノンドープ、若しくはn型不純物を含有する窒化物半導体が成長された第2のウェーハであり、前記第1のウェーハの窒化物半導体のキャリア濃度は、前記第2のウェーハの窒化物半導体のキャリア濃度と異なる第1のウェーハと第2のウェーハとを用意し、窒化物半導体の分解圧以上に加圧された窒素雰囲気中でウェーハを加熱することにより、前記第1のウェーハと前記第2のウェーハとをそれぞれの窒化物半導体同士を接着し、その後、前記第1のウェーハと前記第2のウェーハのどちらかの基板であって、膜厚の薄い窒化物半導体が成長された基板側を先に研磨して、第1の基板と第1の基板上のバッファ層と第2の基板と第2の基板上のバッファ層とを除去することにより、キャリア濃度が高いn+層とキャリア濃度が低いn−層からなる窒化物半導体基板を形成することを特徴とする。
また、前記窒化物半導体は、GaNであり、前記接着は、0.01気圧以上に加圧された窒素雰囲気中で800℃以上の温度でウェーハを加熱することにより行われることが好ましい。また、前記第1及び第2の基板は、サファイア、スピネル、SiC、ZnO、GaAs、Si、GaPから選択されることが好ましい。
【0008】
さらに、本発明の窒化物半導体基板は、前記窒化物半導体層は、ノンドープ、若しくはn型不純物を1×1019/cm3以下でドープしたものであることを特徴とする。
【0009】
また本発明の窒化物半導体基板において、前記n型不純物はSi、Ge、Sn、Sの中から選択される少なくとも一種であることを特徴とする。さらに、前記窒化物半導体層は、2軸結晶法によるX線ロッキングカーブの半値幅が15分以下であることを特徴とする。
【0010】
【発明の実施の形態】
本発明の製造方法において、窒化物半導体を成長させる第1の基板、及び第2の基板には、従来提案されている窒化物半導体が成長できる基板であって、窒化物半導体よりなる基板を除いた基板であればどのような基板を使用しても良く、例えばサファイア、スピネル、SiC等が多用され、その他、ZnO、GaAs、Si、GaP等があり、また特開平2−229475公報に記載される窒化物半導体に格子整合した酸化物基板を用いることができる。
【0011】
窒化物半導体を成長させるには、例えばMOVPE(有機金属気相成長法)、MBE(分子線気相成長法)、HVPE(ハライド気相成長法)等の従来より知られている気相成長法を用いることができる。
【0012】
基板上に窒化物半導体を成長させるには、まず基板に接して、0.1μm以下の膜厚でGaN、AlN、AlGaN等のバッファ層を成長させることが望ましい。バッファ層は例えば特開平4−297023号公報において詳説されている。
【0013】
次に基板上に成長させる窒化物半導体は最も好ましくはノンドープ、若しくはn型不純物を1×1019/cm3以下でドープしたGaNを成長させる。n型不純物はSi、Ge、Sn、S等の第4族元素の内の少なくとも一種を選択し、特に好ましくはSi、Geを用いる。窒化物半導体の膜厚は50μm以上、さらに好ましくは80μm以上、最も好ましくは100μm以上で成長させる。上限については特に限定しないが200μm以下が望ましい。またn型不純物のドープ量が1×1019/cm3を超えると基板となる結晶性の良い窒化物半導体が成長させにくい。なお結晶性が良いとは、例えば2軸結晶法によるX線ロッキングカーブの半値幅が15分以下の窒化物半導体を指す。
【0014】
次に2枚の基板上にそれぞれ成長された窒化物半導体を接着するには、例えばウェーハ接着の方法を用いることが望ましい。ウェーハ接着とは、成長された窒化物半導体の表面をエッチング、研磨等の手法により、鏡面で、平坦な面とした後、その平坦な面同士を張り合わせて、加圧及び加熱によって接着する技術である。加圧は適当な治具を用いて固定すれば達成できる。このようにウェーハ接着すると窒化物半導体層と、対向する窒化物半導体層との界面には他の物質が介在しないので、両窒化物半導体のキャリア濃度、移動度、抵抗率等が同じであれば、それらの特性の均一な基板が得られやすい。また後に述べるように、意図的にキャリア濃度等の異なる基板を作製しても良い。
【0015】
特に好ましくは接着する工程は、窒化物半導体の分解圧以上に加圧された窒素雰囲気中でウェーハを加熱することが望ましい。加熱温度は600℃以上、さらに好ましくは800℃以上で加熱する。GaNの場合、GaNの分解圧は800℃で約0.01気圧、1000℃で約1気圧、1100℃で約10気圧程度である。そのため窒素雰囲気中で、GaNの分解圧以上で加圧しながら加熱すると、GaN中からNが抜けるのを防止するとともに、接着状態の良い基板を提供することができる。
【0016】
【実施例】
以下実施例で本発明を詳説する。図1乃至図3は本発明の方法を説明するためのウェーハの構造を示す模式断面図であり、実施例における本発明の各工程を説明するものである。
【0017】
[実施例1]
図1に示すようにサファイア基板1、1’上にGaNよりなるバッファ層2、2’を200オングストロームの膜厚で成長させ、その上に窒化物半導体層3、3’を成長させた第1のウェーハ(a)、第2のウェーハ(b)とを用意する。
窒化物半導体は以下のようにしてMOVPE法により成長させた。
【0018】
2インチφ、厚さ400μmのサファイア(C面)よりなる基板1を反応容器内にセットし、容器内を水素で十分置換した後、水素を流しながら、基板の温度を1050℃まで上昇させ、基板のクリーニングを行う。
【0019】
続いて、温度を510℃まで下げ、キャリアガスに水素、原料ガスにアンモニアとTMG(トリメチルガリウム)とを用い、基板上にGaNよりなるバッファ層2を200オングストロームの膜厚で成長させる。
【0020】
続いて温度を1050℃まで上昇させ、1050℃になったら、同じく原料ガスにTMG、アンモニアガスを用い、キャリア濃度1×1018/cm3のノンドープGaNよりなる窒化物半導体層3を150μmの膜厚で成長させる。成長後温度を室温まで戻し、ウェーハを反応容器から取り出し、これを第1のウェーハ(a)とする。次に、サファイア基板1’に対しても同様の操作を行い、さらにSiドープでキャリア濃度5×1018/cm3として、膜厚を120μmとする。これを第2のウェーハ(b)とする。
【0021】
次に第1のウェーハ(a)と第2のウェーハ(b)とを研磨装置に移送し、GaNの表面を数百オングストローム、ポリシングして鏡面状とする。
【0022】
ポリシング後、図2に示すように第1のウェーハGaN層3と、第2のウェーハのGaN層3’とを張り合わせ、耐熱性の治具で強く固定した状態で、アニール装置に移送する。そして窒素雰囲気中20気圧、1100℃において、10分間アニーリングを行う。
【0023】
そして、それらのGaN3、3’層を張り合わせてアニーリングした後、膜厚の薄いGaN層3’を成長させたサファイア基板1’側を先に研磨して除去する。このように異なる膜厚の窒化物半導体層を成長させた場合、薄い膜厚の窒化物半導体を有する基板側を先に研磨すると、研磨途中でウェーハが割れることが少ない傾向にあるので好ましい。除去後の窒化物半導体層の構造が図3である。なお、バッファ層2は低温で成長させた多結晶層を含む層であるので、研磨時にサファイア基板と同様にラッピング除去する。除去後、露出した両方の基板面をポリシングして鏡面状とする。
【0024】
また、異なる膜厚の窒化物半導体層を成長させて、意図的にキャリア濃度の異なる基板を作製しても良い。キャリア濃度の異なる基板が作製できると、例えばキャリア濃度の高いn+層をn電極形成面として、低いn−層をクラッド層とすると、発光効率、受光効率の高い窒化物半導体素子が作製できる。
【0025】
【発明の効果】
以上説明したように、本発明の方法によると非常に簡単な操作で結晶性の良いGaN基板を得ることができる。GaN基板が得られ、この基板の上にp−n接合を有する窒化物半導体層を積層して、例えばLED、LDのような発光素子を実現すると、従来のように同一面側から同一面側から、p電極、n電極を取り出す必要が無く、GaAs、GaP等の半導体素子のように基板側から一方の電極が取り出せるので、チップサイズを小さくできる。さらに基板が窒化物半導体と格子整合しているため、格子欠陥が少ない結晶性の良い窒化物半導体が成長しやすくなるので、LDでは素子の寿命が向上する。さらに、従来では絶縁性基板と窒化物半導体の格子不整合を緩和するために、バッファ層を成長させていたが、GaN基板ができるとバッファ層を成長させる必要が無くなる可能性もある。キャリア濃度の異なる基板を作製することで、例えばキャリア濃度の高いn+層をn電極形成面として、低いn−層をクラッド層とすると、発光効率や受光効率の高い窒化物半導体素子が作製できる結晶性の良い窒化物半導体からなる基板を提供するができる。
【図面の簡単な説明】
【図1】 本発明の方法の一工程において得られるウェーハの構造を示す模式断面図。
【図2】 本発明の方法の一工程において得られるウェーハの構造を示す模式断面図。
【図3】 本発明の方法の一工程において得られるウェーハの構造を示す模式断面図。
【符号の説明】
1、1’・・・・基板
2、2’・・・・バッファ層
3、3’・・・・GaN層[0001]
[Industrial application fields]
The present invention relates to a method for manufacturing a substrate made of a nitride semiconductor (In X Al Y Ga 1-XY N, 0 ≦ X, 0 ≦ Y, X + Y ≦ 1).
[0002]
[Prior art]
In general, when a semiconductor is grown on a substrate, it is known that when a substrate lattice-matched with the semiconductor to be grown is used, the crystal defects of the semiconductor are reduced and the crystallinity is improved. However, nitride semiconductors are generally grown on substrates that do not lattice match with nitride semiconductors such as sapphire, spinel, and silicon carbide, since there are no lattice-matched substrates in the world today.
[0003]
Attempts to produce GaN bulk crystals have been made in various research institutions, but only a few millimeters have been reported yet, and it is far from practical use.
[0004]
As a technique for producing a GaN substrate, for example, in JP-A-7-202265 and JP-A-7-165498, a buffer layer made of ZnO is formed on a sapphire substrate, and a nitride semiconductor is formed on the buffer layer. A technique for dissolving and removing the buffer layer after growth is described.
[0005]
However, the crystallinity of the ZnO buffer layer grown on the sapphire substrate is poor, and it is difficult to obtain a good quality nitride semiconductor even if a nitride semiconductor is grown on the buffer layer. Furthermore, it takes a very long time to dissolve and remove the thin buffer layer made of ZnO, which is difficult to put into practical use.
[0006]
[Problems to be solved by the invention]
The present invention has been made in view of such circumstances, and an object of the present invention is to provide a substrate made of a nitride semiconductor having good crystallinity, which can produce a nitride semiconductor element having high light emission efficiency and light receiving efficiency. It is to provide.
[0007]
[Means for Solving the Problems]
A method for manufacturing a nitride semiconductor substrate having a two-layer structure, which includes a n-type impurity containing a buffer layer selected from GaN, AlN, and AlGaN on a first substrate that is not lattice-matched with a nitride semiconductor. A first wafer on which a semiconductor is grown, a second semiconductor that is not lattice-matched with the nitride semiconductor, and a nitride semiconductor on the first substrate through a buffer layer selected from GaN, AlN, and AlGaN Ri is Do different thickness is a second wafer doped, or the nitride semiconductor containing n-type impurity is grown, the carrier concentration of the nitride semiconductor of the first wafer, the second wafer Preparing a first wafer and a second wafer different from the carrier concentration of the nitride semiconductor, and heating the wafer in a nitrogen atmosphere pressurized to a pressure higher than a decomposition pressure of the nitride semiconductor; The first wafer and the second wafer are bonded to each other with the nitride semiconductors, and then the substrate of either the first wafer or the second wafer, First polishing the substrate side on which the thin nitride semiconductor has been grown to remove the first substrate, the buffer layer on the first substrate, the second substrate, and the buffer layer on the second substrate A nitride semiconductor substrate including an n + layer having a high carrier concentration and an n− layer having a low carrier concentration is formed.
The nitride semiconductor is GaN, and the bonding is preferably performed by heating the wafer at a temperature of 800 ° C. or higher in a nitrogen atmosphere pressurized to 0.01 atm or higher. The first and second substrates are preferably selected from sapphire, spinel, SiC, ZnO, GaAs, Si, and GaP.
[0008]
Furthermore, the nitride semiconductor substrate of the present invention is characterized in that the nitride semiconductor layer is non-doped or doped with n-type impurities at 1 × 10 19 / cm 3 or less.
[0009]
In the nitride semiconductor substrate of the present invention, the n-type impurity is at least one selected from Si, Ge, Sn, and S. Further, the nitride semiconductor layer is characterized in that the half width of the X-ray rocking curve by the biaxial crystal method is 15 minutes or less.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
In the manufacturing method of the present invention, the first substrate and the second substrate on which the nitride semiconductor is grown are substrates on which a conventionally proposed nitride semiconductor can be grown, excluding the substrate made of the nitride semiconductor. Any substrate may be used as long as it is a substrate, for example, sapphire, spinel, SiC, etc. are frequently used, and others include ZnO, GaAs, Si, GaP, etc., and are described in JP-A-2-229475. An oxide substrate lattice-matched to a nitride semiconductor can be used.
[0011]
In order to grow a nitride semiconductor, conventionally known vapor phase growth methods such as MOVPE (metal organic vapor phase epitaxy), MBE (molecular beam vapor phase epitaxy), HVPE (halide vapor phase epitaxy), etc. Can be used.
[0012]
In order to grow a nitride semiconductor on a substrate, it is desirable to first grow a buffer layer of GaN, AlN, AlGaN or the like with a film thickness of 0.1 μm or less in contact with the substrate. The buffer layer is described in detail, for example, in JP-A-4-297023.
[0013]
Next, the nitride semiconductor to be grown on the substrate is most preferably grown by GaN doped with an undoped or n-type impurity at 1 × 10 19 / cm 3 or less. As the n-type impurity, at least one of Group 4 elements such as Si, Ge, Sn, and S is selected, and Si and Ge are particularly preferably used. The nitride semiconductor film is grown to a thickness of 50 μm or more, more preferably 80 μm or more, and most preferably 100 μm or more. The upper limit is not particularly limited, but is preferably 200 μm or less. On the other hand, when the doping amount of the n-type impurity exceeds 1 × 10 19 / cm 3 , it is difficult to grow a nitride semiconductor having a good crystallinity as a substrate. Note that “good crystallinity” means, for example, a nitride semiconductor having a half width of an X-ray rocking curve by a biaxial crystal method of 15 minutes or less.
[0014]
Next, in order to bond the nitride semiconductors grown on the two substrates, it is desirable to use, for example, a wafer bonding method. Wafer bonding is a technique in which the surface of the grown nitride semiconductor is mirror-finished and flat by techniques such as etching and polishing, and then the flat surfaces are bonded together and bonded by pressing and heating. is there. Pressurization can be achieved by fixing using an appropriate jig. When the wafer is bonded in this manner, no other substance is present at the interface between the nitride semiconductor layer and the opposing nitride semiconductor layer, so that the carrier concentration, mobility, resistivity, etc. of both nitride semiconductors are the same. It is easy to obtain a substrate with uniform characteristics. Further, as will be described later, substrates having different carrier concentrations or the like may be produced intentionally.
[0015]
Particularly preferably, in the bonding step, it is desirable to heat the wafer in a nitrogen atmosphere pressurized to a pressure higher than the decomposition pressure of the nitride semiconductor. The heating temperature is 600 ° C. or higher, more preferably 800 ° C. or higher. In the case of GaN, the decomposition pressure of GaN is about 0.01 atm at 800 ° C., about 1 atm at 1000 ° C., and about 10 atm at 1100 ° C. Therefore, when heating in a nitrogen atmosphere while pressurizing at a pressure higher than or equal to the decomposition pressure of GaN, it is possible to prevent N from escaping from GaN and to provide a substrate with a good adhesion state.
[0016]
【Example】
Hereinafter, the present invention will be described in detail with reference to examples. 1 to 3 are schematic sectional views showing the structure of a wafer for explaining the method of the present invention, and each step of the present invention in an embodiment will be described.
[0017]
[Example 1]
As shown in FIG. 1, a
The nitride semiconductor was grown by the MOVPE method as follows.
[0018]
A
[0019]
Subsequently, the temperature is lowered to 510 ° C., hydrogen is used as the carrier gas, ammonia and TMG (trimethyl gallium) are used as the source gas, and a
[0020]
Subsequently, the temperature is increased to 1050 ° C. When the temperature reaches 1050 ° C., a
[0021]
Next, the first wafer (a) and the second wafer (b) are transferred to a polishing apparatus, and the surface of GaN is polished into a mirror surface by polishing several hundred angstroms.
[0022]
After the polishing, as shown in FIG. 2, the first
[0023]
Then, after the
[0024]
Further, it is possible to intentionally produce substrates having different carrier concentrations by growing nitride semiconductor layers having different thicknesses. If substrates having different carrier concentrations can be produced, for example, if an n + layer having a high carrier concentration is used as an n electrode forming surface and a low n− layer is used as a cladding layer, a nitride semiconductor device having high light emission efficiency and light receiving efficiency can be produced.
[0025]
【The invention's effect】
As described above, according to the method of the present invention, a GaN substrate with good crystallinity can be obtained by a very simple operation. When a GaN substrate is obtained and a nitride semiconductor layer having a pn junction is laminated on the substrate to realize a light emitting device such as an LED or LD, the same surface side from the same surface side as in the past is achieved. Therefore, there is no need to take out the p electrode and the n electrode, and one of the electrodes can be taken out from the substrate side like a semiconductor element such as GaAs or GaP, so that the chip size can be reduced. Further, since the substrate is lattice-matched with the nitride semiconductor, a nitride semiconductor with few crystal defects and good crystallinity can be easily grown, so that the lifetime of the element is improved in the LD. Further, conventionally, a buffer layer is grown to alleviate lattice mismatch between the insulating substrate and the nitride semiconductor. However, if a GaN substrate is formed, there is a possibility that the buffer layer need not be grown. By producing substrates with different carrier concentrations, for example, an n + layer having a high carrier concentration can be used as an n electrode formation surface and a low n− layer can be used as a cladding layer. A substrate made of a nitride semiconductor with good properties can be provided.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view showing the structure of a wafer obtained in one step of the method of the present invention.
FIG. 2 is a schematic cross-sectional view showing the structure of a wafer obtained in one step of the method of the present invention.
FIG. 3 is a schematic cross-sectional view showing the structure of a wafer obtained in one step of the method of the present invention.
[Explanation of symbols]
1, 1 '...
Claims (3)
窒化物半導体と格子整合しない第1の基板上に、GaN、AlN、AlGaNから選ばれるバッファ層を介してn型不純物を含有する窒化物半導体が成長された第1のウェーハと、窒化物半導体と格子整合しない第2の基板上に、GaN、AlN、AlGaNから選ばれるバッファ層を介して前記第1の基板上の窒化物半導体とは膜厚が異なり、ノンドープ、若しくはn型不純物を含有する窒化物半導体が成長された第2のウェーハであり、前記第1のウェーハの窒化物半導体のキャリア濃度は、前記第2のウェーハの窒化物半導体のキャリア濃度と異なる第1のウェーハと第2のウェーハとを用意し、
窒化物半導体の分解圧以上に加圧された窒素雰囲気中でウェーハを加熱することにより、前記第1のウェーハと前記第2のウェーハとをそれぞれの窒化物半導体同士を接着し、その後、前記第1のウェーハと前記第2のウェーハのどちらかの基板であって、膜厚の薄い窒化物半導体が成長された基板側を先に研磨して、第1の基板と第1の基板上のバッファ層と第2の基板と第2の基板上のバッファ層とを除去することにより、キャリア濃度が高いn+層とキャリア濃度が低いn−層からなる窒化物半導体基板を形成することを特徴とする窒化物半導体基板の製造方法。A method for manufacturing a nitride semiconductor substrate having a two-layer structure,
A first wafer in which a nitride semiconductor containing an n-type impurity is grown on a first substrate that is not lattice-matched with a nitride semiconductor via a buffer layer selected from GaN, AlN, and AlGaN ; on a second substrate which is not lattice-matched, GaN, AlN, Ri is do different thickness and nitride semiconductor on the first substrate via a buffer layer selected from AlGaN, containing a non-doped or n-type impurity A second wafer on which a nitride semiconductor is grown, wherein the carrier concentration of the nitride semiconductor of the first wafer is different from the carrier concentration of the nitride semiconductor of the second wafer; Prepare the wafer and
By heating the wafer in a nitrogen atmosphere pressurized above the decomposition pressure of the nitride semiconductor, the first wafer and the second wafer are bonded to each other, and then the first semiconductor is bonded. The substrate on either the first wafer or the second wafer on which the thin nitride semiconductor is grown is first polished, and the first substrate and the buffer on the first substrate are polished. By removing the layer, the second substrate, and the buffer layer on the second substrate, a nitride semiconductor substrate including an n + layer having a high carrier concentration and an n− layer having a low carrier concentration is formed. A method for manufacturing a nitride semiconductor substrate.
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US20060138431A1 (en) | 2002-05-17 | 2006-06-29 | Robert Dwilinski | Light emitting device structure having nitride bulk single crystal layer |
JP4663319B2 (en) * | 2002-06-26 | 2011-04-06 | アンモノ・スプウカ・ジ・オグラニチョノン・オドポヴィエドニアウノシツィオン | Method for producing gallium-containing nitride bulk single crystal |
US7387677B2 (en) | 2002-12-11 | 2008-06-17 | Ammono Sp. Z O.O. | Substrate for epitaxy and method of preparing the same |
FR2857983B1 (en) * | 2003-07-24 | 2005-09-02 | Soitec Silicon On Insulator | PROCESS FOR PRODUCING AN EPITAXIC LAYER |
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PL1769105T3 (en) | 2004-06-11 | 2014-11-28 | Ammono S A | Bulk mono-crystalline gallium nitride and method for its preparation |
JP2008297191A (en) * | 2007-05-02 | 2008-12-11 | Sumitomo Electric Ind Ltd | Gallium nitride substrate and gallium nitride film deposition method |
WO2011007483A1 (en) * | 2009-07-14 | 2011-01-20 | 日本電気株式会社 | Vertical transistor, manufacturing method therefor, and semiconductor device |
JP2017114694A (en) * | 2015-12-21 | 2017-06-29 | 信越化学工業株式会社 | Compound semiconductor laminate substrate and method manufacturing the same, and semiconductor element |
JP6978241B2 (en) * | 2017-07-21 | 2021-12-08 | 株式会社サイオクス | GaN substrate |
JP7100309B2 (en) * | 2017-10-12 | 2022-07-13 | 国立大学法人三重大学 | Nitride semiconductor substrate, method for manufacturing nitride semiconductor substrate, equipment for manufacturing nitride semiconductor substrate and nitride semiconductor device |
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