JP4186076B2 - Manufacturing method of nitride semiconductor substrate - Google Patents

Manufacturing method of nitride semiconductor substrate Download PDF

Info

Publication number
JP4186076B2
JP4186076B2 JP2004232804A JP2004232804A JP4186076B2 JP 4186076 B2 JP4186076 B2 JP 4186076B2 JP 2004232804 A JP2004232804 A JP 2004232804A JP 2004232804 A JP2004232804 A JP 2004232804A JP 4186076 B2 JP4186076 B2 JP 4186076B2
Authority
JP
Japan
Prior art keywords
nitride semiconductor
substrate
grown
manufacturing
nitride
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2004232804A
Other languages
Japanese (ja)
Other versions
JP2005008517A (en
Inventor
恵司 坂本
健 桂木
大介 森田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nichia Corp
Original Assignee
Nichia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nichia Corp filed Critical Nichia Corp
Priority to JP2004232804A priority Critical patent/JP4186076B2/en
Publication of JP2005008517A publication Critical patent/JP2005008517A/en
Application granted granted Critical
Publication of JP4186076B2 publication Critical patent/JP4186076B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Description

本発明は、窒化物半導体から成る単結晶基板の製造方法に関し、特に窒化物半導体から異種基板を容易に除去して窒化物半導体基板を得る製造方法に関する。   The present invention relates to a method for manufacturing a single crystal substrate made of a nitride semiconductor, and more particularly to a method for manufacturing a nitride semiconductor substrate by easily removing a heterogeneous substrate from a nitride semiconductor.

近年、窒化物半導体基板は高出力LEDや寿命特性などの良好な素子特性を有する窒化物半導体からなるLDのような発光素子、その他、受光素子や電子デバイス等への用途が高まっている。これら窒化物半導体は、一般式InAlGa1−x−yN(0≦x≦1、0≦y≦1、0≦x+y≦1)で表される。例えば、窒化ガリウムは単結晶の製造が困難であるため異種基板への成長により窒化物半導体基板とする試みがなされているが、窒化ガリウムと格子整合する適当な基板が存在しないため、後工程において異種基板を除去する方法が検討されており、具体例としては、異種基板であるサファイア基板上に厚膜の窒化ガリウムを成長させ、その後、異種基板を研磨による単結晶の製造方法が報告されている。
特開平10−173288号公報 特開2001−168045号公報
In recent years, nitride semiconductor substrates have been increasingly used for light-emitting elements such as high-power LEDs and LDs made of nitride semiconductors having good element characteristics such as life characteristics, as well as light-receiving elements and electronic devices. These nitride semiconductors are represented by the general formula In x Al y Ga 1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). For example, gallium nitride is difficult to produce a single crystal, so an attempt has been made to make a nitride semiconductor substrate by growing on a different substrate, but there is no suitable substrate that lattice matches with gallium nitride, so in a later step A method of removing a heterogeneous substrate has been studied. As a specific example, a method for producing a single crystal by growing a thick gallium nitride on a sapphire substrate, which is a heterogeneous substrate, and then polishing the heterogeneous substrate has been reported. Yes.
Japanese Patent Laid-Open No. 10-173288 JP 2001-168045 A

しかしながら、サファイア基板等は、硬度が高いため研磨時に大きな応力が必要であり、サファイア基板上の窒化ガリウムにも研磨時の応力で欠けや割れが生じるため窒化ガリウムの単体基板を形成するのは困難であった。
また、この問題はハイドライド気相成長法で成長させた窒化ガリウムの膜厚が厚いほど、具体的には100μm以上の膜厚を成長させた場合には、このような問題が顕著に現れていた。
However, since sapphire substrates and the like have high hardness, a large stress is required at the time of polishing, and gallium nitride on the sapphire substrate is also chipped or cracked by the stress at the time of polishing, so it is difficult to form a single substrate of gallium nitride. Met.
In addition, this problem appears more conspicuously when the film thickness of gallium nitride grown by the hydride vapor phase growth method is thicker, specifically when the film thickness is 100 μm or more. .

一方、研磨以外の窒化ガリウムとサファイアを分離する方法としては、例えば、Appl.Phys.Lett.72(5), 2 February 1998 pp.599−601には、サファイア基板上に窒化ガリウムを成長させた後、この成長させた窒化ガリウム面をSiウェハにエポキシを介して固定し、サファイア/窒化ガリウム/エポキシ/Siの構造にした後、サファイア側からKrfパルスエキシマレーザを照射して、サファイアとGaNとが接している共有面で分離し、窒化ガリウムからサファイアを分離する方法が記載されている。
この方法では、レーザ照射により、窒化ガリウムとサファイアが接触している共有面で窒化ガリウムがレーザ光を吸収して窒化ガリウムの分解が生じ、窒化ガリウムからサファイアを分離することができるものであるが、窒化ガリウムの分解によって発生する窒素ガスのガス圧によりサファイアが割れ、この割れが原因でサファイアと接触している窒化ガリウム面に欠陥が生じる。
このような欠陥傷が窒化ガリウム面にあると、例えばマイクロクラックなどの発生を引き起こす場合がある。マイクロクラックが発生すると、発光素子などにおいては寿命特性などの素子特性の低下や、歩留まりの低下等を引き起こすことが考えられる。
On the other hand, as a method of separating gallium nitride and sapphire other than polishing, for example, Appl. Phys. Lett. 72 (5), 2 February 1998 pp. In 599-601, after growing gallium nitride on a sapphire substrate, the grown gallium nitride surface is fixed to an Si wafer via an epoxy to form a sapphire / gallium nitride / epoxy / Si structure, A method is described in which a Krf pulse excimer laser is irradiated from the sapphire side to separate the sapphire from the gallium nitride by separating the sapphire and the GaN on the common surface.
In this method, gallium nitride absorbs laser light on the common surface where gallium nitride and sapphire are in contact with each other by laser irradiation, so that gallium nitride is decomposed and sapphire can be separated from gallium nitride. Sapphire breaks due to the gas pressure of nitrogen gas generated by the decomposition of gallium nitride, and this crack causes defects on the gallium nitride surface in contact with sapphire.
If such defect scratches are present on the gallium nitride surface, for example, the occurrence of microcracks or the like may occur. When a microcrack occurs, it is considered that a light emitting element or the like causes a decrease in element characteristics such as a life characteristic and a decrease in yield.

そこで、本発明の目的は、窒化物半導体を成長させたサファイア等の異種基板を容易に除去して結晶性のいい窒化物半導体基板を得ることのできる窒化物半導体基板の製造方法を提供することである。   Accordingly, an object of the present invention is to provide a method of manufacturing a nitride semiconductor substrate that can easily remove a dissimilar substrate such as sapphire on which a nitride semiconductor is grown to obtain a nitride semiconductor substrate with good crystallinity. It is.

即ち、本発明の目的は、下記(1)〜(6)の構成により達成することができる。
(1) 第1の面と第2の面とを有し窒化物半導体と異なる材料から成る異種基板の第1の面上に、窒化物半導体から成る第1の窒化物半導体を成長させる第1の工程と、前記第1の工程後、前記第1の窒化物半導体との界面がに欠陥同士のループが形成されるように、前記第1の窒化物半導体上に第2の窒化物半導体を成長させる第2の工程と、
前記異種基板の第2の面を研磨して、前記第1の窒化物半導体と第2の窒化物半導体との界面で、該界面の前記異種基板側を剥離させて、前記異種基板を取り除く第3の工程と、
を具備する窒化物半導体基板の製造方法。
(2) 前記第1の窒化物半導体の成長速度(R1)と、第2の窒化物半導体の成長速度(R2)と、の比(R1/R2)が、1より大きい上記(1)に記載の窒化物半導体基板の製造方法。
(3) 前記第1の窒化物半導体は、異種基板上の窒化物半導体のバッファ層上に成長させた下地層を介して成長させる上記(1)又は(2)に記載の窒化物半導体基板の製造方法。
(4) 前記第3の工程において、第2の窒化物半導体表面を土台に加圧して貼り合わせて、基板の反りを抑制した後、研磨する上記(1)乃至(3)に記載の窒化物半導体基板の製造方法。
(5) 前記第3の工程において、土台と第2の窒化物半導体表面とを共晶材料を用いて貼り合わせる上記(4)に記載の窒化物半導体基板の製造方法。
(6) 前記第3の工程において、前記第2の窒化物半導体の剥離した面を研磨して平坦にする上記(1)乃至(5)のいずれか一項に記載の窒化物半導体基板の製造方法。
That is, the object of the present invention can be achieved by the following configurations (1) to (6).
(1) First growing a first nitride semiconductor made of a nitride semiconductor on a first surface of a heterogeneous substrate having a first surface and a second surface and made of a material different from the nitride semiconductor. And after the first step, a second nitride semiconductor is formed on the first nitride semiconductor so that a loop of defects is formed at the interface between the first nitride semiconductor and the first nitride semiconductor. A second step of growing;
The second surface of the foreign substrate is polished, and the foreign substrate side of the interface is peeled off at the interface between the first nitride semiconductor and the second nitride semiconductor to remove the foreign substrate . 3 steps,
A method for manufacturing a nitride semiconductor substrate comprising:
(2) The ratio (R1 / R2) between the growth rate (R1) of the first nitride semiconductor and the growth rate (R2) of the second nitride semiconductor is greater than 1, and is described in (1) above. Of manufacturing a nitride semiconductor substrate.
(3) The nitride semiconductor substrate according to (1) or (2), wherein the first nitride semiconductor is grown via an underlayer grown on a nitride semiconductor buffer layer on a heterogeneous substrate. Production method.
(4) The nitride according to any one of (1) to (3), wherein in the third step, the second nitride semiconductor surface is pressed and bonded to a base to suppress warping of the substrate, and then polished. A method for manufacturing a semiconductor substrate.
(5) The method for manufacturing a nitride semiconductor substrate according to (4), wherein in the third step, the base and the second nitride semiconductor surface are bonded together using a eutectic material.
(6) The manufacturing of the nitride semiconductor substrate according to any one of (1) to (5) , wherein in the third step, the peeled surface of the second nitride semiconductor is polished and flattened. Method.

つまり、本発明は上記の如く、異種基板上に成長させた窒化物半導体を単体として形成する際に、異種基板上に窒化物半導体を少なくとも2層有することにより異種基板を研磨する工程において、単体基板として使用する範囲の窒化物半導体にクラック等を生じさせることなく異種基板を除去することができる。
これは、異種基板上に成長条件の異なる窒化物半導体を成長させることで、窒化物半導体同士の界面に結晶的不均一を有するため、研磨時に生じる窒化物半導体への応力により発生するクラック等が第2の窒化物半導体まで影響を及ぼさず、厚膜成長した窒化物半導体を単体形成することができる。
In other words, as described above, when the nitride semiconductor grown on a heterogeneous substrate is formed as a single body, the present invention provides a simple substance in the step of polishing the heterogeneous substrate by having at least two layers of nitride semiconductor on the heterogeneous substrate. The heterogeneous substrate can be removed without causing cracks or the like in the nitride semiconductor used in the range of the substrate.
This is because, by growing nitride semiconductors with different growth conditions on different substrates, there is a crystal non-uniformity at the interface between the nitride semiconductors. A nitride semiconductor having a thick film growth can be formed alone without affecting the second nitride semiconductor.

以上のように本発明は、異種基板上に成長させた窒化物半導体を割れが生じることなく単体形成するものであり、容易に異種基板の除去が可能となる。   As described above, according to the present invention, a nitride semiconductor grown on a heterogeneous substrate is formed as a single body without causing cracks, and the heterogeneous substrate can be easily removed.

さらに、本発明において、異種基板上の窒化物半導体同士の界面に結晶的な不均一をもたせる方法としては異種基板上に成長させる第1の窒化物半導体と第2の窒化物半導体との成長速度を変えることである。
また、第1の窒化物半導体の成長速度を第2の窒化物半導体の成長速度よりも速くすることで、第2の窒化物半導体との界面となる第1の窒化物半導体の界面付近で転位欠陥がループを作ることができる。これにより、その界面には単位面積当たりの欠陥密度が数桁、具体的には3桁以上も減少する。
Furthermore, in the present invention, as a method of providing crystal nonuniformity at the interface between nitride semiconductors on different substrates, the growth rates of the first nitride semiconductor and the second nitride semiconductor grown on the different substrates are as follows. Is to change.
Further, by making the growth rate of the first nitride semiconductor faster than the growth rate of the second nitride semiconductor, dislocations are generated in the vicinity of the interface of the first nitride semiconductor, which becomes the interface with the second nitride semiconductor. A defect can make a loop. As a result, the defect density per unit area at the interface is reduced by several orders of magnitude, specifically, by three orders of magnitude or more.

また、上記に示すような高速度成長に好ましい成長方法としては、短時間で厚膜成長が可能なハイドライド気相成長法を用いるのが好ましい。   Further, as a preferable growth method for the high-speed growth as described above, it is preferable to use a hydride vapor phase growth method capable of growing a thick film in a short time.

以上より本発明の単体基板の製造方法では、窒化物半導体に滑りを生じることなく、低欠陥かつ厚膜である単体基板を提供することができる。   As described above, the single substrate manufacturing method of the present invention can provide a single substrate having a low defect and a thick film without causing slippage in the nitride semiconductor.

以下に本発明の実施の形態について、実施例に基づき図面を参照して説明する。   Embodiments of the present invention will be described below with reference to the drawings based on examples.

図1は、本発明の実施形態の窒化物半導体から成る単体基板を形成するために異種基板上に下地層を介して第1の窒化物半導体、及び第2の窒化物半導体を成長させた後、この窒化物半導体基板の最上面となる第2の窒化物半導体の表面を土台に貼り合わせ、さらに、異種基板側から研磨を行うことにより異種基板部分を取り除いた窒化物半導体から成る単体基板を形成するものである。
また、この下地層は第1の窒化物半導体層等の成長条件により省略することができる。
以下に本発明の各工程について具体的に説明する。
FIG. 1 shows a state in which a first nitride semiconductor and a second nitride semiconductor are grown on a different substrate via an underlayer to form a single substrate made of a nitride semiconductor according to an embodiment of the present invention. A single substrate made of a nitride semiconductor in which the surface of the second nitride semiconductor, which is the uppermost surface of the nitride semiconductor substrate, is bonded to a base, and the different substrate portion is removed by polishing from the different substrate side. To form.
The underlayer can be omitted depending on the growth conditions of the first nitride semiconductor layer and the like.
Each step of the present invention will be specifically described below.

[第1の工程]
第1の工程は、図1に示されるように、異種基板1上にバッファ層(図示していない。)、下地層2を成長させた後、第1の窒化物半導体3を成長させる工程である。
本発明において、異種基板1としては土台に貼り合わせ研磨時に割れ等を生じないものであれば特に限定されないが、具体例としては、C面、R面、及びA面のいずれかを主面とするサファイアやスピネルのような絶縁性基板、その他、SiC(6H、4H、3Cを含む)、ZnS、ZnO、GaAs、Si、及び窒化物半導体と格子整合する酸化物基板等を用いることができる。
[First step]
As shown in FIG. 1, the first step is a step of growing a first nitride semiconductor 3 after growing a buffer layer (not shown) and an underlayer 2 on a heterogeneous substrate 1. is there.
In the present invention, the heterogeneous substrate 1 is not particularly limited as long as it does not cause cracks or the like when bonded to the base and polished, but as a specific example, any one of the C surface, the R surface, and the A surface is the main surface. In addition, an insulating substrate such as sapphire or spinel, an oxide substrate lattice-matched with SiC (including 6H, 4H, and 3C), ZnS, ZnO, GaAs, Si, and a nitride semiconductor can be used.

次に異種基板1上にバッファ層を成長させ、そのバッファ層上に下地層2を成長させる。
バッファ層としては、AlN、GaN、AlGaN、InGaN等が用いられる。バッファ層は、300℃以上900℃以下の温度で、膜厚を10オングストローム〜0.5μmで成長させる。このように異種基板1上にバッファ層を900℃以下の温度で成長させることにより異種基板上に成長させる窒化物半導体との格子定数不正を緩和させることができる。例えば、窒化ガリウムとサファイアとの格子不整合は約16%と非常に大きいが、このバッファ層を成長させることにより、表面モフォロジーの良好な結晶性を有する基板を得ることができる。
Next, a buffer layer is grown on the heterogeneous substrate 1, and the base layer 2 is grown on the buffer layer.
As the buffer layer, AlN, GaN, AlGaN, InGaN or the like is used. The buffer layer is grown at a temperature of 300 ° C. or more and 900 ° C. or less with a film thickness of 10 Å to 0.5 μm. In this way, by growing the buffer layer on the heterogeneous substrate 1 at a temperature of 900 ° C. or lower, the lattice constant irregularity with the nitride semiconductor grown on the heterogeneous substrate can be mitigated. For example, although the lattice mismatch between gallium nitride and sapphire is as large as about 16%, a substrate having good surface morphology and crystallinity can be obtained by growing this buffer layer.

次にバッファ層上に下地層を成長させる。
下地層2としては窒化物半導体から成る核、または層であり組成式としては特に限定されず、一般式InAlGa1−x−yN(0≦x、0≦y、x+y<1)によって表すことができる。
この下地層の成長条件としては、キャリアガスには水素、原料ガスにはトリメチルガリウム等を用いることができ、成長温度はバッファ層よりも高温で900℃〜1100℃であり、下地層を核として成長させる場合は途中で成長を止め、また層として成長させる場合はさらに成長を続けることでミラーを形成させる。
なお、上記バッファ層、及び下地層は基板の種類等により省略することもできる。
Next, an underlayer is grown on the buffer layer.
The underlayer 2 is a nucleus or layer made of a nitride semiconductor, and is not particularly limited as a composition formula. The general formula In x Al y Ga 1-xy N (0 ≦ x, 0 ≦ y, x + y <1) ).
As the growth conditions of the underlayer, hydrogen can be used as the carrier gas, trimethylgallium or the like can be used as the source gas, the growth temperature is 900 ° C. to 1100 ° C. higher than the buffer layer, and the underlayer is the nucleus. When growing, the growth is stopped in the middle, and when growing as a layer, the growth is further continued to form a mirror.
Note that the buffer layer and the base layer may be omitted depending on the type of the substrate.

次に、前記基板上に第1の窒化物半導体を成長させる。
第1の窒化物半導体の成長速度は好ましくは0.5mm/時間以上であり、より好ましくは1mm/時間以上とし、上限は100mm/時間以下とする。この範囲であれば、第1の窒化物半導体と第2の窒化物半導体との界面付近で結晶欠陥を減少させることができる。
Next, a first nitride semiconductor is grown on the substrate.
The growth rate of the first nitride semiconductor is preferably 0.5 mm / hour or more, more preferably 1 mm / hour or more, and the upper limit is 100 mm / hour or less. Within this range, crystal defects can be reduced near the interface between the first nitride semiconductor and the second nitride semiconductor.

また、第1の窒化物半導体の膜厚としては特に限定されず、30μm以上であればよく、第1の窒化物半導体には、アンドープの窒化物半導体、n型不純物としてSi、Ge、Sn及びS等の少なくとも一種類をドープした窒化物半導体、又はMg等のp型不純物をドープした窒化物半導体を用いることができる。
さらに、第1の窒化物半導体の組成式としては特に限定されず、一般式InAlGa1−x−yN(0≦x、0≦y、x+y<1)によって表すことができる。
Further, the film thickness of the first nitride semiconductor is not particularly limited and may be 30 μm or more. The first nitride semiconductor includes an undoped nitride semiconductor, Si, Ge, Sn and n-type impurities. A nitride semiconductor doped with at least one kind such as S or a nitride semiconductor doped with a p-type impurity such as Mg can be used.
Further, the composition formula of the first nitride semiconductor is not particularly limited, and can be represented by the general formula In x Al y Ga 1-xy N (0 ≦ x, 0 ≦ y, x + y <1).

第1の窒化物半導体3を成長させる方法としては気相成長法などが挙げられ、上記に示す成長速度で窒化物半導体を成長させるにはハイドライド気相成長法(以下、HVPE法と略す。)によって成長させるのが好ましい。
以下にHVPE装置を用いた場合の成長工程、及び成長条件を示す。
Examples of a method for growing the first nitride semiconductor 3 include a vapor phase growth method and the like, and a hydride vapor phase growth method (hereinafter abbreviated as HVPE method) is used to grow a nitride semiconductor at the growth rate shown above. It is preferable to grow by.
The growth process and growth conditions when using the HVPE apparatus are shown below.

HVPE装置内に、Gaメタルを入れた石英ボートを設置し、さらに石英ボートから離れた位置に第1の窒化物半導体を成長させるための基板を設置する。この基板は異種基板でも、窒化物半導体を成長させた異種基板でもよい。次にGaメタルと反応させるハロゲンガスと、ハロゲンガス供給管とは別にN源供給管とを設ける。   A quartz boat containing Ga metal is installed in the HVPE apparatus, and a substrate for growing the first nitride semiconductor is installed at a position away from the quartz boat. This substrate may be a heterogeneous substrate or a heterogeneous substrate on which a nitride semiconductor is grown. Next, a halogen gas to be reacted with Ga metal and an N source supply pipe are provided separately from the halogen gas supply pipe.

ハロゲンガスとしてはHCl等があり、キャリアガスと共にハロゲンガス管より導入される。このハロゲンガスとGa等の金属が反応することにより3族元素のハロゲン化物を生成させ、N源供給管より流したアンモニアガスと反応することにより窒化物半導体を基板上に成長させることができる。   The halogen gas includes HCl and the like, and is introduced from the halogen gas pipe together with the carrier gas. The halogen gas reacts with a metal such as Ga to generate a halide of a group 3 element, and a nitride semiconductor can be grown on the substrate by reacting with the ammonia gas flowed from the N source supply pipe.

[第2の工程]
次に、第2の工程では、第1の工程において第1の窒化物半導体を成長させた基板上に第2の窒化物半導体4を成長させる。
第2の窒化物半導体4としては、第1の窒化物半導体3との界面に結晶的な不均一を有するものであればよく、例えば欠陥密度の大幅に異なるものが挙げられる。第1の窒化物半導体と第2の窒化物半導体との界面に欠陥密度差を有することにより、後の工程において研磨時に第2の窒化物半導体に割れを生じることなく容易に異種基板を除去することができる。
[Second step]
Next, in the second step, the second nitride semiconductor 4 is grown on the substrate on which the first nitride semiconductor is grown in the first step.
The second nitride semiconductor 4 only needs to have crystal non-uniformity at the interface with the first nitride semiconductor 3, and examples thereof include those having greatly different defect densities. By having a defect density difference at the interface between the first nitride semiconductor and the second nitride semiconductor, the heterogeneous substrate can be easily removed without causing cracks in the second nitride semiconductor during polishing in a later process. be able to.

本発明では、界面に応力差を形成するために第1の窒化物半導体と第2の窒化物半導体との成長速度を変えることにより、まず第1の窒化物半導体の成長時に転位する欠陥を収束させ、第2の窒化物半導体の成長時にループを形成することにより第1の窒化物半導体と第2の窒化物半導体との界面には欠陥の密度差が生じる。この転位欠陥の密度差は単位面積当たりの差が2桁以上あればよく、好ましくは3桁以上とする。
また、界面に応力差を生じさせるためには、その他の反応条件である成長温度差などを有するものが挙げられる。
In the present invention, by changing the growth rate of the first nitride semiconductor and the second nitride semiconductor in order to form a stress difference at the interface, first, the defects that are dislocated during the growth of the first nitride semiconductor are converged. By forming a loop during the growth of the second nitride semiconductor, a difference in defect density occurs at the interface between the first nitride semiconductor and the second nitride semiconductor. The difference in density of dislocation defects is sufficient if the difference per unit area is 2 digits or more, and preferably 3 digits or more.
Moreover, in order to produce a stress difference in an interface, what has the growth temperature difference etc. which are other reaction conditions is mentioned.

第2の窒化物半導体としては、高速度成長により得られた第1の窒化物半導体の表面より成長させ、膜厚は薄膜として形成する場合は30μm以上であればよく、また、第2の窒化物半導体の成長時に転位欠陥同士のループが形成できるものであればよい。そのため、HVPE法の他に、MOCVD法やMBE法でも行うことができる。
さらに、第1の窒化物半導体と第2の窒化物半導体との界面に結晶的な不均一を有するために、第2の窒化物半導体は100μm以上の膜厚で成長させても後の工程における研磨時に発生していた窒化物半導体で、例えば窒化ガリウムC面方向の層状の割れを防止することができるため、300μm以上の膜厚で第2の窒化物半導体を成長させることができる。
The second nitride semiconductor may be grown from the surface of the first nitride semiconductor obtained by high-speed growth, and the film thickness may be 30 μm or more when formed as a thin film. Any material that can form a loop of dislocation defects during growth of a physical semiconductor may be used. Therefore, in addition to the HVPE method, the MOCVD method or the MBE method can be used.
Furthermore, since there is a crystal nonuniformity at the interface between the first nitride semiconductor and the second nitride semiconductor, even if the second nitride semiconductor is grown to a film thickness of 100 μm or more, Since the nitride semiconductor generated at the time of polishing can prevent, for example, layered cracks in the gallium nitride C-plane direction, the second nitride semiconductor can be grown with a thickness of 300 μm or more.

また、第2の窒化物半導体には、第1の窒化物半導体と同様にアンドープの窒化物半導体や、n型不純物、p型不純物をドープした窒化物半導体を用いることができる。n型不純物としては、Si、Ge、及びS等であり、p型不純物としてはMg、Be、Cr、Mn、Ca、Zn等が挙げられる。組成式は、一般式InAlGa1−x−yN(0≦x、0≦y、x+y<1)によって表すことができる。 As the second nitride semiconductor, an undoped nitride semiconductor or a nitride semiconductor doped with an n-type impurity or a p-type impurity can be used as in the case of the first nitride semiconductor. Examples of the n-type impurity include Si, Ge, and S, and examples of the p-type impurity include Mg, Be, Cr, Mn, Ca, and Zn. The composition formula can be represented by the general formula In x Al y Ga 1-xy N (0 ≦ x, 0 ≦ y, x + y <1).

[第3の工程]
次に、第2の窒化物半導体を成長させた後、第2の窒化物半導体の最上面を土台に貼り付けて固定させ、異種基板の第2の面側から研磨を行うことにより、図2に示すように、異種基板を取り除き窒化物半導体から成る単体基板を得る。
[Third step]
Next, after the second nitride semiconductor is grown, the uppermost surface of the second nitride semiconductor is attached to the base and fixed, and polishing is performed from the second surface side of the dissimilar substrate. As shown in FIG. 4, a single substrate made of a nitride semiconductor is obtained by removing the heterogeneous substrate.

第2の工程で得られた基板の窒化物半導体側の最上面である第2の窒化物半導体4表面を土台に貼り合わせる。
ここで、貼り合わせに用いる共晶材料としてはAu合金があり、具体例としてAu−Sn、Au−SiやAu−Ge、その他にZnを用いることができ、さらに治具などで加圧することにより基板の反りを抑制させる。
The surface of the second nitride semiconductor 4 which is the uppermost surface on the nitride semiconductor side of the substrate obtained in the second step is bonded to the base.
Here, the eutectic material used for the bonding is Au alloy, and as a specific example, Au—Sn, Au—Si, Au—Ge, Zn can be used, and further by pressurizing with a jig or the like. Reduces the warping of the substrate.

その後、異種基板側を研磨することにより異種基板部分を除去させる。第1の窒化物半導体と第2の窒化物半導体との界面に応力差を有するため、異種基板の研磨時にこの界面で異種基板側と、第2の窒化物半導体側とを剥離させることができる。
得られた第2の窒化物半導体の剥離された面をさらに研磨することにより平坦、かつ鏡面である窒化物半導体基板とし、さらに上記で使用した共晶材料を加熱除去し、酸洗浄することにより単体として得ることができる。
得られた単体基板は、単位面積あたりの欠陥数が5×10個/cm以下の低欠陥密度である窒化物半導体基板となる。
以下に本発明の実施例を説明する。
Thereafter, the heterogeneous substrate portion is removed by polishing the heterogeneous substrate side. Since there is a difference in stress at the interface between the first nitride semiconductor and the second nitride semiconductor, the foreign substrate side and the second nitride semiconductor side can be separated at this interface when polishing the foreign substrate. .
By further polishing the peeled surface of the obtained second nitride semiconductor, a nitride semiconductor substrate having a flat and mirror surface is obtained, and further, the eutectic material used above is removed by heating and acid cleaning is performed. It can be obtained as a single unit.
The obtained single substrate becomes a nitride semiconductor substrate having a low defect density of 5 × 10 6 defects / cm 2 or less per unit area.
Examples of the present invention will be described below.

図1に示すように、異種基板1としてC面を主面、オリフラ面をA面とするサファイア基板を用い、MOCVD装置にセットし、温度1050℃で10分間のサーマルクリーニングを行い水分や表面の付着物を除去した。   As shown in FIG. 1, a sapphire substrate having a C surface as a main surface and an orientation flat surface as an A surface is used as a heterogeneous substrate 1, set in an MOCVD apparatus, and subjected to thermal cleaning at a temperature of 1050 ° C. for 10 minutes, The deposit was removed.

次に、温度を510℃にして、キャリアガスに水素、原料ガスにアンモニアとトリメチルガリウムを用い、GaNより成るバッファー層を200オングストロームの膜厚で成長させた。   Next, the temperature was set to 510 ° C., hydrogen was used as the carrier gas, ammonia and trimethyl gallium were used as the source gas, and a buffer layer made of GaN was grown to a thickness of 200 Å.

その後、下地層2としてGaNから成り平坦性を有する層を成長温度1050℃で膜厚20μmで形成した。本実施例では、成長時のキャリアガスとして水素を20.5L/分、原料ガスとしてアンモニアを5L/分、トリメチルガリウムを25cc/分間、流した。   Thereafter, a flat layer made of GaN and having a film thickness of 20 μm was formed at a growth temperature of 1050 ° C. as the underlayer 2. In this example, hydrogen was supplied at 20.5 L / min as a carrier gas during growth, ammonia was supplied at 5 L / min, and trimethylgallium was supplied at 25 cc / min as a source gas.

下地層2を成長後、ハイドライド気相エピタキシャル成長装置にセットし、Gaメタルを石英ボートに用意し、ハロゲンガスにHClガスを用いることによりGaClを生成し、次に、Nガスであるアンモニアガスと反応させ、アンドープGaNよりなる第1の窒化物半導体3を成長させた。
第1の窒化物半導体の成長温度としては1000℃であり、成長速度を1mm/hourとして、膜厚100μmで成長させた。
After the underlayer 2 is grown, it is set in a hydride vapor phase epitaxial growth apparatus, Ga metal is prepared in a quartz boat, and HCl gas is used as a halogen gas to produce GaCl 3. Next, ammonia gas that is N gas and The first nitride semiconductor 3 made of undoped GaN was grown by reaction.
The growth temperature of the first nitride semiconductor was 1000 ° C., the growth rate was 1 mm / hour, and the film was grown at a film thickness of 100 μm.

次に、第1の窒化物半導体3上に、第2の窒化物半導体4を第1の窒化物半導体と同様にHVPE装置において成長させた。成長条件としては、成長温度を第2の窒化物半導体3と同温とし、第2の窒化物半導体の成長速度を50μm/hourで膜厚は300μmで成長させた。   Next, the second nitride semiconductor 4 was grown on the first nitride semiconductor 3 in the HVPE apparatus in the same manner as the first nitride semiconductor. The growth conditions were such that the growth temperature was the same as that of the second nitride semiconductor 3, the growth rate of the second nitride semiconductor was 50 μm / hour, and the film thickness was 300 μm.

以上により得られた第2の窒化物半導体の表面は平坦かつ鏡面となり、図3に示すようにCL観察によると貫通転位密度は単位面積あたり約1×10個/cmであり、低欠陥である窒化物半導体基板を形成することができた。 The surface of the second nitride semiconductor obtained as described above is flat and mirror-like. As shown in FIG. 3, according to CL observation, the threading dislocation density is about 1 × 10 6 / cm 2 per unit area. It was possible to form a nitride semiconductor substrate.

次に、上記窒化物半導体の最上面である第2の窒化物半導体面を共晶材料にAu−Snを用い土台となるサファイア基板に貼り合わせ、加圧することにより反りを緩和させた。その後、窒化物半導体のサファイア基板側から研磨加工を行うことにより、サファイア基板を除去した。研磨時に発生するGaNのC面方向の層状の割れは第1の窒化物半導体と第2の窒化物半導体との界面で抑制されるため、サファイア基板を取り除いた後、さらに研磨を行い第1の窒化物半導体を除去することにより、第2の窒化物半導体の第1の窒化物半導体との界面側(以下、第2の窒化物半導体の第2面と示す。)を平坦化し鏡面を得ることができた。この第2の窒化物半導体の第2面のCL観察図を図4に示す。   Next, the second nitride semiconductor surface, which is the uppermost surface of the nitride semiconductor, was bonded to a sapphire substrate as a base using Au-Sn as a eutectic material, and the warpage was alleviated by applying pressure. Then, the sapphire substrate was removed by polishing from the sapphire substrate side of the nitride semiconductor. Since the layered crack in the C-plane direction of GaN generated during polishing is suppressed at the interface between the first nitride semiconductor and the second nitride semiconductor, the first sapphire substrate is removed and further polishing is performed. By removing the nitride semiconductor, the interface side of the second nitride semiconductor with the first nitride semiconductor (hereinafter referred to as the second surface of the second nitride semiconductor) is planarized to obtain a mirror surface. I was able to. FIG. 4 shows a CL observation view of the second surface of the second nitride semiconductor.

実施例1において、図1に示すようにC面を主面としたサファイア基板1上に下地層2を核として膜厚を0.5μmで成長させた他は第1の窒化物半導体3、及び第2の窒化物半導体4を実施例1と同様の条件で成長させ窒化物半導体基板を得た。
得られた窒化物半導体基板はCL方法により観察すると、実施例1と同様に結晶欠陥が4×10/cm程度の低欠陥である窒化物半導体基板となる。
In Example 1, as shown in FIG. 1, the first nitride semiconductor 3 except that the base layer 2 was grown as a nucleus and the film thickness was 0.5 μm on the sapphire substrate 1 having the C surface as the main surface, and The second nitride semiconductor 4 was grown under the same conditions as in Example 1 to obtain a nitride semiconductor substrate.
When the obtained nitride semiconductor substrate is observed by the CL method, it becomes a nitride semiconductor substrate having crystal defects as low as about 4 × 10 6 / cm 2 as in Example 1.

次に、得られた窒化物半導体基板を土台に貼り合わせ、サファイア基板側から研磨を行うことにより、実施例1と同様に第2面も鏡面を有する単体基板が得られる。   Next, the obtained nitride semiconductor substrate is bonded to the base and polished from the sapphire substrate side, so that a single substrate having a mirror surface on the second surface is obtained as in the first embodiment.

本発明は、窒化物半導体から成る単結晶基板の製造方法に関し、特に窒化物半導体から異種基板を容易に除去して窒化物半導体基板を得る製造方法に関する。   The present invention relates to a method for manufacturing a single crystal substrate made of a nitride semiconductor, and more particularly to a method for manufacturing a nitride semiconductor substrate by easily removing a heterogeneous substrate from a nitride semiconductor.

本発明の一実施の形態を示す窒化物半導体の模式断面図である。1 is a schematic cross-sectional view of a nitride semiconductor showing an embodiment of the present invention. 本発明の一実施の形態を示す窒化物半導体の模式断面図である。1 is a schematic cross-sectional view of a nitride semiconductor showing an embodiment of the present invention. 本発明の実施例1におけるCL写真である。It is CL photograph in Example 1 of this invention. 本発明の実施例1におけるCL写真である。It is CL photograph in Example 1 of this invention.

符号の説明Explanation of symbols

1・・・異種基板
2・・・下地層
3・・・第1の窒化物半導体
4・・・第2の窒化物半導体
DESCRIPTION OF SYMBOLS 1 ... Dissimilar board | substrate 2 ... Underlayer 3 ... 1st nitride semiconductor 4 ... 2nd nitride semiconductor

Claims (6)

第1の面と第2の面とを有し窒化物半導体と異なる材料から成る異種基板の第1の面上に、窒化物半導体から成る第1の窒化物半導体を成長させる第1の工程と、前記第1の工程後、前記第1の窒化物半導体との界面に欠陥同士のループが形成されるように、前記第1の窒化物半導体上に第2の窒化物半導体を成長させる第2の工程と、
前記異種基板の第2の面を研磨して、前記第1の窒化物半導体と第2の窒化物半導体との界面で、該界面の前記異種基板側を剥離させて、前記異種基板を取り除く第3の工程と、
を具備する窒化物半導体基板の製造方法。
A first step of growing a first nitride semiconductor made of a nitride semiconductor on a first surface of a heterogeneous substrate having a first surface and a second surface and made of a material different from the nitride semiconductor; After the first step, a second nitride semiconductor is grown on the first nitride semiconductor so that a loop of defects is formed at the interface with the first nitride semiconductor. And the process of
The second surface of the foreign substrate is polished, and the foreign substrate side of the interface is peeled off at the interface between the first nitride semiconductor and the second nitride semiconductor to remove the foreign substrate . 3 steps,
A method for manufacturing a nitride semiconductor substrate comprising:
前記第1の窒化物半導体の成長速度(R1)と、第2の窒化物半導体の成長速度(R2)と、の比(R1/R2)が、1より大きい請求項1に記載の窒化物半導体基板の製造方法。 The nitride semiconductor according to claim 1, wherein a ratio (R1 / R2) of a growth rate (R1) of the first nitride semiconductor to a growth rate (R2) of the second nitride semiconductor is larger than 1. A method for manufacturing a substrate. 前記第1の窒化物半導体は、異種基板上の窒化物半導体のバッファ層上に成長させた下地層を介して成長させる請求項1又は2に記載の窒化物半導体基板の製造方法。 3. The method of manufacturing a nitride semiconductor substrate according to claim 1, wherein the first nitride semiconductor is grown via an underlayer grown on a nitride semiconductor buffer layer on a different substrate. 前記第3の工程において、第2の窒化物半導体表面を土台に加圧して貼り合わせて、基板の反りを抑制した後、研磨する請求項1乃至3に記載の窒化物半導体基板の製造方法。 4. The method for manufacturing a nitride semiconductor substrate according to claim 1, wherein in the third step, the surface of the second nitride semiconductor is pressed and bonded to a base to suppress warping of the substrate and then polished. 5. 前記第3の工程において、土台と第2の窒化物半導体表面とを共晶材料を用いて貼り合わせる請求項4に記載の窒化物半導体基板の製造方法。 The method for manufacturing a nitride semiconductor substrate according to claim 4, wherein in the third step, the base and the second nitride semiconductor surface are bonded together using a eutectic material. 前記第3の工程において、前記第2の窒化物半導体の剥離した面を研磨して平坦にする請求項1乃至5のいずれか一項に記載の窒化物半導体基板の製造方法。 Wherein in the third step, the nitride semiconductor substrate manufacturing method according to any one of claims 1 to 5 in a flat and polished exfoliated surface of the second nitride semiconductor.
JP2004232804A 2004-08-09 2004-08-09 Manufacturing method of nitride semiconductor substrate Expired - Fee Related JP4186076B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004232804A JP4186076B2 (en) 2004-08-09 2004-08-09 Manufacturing method of nitride semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004232804A JP4186076B2 (en) 2004-08-09 2004-08-09 Manufacturing method of nitride semiconductor substrate

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2001032064A Division JP3946448B2 (en) 2001-02-08 2001-02-08 Manufacturing method of nitride semiconductor substrate

Publications (2)

Publication Number Publication Date
JP2005008517A JP2005008517A (en) 2005-01-13
JP4186076B2 true JP4186076B2 (en) 2008-11-26

Family

ID=34101416

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004232804A Expired - Fee Related JP4186076B2 (en) 2004-08-09 2004-08-09 Manufacturing method of nitride semiconductor substrate

Country Status (1)

Country Link
JP (1) JP4186076B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5931583B2 (en) * 2012-05-18 2016-06-08 株式会社半導体エネルギー研究所 Method for manufacturing semiconductor device

Also Published As

Publication number Publication date
JP2005008517A (en) 2005-01-13

Similar Documents

Publication Publication Date Title
JP4849296B2 (en) GaN substrate
JP4862442B2 (en) Method for manufacturing group III-V nitride semiconductor substrate and method for manufacturing group III-V nitride device
JP4335187B2 (en) Nitride semiconductor device manufacturing method
JP4529846B2 (en) III-V nitride semiconductor substrate and method for manufacturing the same
JP4696935B2 (en) III-V nitride semiconductor substrate and III-V nitride light emitting device
JP4597259B2 (en) Group III nitride semiconductor growth substrate, group III nitride semiconductor epitaxial substrate, group III nitride semiconductor device, group III nitride semiconductor free-standing substrate, and methods of manufacturing the same
JP2002284600A (en) Method for manufacturing gallium nitride crystal substrate and the same
JP4622447B2 (en) Method for manufacturing group III nitride crystal substrate
JP4672753B2 (en) GaN-based nitride semiconductor free-standing substrate manufacturing method
US20070215901A1 (en) Group III-V nitride-based semiconductor substrate and method of fabricating the same
JPH111399A (en) Production of gallium nitride semiconductor single crystal substrate and gallium nitride diode produced by using the substrate
US20080230780A1 (en) Group III Nitride Semiconductor Multilayer Structure
JP2003069075A (en) Gallium nitride compound semiconductor device
JP4734786B2 (en) Gallium nitride compound semiconductor substrate and manufacturing method thereof
JP5073624B2 (en) Method for growing zinc oxide based semiconductor and method for manufacturing semiconductor light emitting device
TWI510667B (en) A composite substrate, a manufacturing method thereof, a functional element and a seed crystal substrate
JP4165030B2 (en) Method for manufacturing single substrate made of nitride semiconductor
US9834863B2 (en) Group III nitride bulk crystals and fabrication method
JP4633962B2 (en) Manufacturing method of nitride semiconductor substrate
JP2009023853A (en) Group iii-v nitride semiconductor substrate, method for manufacturing the same, and group iii-v nitride semiconductor device
KR100586940B1 (en) Method of producing a gallium nitride based singlecrystal substrate
JP3946448B2 (en) Manufacturing method of nitride semiconductor substrate
JP2011037704A (en) Method for manufacturing group iii nitride crystal substrate
JP4186076B2 (en) Manufacturing method of nitride semiconductor substrate
JP4099107B2 (en) Semiconductor device

Legal Events

Date Code Title Description
A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20071204

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080204

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20080520

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080722

A911 Transfer of reconsideration by examiner before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20080728

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20080813

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20080826

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110919

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110919

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110919

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110919

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120919

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120919

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130919

Year of fee payment: 5

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees