JP6748671B2 - テストプログラムフロー制御 - Google Patents

テストプログラムフロー制御 Download PDF

Info

Publication number
JP6748671B2
JP6748671B2 JP2018084431A JP2018084431A JP6748671B2 JP 6748671 B2 JP6748671 B2 JP 6748671B2 JP 2018084431 A JP2018084431 A JP 2018084431A JP 2018084431 A JP2018084431 A JP 2018084431A JP 6748671 B2 JP6748671 B2 JP 6748671B2
Authority
JP
Japan
Prior art keywords
test
flows
program
control server
dut
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2018084431A
Other languages
English (en)
Japanese (ja)
Other versions
JP2018200305A (ja
JP2018200305A5 (cg-RX-API-DMAC7.html
Inventor
ナホム ロテム
ナホム ロテム
トイ レベッカ
トイ レベッカ
ファン ボイラム
ファン ボイラム
リュー ジュンツォン
リュー ジュンツォン
チェン レオン
チェン レオン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of JP2018200305A publication Critical patent/JP2018200305A/ja
Publication of JP2018200305A5 publication Critical patent/JP2018200305A5/ja
Application granted granted Critical
Publication of JP6748671B2 publication Critical patent/JP6748671B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2834—Automated test systems [ATE]; using microprocessors or computers
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2868—Complete testing stations; systems; procedures; software aspects
    • G01R31/287—Procedures; Software aspects

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Environmental & Geological Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Quality & Reliability (AREA)
  • Software Systems (AREA)
JP2018084431A 2017-04-28 2018-04-25 テストプログラムフロー制御 Active JP6748671B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/582,137 US10451668B2 (en) 2017-04-28 2017-04-28 Test program flow control
US15/582,137 2017-04-28

Publications (3)

Publication Number Publication Date
JP2018200305A JP2018200305A (ja) 2018-12-20
JP2018200305A5 JP2018200305A5 (cg-RX-API-DMAC7.html) 2019-06-27
JP6748671B2 true JP6748671B2 (ja) 2020-09-02

Family

ID=63917144

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018084431A Active JP6748671B2 (ja) 2017-04-28 2018-04-25 テストプログラムフロー制御

Country Status (5)

Country Link
US (1) US10451668B2 (cg-RX-API-DMAC7.html)
JP (1) JP6748671B2 (cg-RX-API-DMAC7.html)
KR (1) KR102481257B1 (cg-RX-API-DMAC7.html)
CN (1) CN109031086B (cg-RX-API-DMAC7.html)
TW (1) TWI759466B (cg-RX-API-DMAC7.html)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR200490761Y1 (ko) * 2019-01-16 2020-02-11 제이제이티솔루션 주식회사 Ssd 테스트 장비용 도킹 어셈블리 및 이를 포함하는 ssd 테스트 장비
CN112115013A (zh) 2019-06-21 2020-12-22 昆山纬绩资通有限公司 测试数据汇总系统与其方法
US11860229B2 (en) 2020-03-05 2024-01-02 Advantest Corporation Device interface board supporting devices with multiple different standards to interface with the same socket
US12320851B2 (en) 2020-03-05 2025-06-03 Advantest Corporation Software and firmware support for device interface board configured to allow devices supporting multiple different standards to interface with the same socket
DE112020007444T5 (de) * 2020-07-21 2023-06-15 Advantest Corporation Automatische Testeinrichtung, Prozess und Computerprogramm zum Testen eines oder mehrerer zu testender Geräte, wobei unterschiedliche Testaktivitäten Teilsätze von Ressourcen des zu testenden Geräts nutzen
CN112649717B (zh) * 2020-09-15 2024-07-26 深圳市几米物联有限公司 一种测试方法、装置、终端设备及存储介质
CN114474149B (zh) * 2021-12-21 2024-04-05 深圳优地科技有限公司 自动化测试方法、装置、服务器及可读存储介质
CN115617665A (zh) * 2022-10-21 2023-01-17 道普信息技术有限公司 一种基于流程引擎和jmeter的性能测试方法及系统
TWI813505B (zh) * 2022-11-15 2023-08-21 瑞昱半導體股份有限公司 使用複數種儀器以進行複數種電路測試的方法以及建立可用於複數種儀器之通用格式檔案的方法

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2944256B2 (ja) * 1991-06-10 1999-08-30 三菱電機株式会社 デバッグ用プログラム作成方法
JPH1139180A (ja) * 1997-07-16 1999-02-12 Mitsubishi Electric Corp 半導体デバイステストシステムおよびそのサーバ装置
US6205407B1 (en) * 1998-02-26 2001-03-20 Integrated Measurement Systems, Inc. System and method for generating test program code simultaneously with data produced by ATPG or simulation pattern capture program
US6978410B1 (en) * 1999-09-25 2005-12-20 Advantest Corp. Test language conversion method
CN1243341C (zh) * 2001-03-22 2006-02-22 株式会社鼎新 测试语言转换方法
US6788077B2 (en) 2001-12-20 2004-09-07 Abb Inc. Automated test sequence editor and engine for transformer testing
US7379860B1 (en) 2002-03-29 2008-05-27 Cypress Semiconductor Corporation Method for integrating event-related information and trace information
TW200817931A (en) 2006-07-10 2008-04-16 Asterion Inc System and method for performing processing in a testing system
JP4779906B2 (ja) * 2006-09-21 2011-09-28 横河電機株式会社 Ｌｓｉテストシステム
JP2008139137A (ja) * 2006-12-01 2008-06-19 Yokogawa Electric Corp 試験装置及びそのデバッグシステム
US7587293B2 (en) * 2007-05-09 2009-09-08 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor CP (circuit probe) test management system and method
US20090112548A1 (en) 2007-10-30 2009-04-30 Conner George W A method for testing in a reconfigurable tester
US20090113245A1 (en) 2007-10-30 2009-04-30 Teradyne, Inc. Protocol aware digital channel apparatus
JP5115208B2 (ja) * 2008-01-21 2013-01-09 富士通株式会社 測定／試験アクセス制御装置及び方法並びにそのプログラム
US8078424B2 (en) * 2008-09-29 2011-12-13 Advantest Corporation Test apparatus
US8775884B2 (en) * 2009-03-04 2014-07-08 Alcatel Lucent Method and apparatus for position-based scheduling for JTAG systems
WO2011025817A1 (en) 2009-08-26 2011-03-03 Bae Systems National Security Solutions Inc. Synthetic instrument unit
JP2012167958A (ja) * 2011-02-10 2012-09-06 Nippon Syst Wear Kk 試験情報表示装置、方法、プログラム、および該ソフトウェアを格納したコンピュータ可読媒体
US10048304B2 (en) * 2011-10-25 2018-08-14 Teradyne, Inc. Test system supporting simplified configuration for controlling test block concurrency
US9910086B2 (en) 2012-01-17 2018-03-06 Allen Czamara Test IP-based A.T.E. instrument architecture
US20140236527A1 (en) * 2013-02-21 2014-08-21 Advantest Corporation Cloud based infrastructure for supporting protocol reconfigurations in protocol independent device testing systems
US9952276B2 (en) * 2013-02-21 2018-04-24 Advantest Corporation Tester with mixed protocol engine in a FPGA block
US20140237292A1 (en) * 2013-02-21 2014-08-21 Advantest Corporation Gui implementations on central controller computer system for supporting protocol independent device testing
US9310427B2 (en) * 2013-07-24 2016-04-12 Advantest Corporation High speed tester communication interface between test slice and trays
TWI538444B (zh) * 2013-09-14 2016-06-11 Chunghwa Telecom Co Ltd IPv6 CE standard automated test system

Also Published As

Publication number Publication date
CN109031086B (zh) 2023-04-25
CN109031086A (zh) 2018-12-18
KR20180121408A (ko) 2018-11-07
JP2018200305A (ja) 2018-12-20
US10451668B2 (en) 2019-10-22
TW201842447A (zh) 2018-12-01
KR102481257B1 (ko) 2022-12-23
TWI759466B (zh) 2022-04-01
US20180313891A1 (en) 2018-11-01

Similar Documents

Publication Publication Date Title
JP6748671B2 (ja) テストプログラムフロー制御
KR102479320B1 (ko) 상이한 애플리케이션을 사용하는 복수의 사용자를 지원하기 위한 시험 시스템
JP6761441B2 (ja) ソフトウェアアプリケーションプログラミングインタフェース（ａｐｉ）を用いた自動テスト機能のユーザによる制御
CN105378493B (zh) 用于支持协议无关器件测试系统中协议重新配置的基于云的基础设施
TW201433802A (zh) 在中央控制器電腦系統上用以支援協定獨立元件測試之圖形使用者介面實施態樣技術
US20180267101A1 (en) Test architecture with a small form factor test board for rapid prototyping
CN105143895B (zh) 从交互式图形用户界面中自动生成测试类预编译头
JP2020101519A (ja) ソリッドステートデバイス（ｓｓｄ）の変則セクタサイズおよびプロテクションモードのための自動テスト装置（ａｔｅ）サポートフレームワーク
JP2009116876A (ja) 試験装置のシミュレーションシステム、方法、及びプログラム製品
JP5153670B2 (ja) 診断装置、診断方法および試験装置
CN110309046A (zh) 建模系统
US20170370988A1 (en) Burn-in testing of individually personalized semiconductor device configuration
KR102024275B1 (ko) 스크립트를 활용한 시험 프로그램 개발 시스템 및 그 방법
Smirnov et al. Mathematical models and methods for functional control of large-scale integrated circuits at the stage of their production
CN114138648B (zh) 一种服务器可靠性测试方法、装置、服务器和存储介质
Herath Software Solution for Automated Validation of Power Management Integrated Circuits
US20250085347A1 (en) Automated test system and method thereof
Ishak et al. An Automated Testing Method for PXI Chassis Software Driver
Powell et al. Advances in reverse engineering are becoming a vastly more powerful tool in electronic repair of commercial and DoD systems

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20190517

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20190517

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20200325

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20200421

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20200515

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20200804

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20200807

R150 Certificate of patent or registration of utility model

Ref document number: 6748671

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250