JP6748491B2 - 基板に形成された凹部に銅配線を形成するための前処理を行う方法、及び、処理装置 - Google Patents
基板に形成された凹部に銅配線を形成するための前処理を行う方法、及び、処理装置 Download PDFInfo
- Publication number
- JP6748491B2 JP6748491B2 JP2016126715A JP2016126715A JP6748491B2 JP 6748491 B2 JP6748491 B2 JP 6748491B2 JP 2016126715 A JP2016126715 A JP 2016126715A JP 2016126715 A JP2016126715 A JP 2016126715A JP 6748491 B2 JP6748491 B2 JP 6748491B2
- Authority
- JP
- Japan
- Prior art keywords
- axis
- substrate
- mounting table
- space
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32715—Workpiece holder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
- H01L21/76862—Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32733—Means for moving the material to be treated
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32798—Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
- H01J37/32899—Multiple chambers, e.g. cluster tools
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/34—Gas-filled discharge tubes operating with cathodic sputtering
- H01J37/3411—Constructional aspects of the reactor
- H01J37/3435—Target holders (includes backing plates and endblocks)
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67201—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the load-lock chamber
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68764—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating caroussel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/76813—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving a partial via etch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76865—Selective removal of parts of the layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
Description
Claims (5)
- 基板に形成された凹部に銅配線を形成するための前処理を行う方法であって、
前記凹部を画成する前記基板の表面にバリア層を形成する工程と、
前記バリア層上にシード層を形成する工程と、
を含み、
該方法は、
前記バリア層をエッチングする工程及び前記シード層をエッチングする工程のうち少なくとも一方を更に含み、
前記バリア層をエッチングする前記工程及び前記シード層をエッチングする前記工程のうち前記少なくとも一方において、前記凹部の開口を画成する前記基板の角部上に形成された前記バリア層又は前記シード層を優先的にエッチングするためにイオンの照射方向に対して前記基板が傾斜され且つ該基板が回転され、
該方法は、処理装置のチャンバ本体内に設けられた載置台の保持部によって前記基板が保持された状態で実行され、
前記チャンバ本体によって提供されるチャンバは、成膜用の第1空間及びエッチング用の第2空間を有し、
前記保持部は、その中心軸線である第1軸線を中心に回転可能に構成されており、前記載置台は、該第1軸線に直交する第2軸線を中心に回転可能に構成されており、
バリア層を形成する前記工程及びシード層を形成する前記工程の実行中に前記基板が前記第1空間に面するように、前記第2軸線に対して周方向の前記載置台の角度位置が設定され、
前記バリア層をエッチングする前記工程及び前記シード層をエッチングする前記工程のうち前記少なくとも一方の実行中に、前記基板が前記第2空間に面するように、前記第2軸線に対して周方向の前記載置台の角度位置が、バリア層を形成する前記工程及びシード層を形成する前記工程の実行中の前記載置台の前記角度位置と異なる角度位置に設定され、且つ、前記第1軸線を中心に前記基板を回転させるように、前記保持部が前記第1軸線を中心に回転される、
方法。 - 前記バリア層をエッチングする前記工程及び前記シード層をエッチングする前記工程の双方を含み、
前記バリア層をエッチングする前記工程及び前記シード層をエッチングする前記工程の双方において、前記第1軸線が前記イオンの照射方向に対して傾斜するよう前記載置台が傾斜される、
請求項1に記載の方法。 - 基板を保持する保持部を有する載置台であり、前記保持部の中心軸線である第1軸線を中心に該保持部が回転可能であり、且つ、該第1軸線に直交する第2軸線を中心に回転可能に構成された、該載置台と、
前記第2軸線に対して周方向に並ぶ成膜用の第1空間及びエッチング用の第2空間を含み、その中に前記載置台を収容したチャンバを提供するチャンバ本体と、
を備え、
前記保持部によって保持された前記基板に対する成膜の実行中に、前記基板が前記第1空間に面するように、前記第2軸線に対して周方向の前記載置台の角度位置が設定され、
前記保持部によって保持された前記基板に対する成膜の実行中に、前記基板が前記第2空間に面するように、前記第2軸線に対して周方向の前記載置台の角度位置が、前記成膜の実行中の前記載置台の前記角度位置と異なる角度位置に設定され、且つ、前記第1軸線を中心に前記基板を回転させるように、前記保持部が前記第1軸線を中心に回転される、
処理装置。 - 前記第1空間と前記第2空間との間に介在する隔壁を更に備える、請求項3に記載の処理装置。
- 前記第1空間に配置される成膜用のターゲットを保持するターゲットホルダと、
前記第2空間に供給されるガスを励起させるプラズマ生成部と、
を更に備える請求項3又は4に記載の処理装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016126715A JP6748491B2 (ja) | 2016-06-27 | 2016-06-27 | 基板に形成された凹部に銅配線を形成するための前処理を行う方法、及び、処理装置 |
KR1020170076876A KR102050631B1 (ko) | 2016-06-27 | 2017-06-16 | 기판에 형성된 오목부에 구리 배선을 형성하기 위한 전처리를 행하는 방법, 및 처리 장치 |
US15/627,478 US10068798B2 (en) | 2016-06-27 | 2017-06-20 | Method and processing apparatus for performing pre-treatment to form copper wiring in recess formed in substrate |
KR1020190148453A KR102123766B1 (ko) | 2016-06-27 | 2019-11-19 | 처리 장치 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016126715A JP6748491B2 (ja) | 2016-06-27 | 2016-06-27 | 基板に形成された凹部に銅配線を形成するための前処理を行う方法、及び、処理装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2018006378A JP2018006378A (ja) | 2018-01-11 |
JP6748491B2 true JP6748491B2 (ja) | 2020-09-02 |
Family
ID=60677788
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016126715A Active JP6748491B2 (ja) | 2016-06-27 | 2016-06-27 | 基板に形成された凹部に銅配線を形成するための前処理を行う方法、及び、処理装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US10068798B2 (ja) |
JP (1) | JP6748491B2 (ja) |
KR (2) | KR102050631B1 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10879055B2 (en) * | 2018-07-17 | 2020-12-29 | Varian Semiconductor Equipment Associates, Inc. | Techniques, system and apparatus for selective deposition of a layer using angled ions |
US11004735B2 (en) | 2018-09-14 | 2021-05-11 | International Business Machines Corporation | Conductive interconnect having a semi-liner and no top surface recess |
KR102202032B1 (ko) * | 2019-03-19 | 2021-01-13 | 하이엔드테크놀로지(주) | 반도체 소자의 제조 방법 |
KR102486192B1 (ko) * | 2019-12-02 | 2023-01-06 | 캐논 톡키 가부시키가이샤 | 성막 방법 및 성막 장치 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6397942A (ja) * | 1986-10-14 | 1988-04-28 | Fuji Photo Film Co Ltd | 感光材料 |
JP2001060589A (ja) * | 1999-08-20 | 2001-03-06 | Matsushita Electronics Industry Corp | 半導体装置の製造方法 |
US6765178B2 (en) * | 2000-12-29 | 2004-07-20 | Applied Materials, Inc. | Chamber for uniform substrate heating |
GB0127251D0 (en) * | 2001-11-13 | 2002-01-02 | Nordiko Ltd | Apparatus |
TWI253478B (en) * | 2001-11-14 | 2006-04-21 | Mitsubishi Heavy Ind Ltd | Barrier metal film production apparatus, barrier metal film production method, metal film production method, and metal film production apparatus |
JP3611320B2 (ja) * | 2002-02-05 | 2005-01-19 | 三菱重工業株式会社 | 金属膜作製装置及び金属膜作製方法 |
US20030145790A1 (en) * | 2002-02-05 | 2003-08-07 | Hitoshi Sakamoto | Metal film production apparatus and metal film production method |
JP2004063556A (ja) * | 2002-07-25 | 2004-02-26 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
JP4052191B2 (ja) * | 2003-06-24 | 2008-02-27 | 株式会社島津製作所 | 複合成膜装置およびこれを用いた磁気ヘッドの保護膜形成方法 |
JP5159165B2 (ja) * | 2007-05-14 | 2013-03-06 | 株式会社アルバック | 凹部充填方法 |
JP2011208185A (ja) * | 2010-03-29 | 2011-10-20 | Panasonic Corp | スパッタリング装置 |
JP5392215B2 (ja) * | 2010-09-28 | 2014-01-22 | 東京エレクトロン株式会社 | 成膜方法及び成膜装置 |
WO2012046397A1 (ja) * | 2010-10-07 | 2012-04-12 | キヤノンアネルバ株式会社 | 基板処理装置 |
WO2015097942A1 (ja) * | 2013-12-25 | 2015-07-02 | キヤノンアネルバ株式会社 | 基板加工方法及び半導体装置の製造方法 |
JP6373160B2 (ja) * | 2014-10-15 | 2018-08-15 | 東京エレクトロン株式会社 | プラズマ処理装置 |
-
2016
- 2016-06-27 JP JP2016126715A patent/JP6748491B2/ja active Active
-
2017
- 2017-06-16 KR KR1020170076876A patent/KR102050631B1/ko active IP Right Grant
- 2017-06-20 US US15/627,478 patent/US10068798B2/en active Active
-
2019
- 2019-11-19 KR KR1020190148453A patent/KR102123766B1/ko active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
US10068798B2 (en) | 2018-09-04 |
JP2018006378A (ja) | 2018-01-11 |
KR102123766B1 (ko) | 2020-06-16 |
US20170372951A1 (en) | 2017-12-28 |
KR20190132958A (ko) | 2019-11-29 |
KR20180001462A (ko) | 2018-01-04 |
KR102050631B1 (ko) | 2019-11-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR102123766B1 (ko) | 처리 장치 | |
CN107078049B (zh) | 等离子体处理装置 | |
CN106716662B (zh) | 对多层膜进行蚀刻的方法 | |
US9633839B2 (en) | Methods for depositing dielectric films via physical vapor deposition processes | |
JP6460853B2 (ja) | 磁性層をエッチングする方法 | |
TWI751423B (zh) | 電漿處理裝置及電漿處理方法 | |
EP2863416B1 (en) | Method for etching copper layer | |
JP6613207B2 (ja) | 被処理体をエッチングする方法 | |
CN109564872B (zh) | 处理被处理体的方法 | |
JP5719212B2 (ja) | 成膜方法およびリスパッタ方法、ならびに成膜装置 | |
KR101989227B1 (ko) | 절연막을 형성하는 방법 | |
JP3844413B2 (ja) | エッチング方法 | |
TWI834028B (zh) | 物理氣相沉積裝置、沉積薄膜的方法和形成半導體結構的方法 | |
KR102100402B1 (ko) | 플라즈마 공정장비의 하부캐소드 모듈 | |
WO2017082373A1 (ja) | 被処理体をエッチングする方法 | |
WO2024044373A1 (en) | High aspect ratio gap fill using cyclic deposition and etch | |
JP4135173B2 (ja) | プラズマ処理装置及びプラズマ処理方法 | |
JPH07263413A (ja) | プラズマ処理装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20190325 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20191223 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20200107 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20200218 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20200714 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20200807 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6748491 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |