JP6686917B2 - Switching element control device - Google Patents

Description

  The technique disclosed in the present specification relates to a technique for controlling a switching element of a power control circuit such as an inverter or a converter, and particularly to a technique for controlling two switching elements connected in parallel.

  Patent Document 1 discloses a control device that controls two switching elements connected in parallel. This control device detects a current flowing through each of the two switching elements, and changes a gate voltage applied to each of the two switching elements according to the detected current. Specifically, in the switching element with the larger detected current, the gate voltage (voltage between the gate and the emitter) applied to the gate of the switching element is reduced to suppress the current flowing through the switching element. This explains that the imbalance of the currents flowing through the two switching elements is eliminated.

JP-A-5-145075

  In a power control circuit such as an inverter or a converter, when two switching elements connected in parallel are switched at the same time, a current flowing through each switching element may vibrate (oscillate) strongly in an opposite phase. Such a phenomenon is due to the parasitic oscillation of the gate voltage, and is induced by the imbalance of the currents flowing through the two switching elements. Such oscillation of the switching element leads to unnecessary waste of energy, and if the oscillation of the switching element is left as it is, the switching element may fail. However, the oscillation of the switching element has a high frequency, and the feedback control as in the technique of Patent Document 1 cannot follow the oscillation of the switching element and cannot suppress the oscillation of the switching element.

  In view of the above situation, the present specification provides a technique capable of suppressing oscillation of two switching elements connected in parallel.

This specification discloses the control apparatus which controls two switching elements connected in parallel. This control device includes a setting circuit that sets a target value of each gate voltage of two switching elements, and each switching element by adjusting each gate voltage of the two switching elements to the target value set by the setting circuit. a drive circuit for switching, a difference detection circuit for detecting a difference between the current flowing through the two switching elements, after switching by driving dynamic circuit, counting circuit for counting the number of vibrations occurring in the value detected by the difference detecting circuit With. The setting circuit changes the target value of the gate voltage of at least one of the two switching elements when the count value of the counter circuit reaches or exceeds a predetermined number of times.

  In the control device described above, the difference between the respective currents flowing in the two switching elements, when vibration occurs a predetermined number of times or more, it is determined that the oscillation of the switching element has occurred, at least one of the switching element, The target value of the gate voltage is changed. By changing the target value of the gate voltage, the imbalance of the currents flowing through the two switching elements is reduced and the oscillation is suppressed in the next switching. Here, as a mode of changing the target value of the gate voltage, it is preferable to lower the target value of the gate voltage for the switching element with the larger flowing current. In addition to or instead of this, the target value of the gate voltage may be increased for the switching element with the smaller flowing current. This reduces the current imbalance and suppresses the oscillation of the switching element. By suppressing the oscillation of the switching element, it is possible to avoid waste of energy and failure of the switching element.

The block diagram which shows typically the structure of the control apparatus 10 of an Example. 3 is a flowchart showing the flow of operation of the control device 10. The graph of (A) shows changes with time of the collector currents Ic1 and Ic2 flowing through the two switching elements SW1 and SW2, respectively. The graph of (B) shows changes over time of the collector-emitter voltages Vce1 and Vce2 of the switching elements SW1 and SW2, respectively. The graph of (C) shows the change over time of the differential voltage ΔVe output from the differential circuit 20.

  A control device 10 according to an embodiment will be described with reference to the drawings. As shown in FIG. 1, the control device 10 of the present embodiment controls switching of two switching elements SW1 and SW2 connected in parallel in a power control circuit PC such as an inverter or a DC-DC converter. As an example, the control device 10 of the present embodiment can be preferably used in the power control circuit PC of a vehicle such as an electric vehicle, a hybrid vehicle, or a fuel cell vehicle. When the power control circuit PC is a three-phase inverter, the two switching elements SW1 and SW2 correspond to one of the six arms (upper and lower arms of U-phase, V-phase, and W-phase). Each of them is provided with the configuration shown in FIG. In addition, in the power control circuit PC, in addition to the two switching elements SW1 and SW2, a third or more switching elements may be further connected in parallel.

  The two switching elements SW1 and SW2 have gates G1 and G2, respectively, and are switched (that is, turned on and turned off) according to the gate voltages Vg1 and Vg2 applied to the gates G1 and G2. The switching elements SW1 and SW2 are not particularly limited, but may be various semiconductor elements such as silicon, silicon carbide or gallium nitride, and may be, for example, MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) or IGBT (Insulated Gate Bipolar Transistor). ) Element structure. Each of the switching elements SW1 and SW2 in this embodiment is an IGBT, and has collectors C1 and C2 and emitters E1 and E2 in addition to the above-described gates G1 and G2.

  The two switching elements SW1 and SW2 further include sense terminals ES1 and ES2, respectively. The sense terminals ES1 and ES2 output minute sense currents Is1 and Is2 in proportion to collector currents Ic1 and IC2 (hereinafter, simply referred to as currents Ic1 and Ic2) flowing through the switching elements SW1 and SW2. According to such a configuration, the currents Ic1 and Ic2 flowing through the switching elements SW1 and SW2 can be detected based on the sense currents Is1 and Is2. The sense terminals ES1 and ES2 are connected to a current detection circuit 18 of the control device 10, which will be described later.

  The control device 10 includes a first gate voltage setting circuit 12, a second gate voltage setting circuit 14, and a drive circuit 16. The first gate voltage setting circuit 12 and the second gate voltage setting circuit 14 respectively set target values of the gate voltages Vg1 and Vg2 of the two switching elements SW1 and SW2. Specifically, the first gate voltage setting circuit 12 sets the target value of the gate voltage Vg1 of the first switching element SW1, and the second gate voltage setting circuit 14 sets the target value of the gate voltage Vg2 of the second switching element SW2. Set. The target values set by these circuits are higher than the gate threshold voltages of the switching elements SW1 and SW2, respectively, and are values sufficient to turn off the switching elements SW1 and SW2. Here, the gate voltages Vg1 and Vg2 mean voltages between the gates G1 and G2-emitters E1 and E2. In each of the switching elements SW1 and SW2, the currents Ic1 and Ic2 flowing when turned on increase as the target values of the gate voltages Vg1 and Vg2 are set to larger values.

  The drive circuit 16 is connected to the gates G1 and G2 of the two switching elements SW1 and SW2, and switches the two switching elements SW1 and SW2 in response to a drive command from the controller 30. In particular, the drive circuit 16 adjusts the gate voltage Vg1 of the first switching element SW1 to the target value set by the first gate voltage setting circuit 12 when turning on the first switching element SW1. In addition, the drive circuit 16 adjusts the gate voltage Vg2 of the second switching element SW2 to the target value set by the second gate voltage setting circuit 14 when turning on the second switching element SW2. On the other hand, when turning off the switching elements SW1 and SW2, the gate voltages Vg1 and Vg2 are adjusted to zero. The switching of the two switching elements SW1 and SW2 is performed in phase and substantially simultaneously.

  The control device 10 further includes a current detection circuit 18, a differential circuit 20, a rising / falling detection circuit 22, and a counter 24. As described above, the current detection circuit 18 is connected to the sense terminals ES1 and ES2 of the two switching elements SW1 and SW2, and the sense currents Is1 and Is2 output from the sense terminals ES1 and ES2 are detected as the current detection. It is input to the circuit 18. The current detection circuit 18 outputs two sense voltages Vs1 and Vs2 in accordance with the sense currents Is1 and Is2 output from the sense terminals ES1 and ES2, respectively. One sense voltage Vs1 is correlated with one sense current Is1 and corresponds to the current Ic1 flowing through the first switching element SW1. The other sense voltage Vs2 is correlated with the other sense current Is2 and corresponds to the current Ic2 flowing through the second switching element SW2.

  The differential circuit 20 is connected to the current detection circuit 18, and the two sense voltages Vs1 and Vs2 output from the current detection circuit 18 are input to the differential circuit 20. The differential circuit 20 outputs a difference voltage ΔVe according to the difference between the two sense voltages Vs1 and Vs2. As is apparent from the above description, the difference voltage ΔVe is a voltage signal corresponding to the difference between the currents Ic1 and Ic2 flowing through the two switching elements SW1 and SW2. Here, the difference voltage ΔVe can take positive and negative values. As an example, in the control device 10 of the present embodiment, when the differential voltage ΔVe is positive, it is shown that the current Ic1 of the first switching element SW1 is larger than the current Ic2 of the second switching element SW2, and the difference When the voltage ΔVe is negative, it indicates that the current Ic2 of the second switching element SW2 is larger than the current Ic1 of the first switching element SW1. The current detection circuit 18 and the differential circuit 20 are an example of a difference detection circuit for detecting a difference between the currents Ic1 and Ic2 flowing in the two switching elements SW1 and SW2. The configuration of such a difference detection circuit is not limited to the configuration (combination of the current detection circuit 18 and the differential circuit 20) described in the present embodiment, and can be variously modified.

  The rising / falling detection circuit 22 is connected to the differential circuit 20, and the differential voltage ΔVe output from the differential circuit 20 is input to the rising / falling detection circuit 22. When the difference voltage ΔVe vibrates, the rising / falling detection circuit 22 detects each rising and falling edge of the vibration and outputs a predetermined edge signal. The edge signal output by the rising / falling detection circuit 22 is input to the counter 24. The counter 24 outputs a predetermined oscillation detection signal when receiving the edge signal a predetermined number of times. The oscillation detection signal output from the counter 24 is input to the first gate voltage setting circuit 12 and the second gate voltage setting circuit 14, respectively. The rising / falling detection circuit 22 and the counter 24 count the number of vibrations generated in the detection value (here, the difference voltage ΔVe) by the difference detection circuit (here, the combination of the current detection circuit 18 and the differential circuit 20). It is an example of a counting circuit for. The configuration of such a counting circuit is not limited to the configuration (combination of the rising / falling detection circuit 22 and the counter 24) described in the present embodiment, and can be variously modified.

  In addition, when the difference voltage ΔVe oscillates, the rising / falling detection circuit 22 determines the first gate voltage setting circuit 12 and the second gate voltage setting circuit 12 according to the sign (positive / negative) of the difference voltage ΔVe at the start of oscillation. The large current specifying signal and the small current specifying signal are output to the gate voltage setting circuit 14. Specifically, when the difference voltage ΔVe at the start of vibration is positive, it means that the current Ic1 of the first switching element SW1 is larger than the current Ic2 of the second switching element SW2. In this case, the rise / fall detection circuit 22 outputs a large current identification signal to the first gate voltage setting circuit 12 and a small current identification signal to the second gate voltage setting circuit 14. On the other hand, when the differential voltage ΔVe at the start of vibration is negative, it means that the current Ic2 of the second switching element SW2 is larger than the current Ic1 of the first switching element SW1. In this case, the rising / falling detection circuit 22 outputs a large current identification signal to the second gate voltage setting circuit 14 and a small current identification signal to the first gate voltage setting circuit 12.

  The first gate voltage setting circuit 12 and the second gate voltage setting circuit 14 can change the target values of the gate voltages Vg1 and Vg2 of the switching elements SW1 and SW2 according to the oscillation detection signal output from the counter 24. . For example, when the first gate voltage setting circuit 12 and the second gate voltage setting circuit 14 receive the oscillation detection signal from the counter 24 and the large current specifying signal from the rising / falling detection circuit 22, The target values of the voltages Vg1 and Vg2 can be reduced. In addition to or instead of this, the first gate voltage setting circuit 12 and the second gate voltage setting circuit 14 receive the oscillation detection signal from the counter 24 and the small current specifying signal from the rising / falling detection circuit 22. The target values of the gate voltages Vg1 and Vg2 can be increased during the operation.

  The configuration of the control device 10 has been described above. Hereinafter, the operation and effect of the control device 10 will be described. FIG. 2 is a flowchart showing a flow of operations of the control device 10. First, the control device 10 executes a normal operation (step S12). In this normal operation, the drive circuit 16 switches the two switching elements SW1 and SW2 based on the drive command from the controller 30. This drive command may be based on pulse width modulation control, for example. As described above, when the two switching elements SW1 and SW2 are turned on, the gate voltages Vg1 and Vg2 of the respective switching elements SW1 and SW2 are set by the first gate voltage setting circuit 12 and the second gate voltage setting circuit 14. Each is adjusted so as to rise to the set target value.

  As shown in FIGS. 3A and 3B, when two switching elements SW1 and SW2 connected in parallel are simultaneously switched, the currents Ic1 and Ic2 flowing through the respective switching elements SW1 and SW2 are strongly in antiphase. May vibrate (oscillate). Such a phenomenon is due to parasitic oscillation of the gate voltages Vg1 and Vg2, and is induced by the imbalance of the currents Ic1 and Ic2 flowing through the two switching elements SW1 and SW2. Such oscillations of the switching elements SW1 and SW2 lead to unnecessary waste of energy, and there is a possibility that the switching elements SW1 and SW2 may fail if the oscillations of the switching elements SW1 and SW2 are left unattended.

  With regard to the above point, in the control device 10 of the present embodiment, when oscillation occurs between the switching elements SW1 and SW2, the differential voltage ΔVe output from the differential circuit 20 becomes severe as shown in FIG. Vibrate. The vibration generated in the differential voltage ΔVe is detected by the rising / falling detection circuit 22 (YES in S14). As described above, when the differential voltage ΔVe oscillates (time T1 in the figure), the rising / falling detection circuit 22 causes the first gate to respond to the sign (positive / negative) of the oscillation of the differential voltage ΔVe. The large current specifying signal and the small current specifying signal are output to the voltage setting circuit 12 and the second gate voltage setting circuit 14. In the example shown in FIG. 3C, since the differential voltage ΔVe is negative, the small current specifying signal is output to the first gate voltage setting circuit 12 and the large current specifying signal is output to the second gate voltage setting circuit 14. To be done. The small current specifying signal and the large current specifying signal are temporarily stored in the first gate voltage setting circuit 12 and the second gate voltage setting circuit 14, respectively (S16 in FIG. 2).

  While the difference voltage ΔVe is vibrating, the rising / falling detection circuit 22 outputs the edge detection signal to the counter 24. As described above, the counter 24 outputs the oscillation detection signal to the first gate voltage setting circuit 12 and the second gate voltage setting circuit 14 when receiving the edge detection signal a predetermined number of times. That is, when the difference voltage ΔVe vibrates a predetermined number of times, it is determined that oscillation occurs between the two switching elements SW1 and SW2, and the oscillation detection signal is output from the counter 24 (S18 in FIG. 2 and FIG. 3). Time T2).

  When the oscillation detection signal is output from the counter 24, the target values of the gate voltages Vg1 and Vg2 are changed in at least one of the first gate voltage setting circuit 12 and the second gate voltage setting circuit 14. In the example shown in FIG. 3C, for example, in the second gate voltage setting circuit 14 that receives and stores the large current specifying signal, the target value of the gate voltage Vg2 of the second switching element SW2 is lowered. Be changed. In addition to or instead of this, in the first gate voltage setting circuit 12 that receives and stores the small current specifying signal, the target value of the gate voltage Vg1 of the first switching element SW1 is changed so as to increase. It After that, the operation returns to the normal operation (S12 in FIG. 2). Accordingly, the imbalance of the currents Ic1 and Ic2 between the two switching elements SW1 and SW2 is reduced from the next switching, and the oscillation of the switching elements SW1 and SW2 can be suppressed. The range and ratio when changing these target values are not particularly limited, and may be appropriately set based on, for example, tests and calculations.

  As described above, in the power control circuit PC having the two switching elements SW1 and SW2 connected in parallel, when switching the two switching elements SW1 and SW2, due to the imbalance of the currents Ic1 and Ic2 flowing through them, Oscillation may occur between the switching elements SW1 and SW2. In such a case, in the control device 10 of the present embodiment, the target values of the gate voltages Vg1 and Vg2 are changed so that the imbalance of the currents Ic1 and Ic2 flowing through the two switching elements SW1 and SW2 is eliminated. . As a result, the oscillations of the switching elements SW1 and SW2 are suppressed at an early stage, and waste of energy and failure of the switching elements SW1 and SW2 can be avoided.

  In the control device 10 of this embodiment, the oscillation generated in the switching elements SW1 and SW2 is detected by monitoring the difference (here, the difference voltage ΔVe) between the currents Ic1 and Ic2 flowing in the two switching elements SW1 and SW2. . With such a configuration, the oscillations of the switching elements SW1 and SW2 can be detected more reliably regardless of the magnitudes of the currents Ic1 and Ic2, and early countermeasures (here, the target values of the gate voltages Vg1 and Vg2 are set). Can be changed).

  Further, the control device 10 of the present embodiment determines whether or not the switching elements SW1 and SW2 are oscillating based on the number of oscillations of the differential voltage ΔVe, and thus determines the oscillation based on the magnitudes of the currents Ic1 and Ic2. Oscillation can be detected earlier at a stage where the currents Ic1 and Ic2 are relatively small (for example, within the range of the rated current) compared to the method. Then, since the oscillation is suppressed more reliably, for example, by making the resistance value of the gate resistance (not shown) interposed between the gates G1 and G2 and the drive circuit 16 relatively small, the switching element SW1 , SW2 switching loss can be further reduced.

  Specific examples of the present technology have been described above in detail, but these are merely examples and do not limit the scope of the claims. The technical elements described in the present specification or the drawings exert technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. The technique illustrated in the present specification or the drawings can achieve a plurality of purposes at the same time, and achieving the one purpose among them has technical utility.

10: control device 12: first gate voltage setting circuit 14: second gate voltage setting circuit 16: drive circuit 18: current detection circuit 20: differential circuit 22: rising / falling detection circuit 24: counter 30: controllers C1, C2 : Collectors E1 and E2: emitters ES1 and ES2: sense terminals G1 and G2: gates Ic1 and Ic2: collector current (current)
Is1, Is2: Sense current PC: Power control circuits SW1, SW2: Switching elements Vce1, Vce2: Collector-emitter voltage Vg1, Vg2: Gate voltage Vs1, Vs2: Sense voltage ΔVe: Differential voltage

Claims (1)

A control device for controlling two switching elements connected in parallel,
A setting circuit for setting a target value of each gate voltage of the two switching elements,
By adjusting each gate voltage of the two switching elements to the target value set by the setting circuit, a drive circuit for switching the two switching elements,
A difference detection circuit for detecting the difference between the currents flowing through the two switching elements,
After switching by pre hear dynamic circuit, a counter circuit for counting the number of vibrations occurring in the detection value by the difference detection circuit,
Equipped with
The setting circuit changes the target value of the gate voltage of at least one of the two switching elements when the count value of the counting circuit is equal to or more than a predetermined number of times,
Control device.

Images