JPH1042548A - Semiconductor power converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To unify the current distribution of parallel elements for attainment of desired capacity, by connecting the cathodes of respective semiconductor elements to each other through inductance components respectively, and connecting a drive circuit between the mutual connection point of the inductance components and the mutual connection points of a control pole. SOLUTION: Two IGBTs, used as semiconductor elements for electric power, are connected in parallel to form one arm of this semiconductor power converter. The collectors of IGBTQ1, Q2 are also connected to each other, and one end of reactors L1, L2 is connected to each other. A gate drive circuit GDU is connected between its mutual connection point and the mutual connection point of the reactors L1, L2. Such a negative feedback action as to shorten variations in the switching time of the respective elements is generated through the control poles of the respective semiconductor elements, and the variation in switching time existing between the respective elements is shortened, thereby relieving the current unbalancing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a BJT (BiT
polar Junction Transistor), IGBT (Insulated
Gate Bipolar Transistor), GTO (Gate Turn Of)
f) The present invention relates to a semiconductor power conversion device configured by connecting power semiconductor elements such as thyristors in parallel in one arm.

[0002]

2. Description of the Related Art FIG. 11 shows an example of an inverter using an IGBT as a basic configuration example of a three-phase power converter using a power semiconductor element. In the figure, C is a smoothing capacitor connected to a DC input terminal, Q11 to Q16 are IGBTs connected in a three-phase bridge connection, and D1 to D6 are I
The diodes are connected in anti-parallel to the GBTs Q11 to Q16. This power converter has IGBT Q11-
By switching the Q16 in a predetermined order, a DC voltage as an input is converted into an AC voltage of an arbitrary frequency and output, and is widely applied to a variable speed drive device of an AC motor and the like.

[0003] By the way, in a power converter having such a configuration, there is often a demand for a large-capacity device in which a plurality of semiconductor elements must be connected in parallel. In this case, conventionally, as shown in FIG. 12, a number of semiconductor elements, for example, IG, corresponding to the required device capacity are used.
BT Q1 and Q2 were connected in parallel to form one arm. Such a parallel connection method is described in, for example,
No. 4789. In FIG. 12, GDU is a gate drive circuit.

[0004]

However, according to this method, the transient current sharing at the time of switching is poor due to uneven characteristics of the semiconductor element, particularly, irregularities in switching time (turn-on time, turn-off time). Due to the problem, the device had to be used with reduced capacity. As a result, in order to obtain the required capacity, there is a drawback that the apparatus becomes large and the cost increases. Furthermore, a special element selection is required in order to match the element characteristics, which has also caused a cost increase.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a semiconductor power conversion device capable of obtaining a desired capacity by equalizing the current sharing of parallel elements without selecting a special element.

[0006]

According to a first aspect of the present invention, there is provided a semiconductor power converter having a plurality of power semiconductor elements connected in parallel in one arm. Are connected to each other, and the control poles of the semiconductor elements are connected to each other, and the cathodes of the semiconductor elements are connected to each other via inductance components. A drive circuit is connected between the interconnection points.

According to a second aspect of the present invention, in a semiconductor power conversion device having a plurality of power semiconductor elements connected in parallel in one arm, anodes of the respective semiconductor elements are connected to each other,
In addition, the control poles of the respective semiconductor elements are connected to each other via respective resistors, and the cathodes of the respective semiconductor elements are connected to each other via respective inductance components. And a drive circuit is connected between them.

According to a third aspect of the present invention, in a semiconductor power conversion device having a plurality of power semiconductor elements connected in parallel in one arm, anodes of the respective semiconductor elements are connected to each other,
And, while connecting the control poles of each semiconductor element to each other,
The cathode of each semiconductor element is connected to each other via an inductance component, and a drive circuit is connected between the interconnection point of the auxiliary cathode of each semiconductor element and the interconnection point of the control pole.

According to a fourth aspect of the present invention, in a semiconductor power conversion device having a plurality of power semiconductor elements connected in parallel in one arm, anodes of the respective semiconductor elements are connected to each other,
In addition, the control poles of the respective semiconductor elements are connected to each other via respective resistors, and the cathodes of the respective semiconductor elements are connected to each other via respective inductance components. A drive circuit is connected between the drive circuit and the connection point.

[0010] The invention according to claim 5 is the invention according to claim 1,
5. The semiconductor power converter according to any one of 2, 3, or 4, wherein an overvoltage absorption circuit is connected between a control pole and a cathode of each semiconductor element.

With such a configuration, a voltage is transiently generated in the inductance component connected in series to the cathode of each semiconductor element when the switching time imbalance occurs in the semiconductor element. This voltage exerts a negative feedback action on each control electrode so as to reduce the variation in switching time of the semiconductor elements connected in parallel.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a first embodiment of the present invention, which is an embodiment of the first aspect of the present invention. In each of the following embodiments, an IGBT is used as a power semiconductor device, and two IGBTs are connected in parallel to form one arm of a semiconductor power conversion device.

In FIG. 1, Q1 and Q2 are IGBT, L
1, L2 is the emitter (cathode) of each IGBT Q1, Q2
Are connected at one end to a reactor (inductance component) for equalizing current sharing, and GDU is a gate drive circuit. Here, the collectors (anodes) of IGBTs Q1 and Q2 are connected to each other, and the other ends of reactors L1 and L2 are also connected to each other. Further, the gates (control poles) of IGBTs Q1 and Q2 are also connected to each other, and a gate drive circuit GDU is connected between the interconnection point and the interconnection point of reactors L1 and L2. In the manufacture of the device, description of stray inductance and the like existing in each line is omitted.

In the following description, I connected in parallel
The turn-on time (the sum of the delay time and the rise time) of the GBTs Q1 and Q2 is t _on (Q1) <t _on (Q2), and the turn-off time (the sum of the accumulation time and the fall time) is t _q (Q1).
<T _q (Q2). The internal impedance of the gate drive circuit GDU is larger than L1 and L2.

FIG. 2 is a waveform diagram for explaining the principle of the current balance action at the time of turn-on, and FIG. 3 is at the time of turn-off. In these figures, the solid line shows the waveform of each part of the IGBT Q1 when there is a variation in the relationship of the switching time described above, and the dashed line shows the waveform of each part of the IGBT Q2. For comparison, IGBT Q1, Q1
FIG. 2 shows the waveforms of the respective parts when the characteristics of FIG.
This is indicated by a broken line in FIG. It should be noted that symbols such as voltage and current attached to the waveforms in the figure correspond to symbols such as voltage and current in FIG.

First, the principle of current balance at the time of turn-on will be described with reference to FIG. At time t0, IGB
When a forward bias voltage is applied to TQ1 and Q2 from a common gate drive circuit GDU, the respective gate voltages increase. When the gate voltage of the IGBT Q1 having a short turn-on time (low gate threshold voltage) at time t1 reaches the threshold value (V _Th (Q1)), the collector voltage starts decreasing and the collector current flows. start.

As a result, the potential at both ends of the reactor L1 becomes positive on the emitter side of the IGBT Q1. At the same time, part of the collector current is also diverted to the path shown by arrow 1 in FIG. The current shunted to the gate side reduces the gate forward current of the IGBT Q1 that has started to turn on, while increasing the gate forward current of the IGBT Q2 that has not yet started to turn on (has a high gate threshold voltage). .

As described above, the IGBT Q that has started to turn on quickly due to the transient change of the gate forward current.
In No. 1, since the gate forward current decreases, the fall time (rise time) of the collector voltage increases. On the other hand, in the IGBT Q2 that has not yet started to turn on, the gate forward current increases, so that the time (delay time) until the gate voltage reaches the threshold value (V _Th (Q2)) is reduced. .

At time t2, when the gate voltage of IGBT Q2 reaches the threshold value (V _Th (Q2)), IGBT Q2
The collector voltage starts to drop, and the collector current starts to flow. At this time, the gate forward current of IGBT Q2 is IGBT Q2.
Since it is larger than Q1, the falling speed of the collector voltage is IGB
Faster than T Q1. Therefore, the current of the IGBT Q2 whose turn-on has been delayed rises rapidly.
As a result, the difference between the collector currents of the two elements is reduced.

That is, due to the exchange of the gate forward current between the parallel elements as described above, the rise of the collector current of the IGBT Q1 which has started to turn on quickly becomes gentle, and conversely, the IGBT Q which starts to turn on slowly starts.
2 is shortened, and the rise of the collector current after the start of turn-on becomes sharp. As a result, the current sharing between the two devices at the time of turn-on becomes substantially equal even when devices having similar variations in the turn-on time are used, as compared with the case where such a mutual negative feedback operation between gates is not performed.

Next, the principle of current balance at the time of turn-off will be described with reference to FIG. At time t0, when a reverse bias voltage is applied from the common gate drive circuit GDU, IG
The gate voltages of the BTs Q1 and Q2 decrease. Time t
At the time point 1, the gate voltage of the IGBT Q1 having a short turn-off time (high gate threshold voltage) is equal to the threshold voltage (V
_{When Th} (Q1)) is reached, its collector current starts to fall. Thereby, the potential at both ends of reactor L1 becomes IG
The emitter side of BT Q1 becomes negative. At the same time IG
A part of the collector current of the BT Q2 is indicated by an arrow 2 in FIG.
The flow also diverges to the path indicated by.

The current shunted to the gate side reduces the gate reverse current of the IGBT Q1 which has started to turn off, and on the other hand, the gate reverse current of the IGBT Q2 which has not yet started to turn off (the gate threshold voltage is low). Increase. As described above, the IGBT Q1 that has started to turn off quickly due to the transient change of the gate current.
Since the gate reverse current decreases, the fall time of the collector current becomes longer. On the other hand, in the IGBT Q2 that has not yet started to turn off, the gate reverse current increases, so that the time (accumulation time) until the gate voltage reaches the threshold value (V _Th (Q2)) is reduced.

When the gate voltage of IGBT Q2 reaches threshold value (V _Th (Q2)) at time t2, IGBT Q2
Collector current starts to fall. At this time, IGBT Q
Since the gate reverse current of 2 is greater than IGBT Q1, the collector current falls faster than IGBT Q1. As a result, the difference between the collector currents of the two elements is reduced.

Therefore, by the exchange of the gate current as described above, the fall of the collector current of the IGBT Q1 which started to turn off quickly becomes gentle, and conversely, the accumulation time of the IGBT Q2 which starts to turn off slowly is shortened, and The fall of the collector current after the start of turn-off becomes sharp. For this reason, the current sharing at the time of turning off becomes almost equal to that at the time of turning on.

FIG. 4 shows a second embodiment of the present invention, which is the second embodiment of the present invention. The difference from the first embodiment is that the gates (control poles) of the IGBTs Q1 and Q2 are connected to the gate drive circuit GDU via the resistors R1 and R2, respectively. These resistors R1,
R2 is provided for the purpose of suppressing parasitic oscillation that may occur when a MOS gate type semiconductor element is used. The principle of current balance at the time of switching of the IGBTs Q1 and Q2 is basically the same as that of the first embodiment, and a description thereof will be omitted.

FIG. 5 shows a third embodiment of the present invention. The difference from the first embodiment is that an overvoltage protection circuit composed of Zener diodes ZD11, ZD12 and ZD21, ZD22 is connected between the gates (control poles) and the emitters (cathodes) of the IGBTs Q1, Q2. The overvoltage protection between the emitters is performed. The rest of the configuration and the principle of the current balance at the time of switching are the same as those of the first embodiment, and a description thereof will be omitted.

FIG. 6 shows a fourth embodiment of the present invention, which is also an embodiment of the fifth aspect of the present invention. This embodiment is a combination of the second embodiment (FIG. 4) and the third embodiment (FIG. 5), and includes resistors R1 and R2, Zener diodes ZD11, ZD12, ZD21, and ZD2.
The purpose of inserting 2 is the same as in the second and third embodiments.

FIG. 7 shows a fifth embodiment of the present invention, and corresponds to the third embodiment of the present invention. The difference from the first embodiment is that, in the method of connecting the gate drive circuit GDU to the IGBTs Q1 and Q2, an auxiliary cathode is used for the line on the emitter side. The gate driving circuit GDU is connected between the connection point and the connection point. In this embodiment, in order to obtain the current balancing action, the inductance components Lg1 and Lg2 of the auxiliary cathode must be equal to the inductance component L of the main pole.
The effect is larger as it is larger than 1, L2.

FIG. 8 shows a sixth embodiment of the present invention, which corresponds to the fourth embodiment of the present invention. This embodiment is a combination of the second embodiment (FIG. 4) and the fifth embodiment (FIG. 7), and the actions of the resistors R1 and R2 and the inductance components Lg1 and Lg2 of the auxiliary cathode are the second and the fourth. This is the same as the fifth embodiment.

FIG. 9 shows a seventh embodiment of the present invention, in which the fifth embodiment of the present invention is shown. This embodiment is a combination of the third embodiment (FIG. 5) and the fifth embodiment (FIG. 7), and includes a Zener diode ZD
The operations of 11, ZD12, ZD21, ZD22 and the inductance components Lg1, Lg2 of the auxiliary cathode are the same as in the third and fifth embodiments.

FIG. 10 shows an eighth embodiment of the present invention.
This also shows the embodiment of the invention described in claim 5. Is shown. This embodiment is a combination of the second embodiment (FIG. 4) and the seventh embodiment (FIG. 9).
1, R2, Zener diodes ZD11, ZD12, Z
D21, ZD22 and inductance component L of auxiliary cathode
The actions of g1 and Lg2 are the same as in the second and seventh embodiments.

As the inductance components L1 and L2 in each of the above embodiments, a floating inductance of a heat sink of the IGBT or a connection conductor to the outside may be used, or a reactor may be positively inserted. Further, in each embodiment, the case of two parallel connection of IGBTs is shown, but of course,
Other semiconductor elements (for example, BJT, GTO, etc.) may be used, and the same effect can be expected in the case of three or more parallel devices.

[0033]

As described above, according to the present invention, an appropriate inductance is connected in series to the cathode side of the power semiconductor element and they are connected in parallel, so that the control electrode of each semiconductor element can be used. A negative feedback action occurs that shortens the variation in the switching time of each element. By this effect, the variation in the switching time existing between the elements is reduced, and as a result, the current imbalance at the time of switching is reduced. Therefore, a semiconductor power conversion device having a desired capacity can be realized without increasing the size of the device or increasing the cost.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

FIG. 2 is a waveform diagram illustrating a principle of a current balancing operation when the IGBT is turned on in the first embodiment.

FIG. 3 is a waveform diagram illustrating a principle of a current balancing operation when the IGBT is turned off in the first embodiment.

FIG. 4 is a circuit diagram showing a second embodiment of the present invention.

FIG. 5 is a circuit diagram showing a third embodiment of the present invention.

FIG. 6 is a circuit diagram showing a fourth embodiment of the present invention.

FIG. 7 is a circuit diagram showing a fifth embodiment of the present invention.

FIG. 8 is a circuit diagram showing a sixth embodiment of the present invention.

FIG. 9 is a circuit diagram showing a seventh embodiment of the present invention.

FIG. 10 is a circuit diagram showing an eighth embodiment of the present invention.

FIG. 11 is a main circuit configuration diagram of a known inverter.

FIG. 12 is a diagram showing an example of parallel connection of known semiconductor elements.

[Explanation of symbols]

GDU Gate drive circuit L1, L2 Reactor (inductance component) Lg1, Lg2 Inductance component of auxiliary cathode Q1, Q2 IGBT R1, R2 Resistance ZD11, ZD12, ZD21, ZD22 Zener diode

Claims (5)

[Claims] 1. A semiconductor power conversion device comprising a plurality of power semiconductor elements connected in parallel in one arm, wherein anodes of the semiconductor elements are connected to each other, and control poles of the semiconductor elements are connected to each other. And a driving circuit connected between an interconnection point of these inductance components and an interconnection point of the control electrode, wherein a cathode of each semiconductor element is connected to each other via an inductance component. Conversion device. 2. A semiconductor power converter in which a plurality of power semiconductor elements are connected in parallel in one arm, wherein the anodes of the respective semiconductor elements are connected to each other, and the control pole of each semiconductor element is connected to a resistor. And the cathode of each semiconductor element is connected to each other via an inductance component, and a drive circuit is connected between an interconnection point of these inductance components and an interconnection point of the resistor. Semiconductor power converter. 3. A semiconductor power converter in which a plurality of power semiconductor elements are connected in parallel in one arm, the anodes of the semiconductor elements are connected to each other, and the control poles of each semiconductor element are connected to each other. In addition, a cathode of each semiconductor element is connected to each other via an inductance component, and a drive circuit is connected between an interconnection point of an auxiliary cathode of each semiconductor element and an interconnection point of the control pole. Semiconductor power converter. 4. A semiconductor power converter in which a plurality of power semiconductor elements are connected in parallel in one arm, the anodes of the semiconductor elements are connected to each other, and the control pole of each semiconductor element is connected to a resistor. Connected to each other via an inductance component, the cathodes of the semiconductor elements are connected to each other via an inductance component, and a drive circuit is connected between the interconnection point of the auxiliary cathode of each semiconductor element and the interconnection point of the resistor. A semiconductor power conversion device characterized by the above-mentioned. 5. The semiconductor power conversion device according to claim 1, wherein an overvoltage absorption circuit is connected between a control pole and a cathode of each semiconductor element.