JP6678293B2 - Chip resistor - Google Patents
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- JP6678293B2 JP6678293B2 JP2016003147A JP2016003147A JP6678293B2 JP 6678293 B2 JP6678293 B2 JP 6678293B2 JP 2016003147 A JP2016003147 A JP 2016003147A JP 2016003147 A JP2016003147 A JP 2016003147A JP 6678293 B2 JP6678293 B2 JP 6678293B2
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Description
本発明は、各種電子機器に使用される低い抵抗値の厚膜抵抗体で形成されたチップ抵抗器の製造方法に関するものである。 The present invention relates to a method of manufacturing a chip resistor formed of a low-resistance thick-film resistor used in various electronic devices.
従来のこの種のチップ抵抗器は、図５〜図７に示すように、絶縁基板１と、この絶縁基板１の上面の両端部に設けられた一対の上面電極２と、絶縁基板１の上面に設けられ、かつ一対の上面電極２間に形成された抵抗体３と、少なくとも抵抗体３を覆うように設けられた保護膜４と、一対の上面電極２と電気的に接続されるように絶縁基板１の両端面に設けられた一対の端面電極５と、上面電極２の一部と一対の端面電極５の表面に形成されためっき層６とを備えていた。また、一対の上面電極２、抵抗体３は上面視で矩形状になっていた。 As shown in FIGS. 5 to 7, this type of conventional chip resistor includes an insulating substrate 1, a pair of upper electrodes 2 provided at both ends of the upper surface of the insulating substrate 1, and an upper surface of the insulating substrate 1. And a resistor 3 formed between the pair of upper electrodes 2, a protective film 4 provided so as to cover at least the resistor 3, and a resistor 3. A pair of end surface electrodes 5 provided on both end surfaces of the insulating substrate 1, a part of the upper surface electrode 2, and a plating layer 6 formed on the surfaces of the pair of end surface electrodes 5 were provided. Further, the pair of upper electrode 2 and resistor 3 had a rectangular shape when viewed from above.
上記した従来のチップ抵抗器においては、近年の高電力化に伴って、抵抗体３の寸法を大きくした場合、一対の上面電極２の露出寸法が小さくなるため、一対の上面電極２が端面電極５覆われてしまい、これにより、一対の上面電極２とめっき層６との接続が不安定になるという課題を有していた。 In the above-described conventional chip resistor, when the size of the resistor 3 is increased with the recent increase in power, the exposed dimension of the pair of upper electrodes 2 is reduced. 5, the connection between the pair of upper electrodes 2 and the plating layer 6 becomes unstable.
上記目的を達成するために本発明は、絶縁基板と、前記絶縁基板の上面の両端部に設けられた一対の上面電極と、前記絶縁基板の上面に設けられ、かつ前記一対の上面電極間に形成された抵抗体と、少なくとも前記抵抗体を覆うように設けられた保護膜と、前記絶縁基板の両端面に設けられた一対の端面電極と、前記一対の端面電極の表面に形成されためっき層とを備え、前記一対の上面電極は、前記抵抗体側に向かって突出する突出部を有し、前記抵抗体は前記一対の上面電極の前記突出部以外の部分に接続し、前記保護膜に前記一対の上面電極の前記突出部が露出するように切欠部を設け、前記切欠部において前記保護膜から露出した前記一対の上面電極と前記めっき層とが電気的に接続されている。
In order to achieve the above object, the present invention provides an insulating substrate, a pair of upper electrodes provided at both ends of an upper surface of the insulating substrate, and provided on the upper surface of the insulating substrate, and between the pair of upper electrodes. The formed resistor, a protective film provided so as to cover at least the resistor, a pair of end electrodes provided on both end surfaces of the insulating substrate, and plating formed on surfaces of the pair of end electrodes. A pair of upper electrodes, the pair of upper electrodes has a protrusion protruding toward the resistor, the resistor is connected to a portion of the pair of upper electrodes other than the protrusion, and the protective film A notch is provided so that the protruding portion of the pair of upper electrodes is exposed, and the pair of upper electrodes exposed from the protective film is electrically connected to the plating layer at the notch.
本発明のチップ抵抗器は、保護膜の切欠部により上面電極の一部が露出しているため、切欠部において上面電極とめっき層の接続信頼性を確保することができるという効果を奏するものである。 The chip resistor of the present invention has an effect that the connection reliability between the upper electrode and the plating layer can be secured in the notch because a part of the upper electrode is exposed by the notch in the protective film. is there.
以下、本発明に一実施の形態におけるチップ抵抗器について、図面を参照しながら説明する。 Hereinafter, a chip resistor according to an embodiment of the present invention will be described with reference to the drawings.
図１、図２は本発明の一実施の形態におけるチップ抵抗器の主要部の上面図、図３は図２のＡ−Ａ線断面図である。 1 and 2 are top views of main parts of a chip resistor according to an embodiment of the present invention, and FIG. 3 is a sectional view taken along line AA of FIG.
本発明の一実施の形態におけるチップ抵抗器は、図１〜図３に示すように、絶縁基板１１と、前記絶縁基板１１の上面の両端部に設けられた一対の上面電極１２と、前記絶縁基板１１の上面に設けられ、かつ前記一対の上面電極１２間に形成された抵抗体１３と、少なくとも前記抵抗体１３を覆うように設けられた保護膜１４とを備え、前記一対の上面電極１２は、前記抵抗体１３側に向かって突出する突出部を有し、前記抵抗体１３は前記一対の上面電極１２の前記突出部以外の部分に接続し、前記保護膜１４に前記一対の上面電極１２の一部が露出するように切欠部１４ａを設けている。 As shown in FIGS. 1 to 3, a chip resistor according to an embodiment of the present invention includes an insulating substrate 11, a pair of upper electrodes 12 provided at both ends of the upper surface of the insulating substrate 11, A resistor 13 provided on the upper surface of the substrate 11 and formed between the pair of upper electrodes 12; and a protective film 14 provided so as to cover at least the resistor 13; Has a protruding portion protruding toward the resistor 13 side, the resistor 13 is connected to a portion of the pair of upper electrodes 12 other than the protruding portion, and the protective film 14 A cutout portion 14a is provided so that a part of 12 is exposed.
なお、図１では、保護膜１４、一対の端面電極１５、めっき層１６を省略し 図２では、一対の端面電極１５、めっき層１６を省略している。 In FIG. 1, the protective film 14, the pair of end face electrodes 15, and the plating layer 16 are omitted, and in FIG. 2, the pair of end face electrodes 15 and the plating layer 16 are omitted.
上記構成において、前記絶縁基板１１は、Ａｌ2Ｏ3を９６％含有するアルミナで構成され、その形状は短形状（上面視にて長方形）となっている。 In the above configuration, the insulating substrate 11 is made of alumina containing 96% of Al 2 O 3, and has a short shape (rectangular as viewed from above).
また、前記一対の上面電極１２は、絶縁基板１１条面の両端部に設けられ、銅からなる厚膜材料を印刷、焼成することによって形成されている。なお、一対の上面電極１２のそれぞれ上面に再上面電極（図示せず）を設けてもよい。そして、一対の上面電極１２には、それぞれ抵抗体１３側に向かって突出する突出部１２ａが形成されている。このとき、突出部１２ａを備えた一対の上面電極１２は絶縁基板１１の中心部に対して点対称になるように形成されている。 The pair of upper electrodes 12 are provided at both ends of the strip surface of the insulating substrate 11, and are formed by printing and firing a thick film material made of copper. Note that an upper surface electrode (not shown) may be provided on the upper surface of each of the pair of upper surface electrodes 12. Each of the pair of upper electrodes 12 has a protruding portion 12a protruding toward the resistor 13 side. At this time, the pair of upper electrodes 12 having the protruding portions 12 a are formed so as to be point-symmetric with respect to the center of the insulating substrate 11.
さらに、前記抵抗体１３は、絶縁基板１１の上面において、一対の上面電極１２間に、銅ニッケル、銀パラジウム、または酸化ルテニウムからなる厚膜材料を印刷した後、焼成することによって形成されている。なお、抵抗体１３に抵抗値調整用のトリミング溝（以下、図示せず）を設けてもよい。このとき、抵抗体１３は蛇行状に形成され、一対の上面電極１２の突出部１２ａが形成されていない箇所に接続される。 Further, the resistor 13 is formed by printing a thick film material made of copper nickel, silver palladium, or ruthenium oxide on the upper surface of the insulating substrate 11 between the pair of upper electrodes 12, and then firing the printed material. . The resistor 13 may be provided with a trimming groove (not shown) for adjusting the resistance value. At this time, the resistor 13 is formed in a meandering shape, and is connected to a portion of the pair of upper electrodes 12 where the protrusion 12a is not formed.
そして、前記保護膜１４は、一対の上面電極１２の一部と抵抗体１３を覆うように設けられている。さらに、前記保護膜１４に切欠部１４ａを形成し、一対の上面電極１２の一部（突出部１２ａ）が露出するようにしている。切欠部１４ａで一対の上面電極１２の一部を露出させるために、一対の上面電極１２に突出部１２ａを形成するとともに、突出部１２ａに抵抗体１３を接続しないようにしている。 The protective film 14 is provided so as to cover a part of the pair of upper electrodes 12 and the resistor 13. Further, a notch 14a is formed in the protective film 14 so that a part (projection 12a) of the pair of upper electrodes 12 is exposed. In order to expose a part of the pair of upper electrodes 12 at the cutouts 14a, the protrusions 12a are formed on the pair of upper electrodes 12, and the resistor 13 is not connected to the protrusions 12a.
この保護膜１４は、エポキシ樹脂で構成され、その幅は、絶縁基板１１の幅と同じ幅であり、保護膜１４の両側面は、絶縁基板１１の両側面から露出する。さらに、切欠部１４ａも保護膜１４の両端部において絶縁基板１１の両側面から露出している。 The protective film 14 is made of an epoxy resin, and has the same width as the width of the insulating substrate 11, and both side surfaces of the protective film 14 are exposed from both side surfaces of the insulating substrate 11. Further, the notches 14 a are also exposed from both side surfaces of the insulating substrate 11 at both ends of the protective film 14.
一対の上面電極１２に突出部１２ａを形成し、抵抗体１３を蛇行状にし、保護膜１４に切欠部１４ａを形成するには、所定の形状にしたマスクを用いて印刷することによって行う。 The projections 12a are formed on the pair of upper electrodes 12, the resistor 13 is formed in a meandering shape, and the notch 14a is formed in the protective film 14 by printing using a mask having a predetermined shape.
また、前記一対の端面電極１５は、絶縁基板１１の両端面に設けられ、保護膜１４から露出した一対の上面電極１２の上面の一部と電気的に接続されるように、Ａｇと樹脂からなる材料を印刷することによって形成される。なお、金属材料をスパッタすることにより形成してもよい。 The pair of end electrodes 15 are provided on both end surfaces of the insulating substrate 11, and are made of Ag and resin so as to be electrically connected to a part of the upper surfaces of the pair of upper electrodes 12 exposed from the protective film 14. Formed by printing a material. Note that the metal material may be formed by sputtering.
さらに、この一対の端面電極１５の表面には、Ｎｉめっき層、Ｓｎめっき層からなるめっき層１６が形成されている。このとき、めっき層１６は保護膜１４と接している。 Further, a plating layer 16 composed of a Ni plating layer and a Sn plating layer is formed on the surface of the pair of end surface electrodes 15. At this time, the plating layer 16 is in contact with the protective film 14.
一対の上面電極１２には、めっき層１６が一対の端面電極１５を間に介して電気的に接続している箇所もあるが、突出部１２ａでは、一対の端面電極１５を介さずにめっき層１６と直接密着して形成されている。なお、一対の端面電極１５とめっき層１６と直接接続されている部分の長さは、切欠部１４ａの長さの５０％以上が必要である。 Although the plating layer 16 is electrically connected to the pair of upper electrodes 12 via the pair of end electrodes 15, the plating layer 16 is not connected to the pair of upper electrodes 12 without the pair of end electrodes 15. 16 and is formed in direct contact with it. Note that the length of the portion directly connected to the pair of end surface electrodes 15 and the plating layer 16 needs to be 50% or more of the length of the cutout portion 14a.
上記したように本発明の一実施の形態においては、保護膜１４に切欠部１４ａを設け、さらに一対の上面電極１２に突出部１２ａを設けて、この突出部１２ａを保護膜１４から露出させるように切欠部１４ａを位置させているため、切欠部１４ａにおいてめっき層１６と一対の上面電極１２の接続を確保でき、これにより、抵抗体１３の寸法を大きくしたり、端面電極１５の廻り込みが大きくなったりしても、めっき層１６と一対の上面電極１２との接続性を向上させることができるという効果が得られるものである。 As described above, in one embodiment of the present invention, the notch 14a is provided in the protective film 14, the protrusion 12a is provided in the pair of upper electrodes 12, and the protrusion 12a is exposed from the protective film 14. Since the notch 14a is located in the notch 14a, the connection between the plating layer 16 and the pair of upper electrodes 12 can be ensured in the notch 14a, whereby the size of the resistor 13 can be increased, and Even if it becomes larger, the effect that the connectivity between the plating layer 16 and the pair of upper electrodes 12 can be improved can be obtained.
すなわち、従来のチップ抵抗器では、一対の上面電極１２の露出部分が少ないため、端面電極１５が一対の上面電極１２を全て覆って保護膜１４にオーバーラップしてしまい、めっき層１６と一対の上面電極１２が直接接続する部分がなくなり、これにより、接続性に問題が生じる可能性があったが、本発明では、保護膜１４の切欠部１４ａによって一対の上面電極１２の突出部１２ａを保護膜１４から露出させてその露出部分を大きくし、端面電極１５が一対の上面電極１２の全てを覆うことがないようにしている。 That is, in the conventional chip resistor, since the exposed portion of the pair of upper electrodes 12 is small, the end surface electrode 15 covers the entire pair of upper electrodes 12 and overlaps with the protective film 14, and the plating layer 16 and the pair of upper electrodes 12 There is no portion where the upper electrode 12 is directly connected, which may cause a problem in connectivity. However, in the present invention, the protrusions 12a of the pair of upper electrodes 12 are protected by the cutouts 14a of the protective film 14. It is exposed from the film 14 and its exposed portion is enlarged so that the end face electrode 15 does not cover all of the pair of upper electrodes 12.
また、特に、一対の端面電極１５を、樹脂銀を塗布して形成し、その際にペーストが保護膜１４側へ大きく廻り込んでしまっても、めっき層１６と一対の上面電極１２との接続性を維持することができる。 Further, in particular, the pair of end surface electrodes 15 are formed by applying resin silver, and even if the paste largely wraps around the protective film 14 at this time, the connection between the plating layer 16 and the pair of upper surface electrodes 12 is prevented. Sex can be maintained.
ここで、本願のチップ抵抗器では、図４に示すように、分割用の縦分割部２１ａと横分割部２１ｂを複数有し１個のチップ抵抗器に相当するチップ領域２２が複数区画されているシート状絶縁基板２３に、横分割部２１ｂを跨ぐように帯状に保護膜１４を形成するが、保護膜１４に絶縁基板１１の両側面から露出するように、すなわち、横分割部２１ｂを跨ぐように切欠部１４ａを形成しているため、分割しなければならない保護膜１４の量（絶縁基板１１と保護膜１４の全体の厚み）が、切欠部１４ａを形成していない場合に比べて減り、これにより、バリの発生等を低減でき、分割性が向上する。 Here, in the chip resistor of the present application, as shown in FIG. 4, a plurality of chip regions 22 each having a plurality of vertical dividing portions 21a and horizontal dividing portions 21b for division and corresponding to one chip resistor are divided. The protective film 14 is formed in a strip shape on the sheet-shaped insulating substrate 23 so as to straddle the horizontal dividing portion 21b, but is exposed on both sides of the insulating substrate 11 on the protective film 14, ie, straddling the horizontal dividing portion 21b. Since the notch portion 14a is formed as described above, the amount of the protective film 14 which must be divided (the total thickness of the insulating substrate 11 and the protective film 14) is reduced as compared with the case where the notch portion 14a is not formed. Thus, the occurrence of burrs and the like can be reduced, and the dividing property is improved.
なお、突出部１２ａを備えた一対の上面電極１２は絶縁基板１１の中心部に対して点対称になるように形成しているが、抵抗体１３、保護膜１４も、絶縁基板１１の中心部に対して点対称になるように形成してもよい。 The pair of upper electrodes 12 having the protruding portions 12a are formed so as to be point-symmetric with respect to the center of the insulating substrate 11, but the resistor 13 and the protective film 14 are also formed at the center of the insulating substrate 11. May be formed so as to be point-symmetric with respect to.
点対称にすることによって、抵抗体１３の有効長を長くすることができるため、耐サージ等の電力面での特性が向上する。 By making the point symmetric, the effective length of the resistor 13 can be lengthened, so that the characteristics in terms of power such as surge resistance can be improved.
本発明におけるチップ抵抗器は、一対の上面電極とめっき層との接続性を向上させることができるという効果を有するものであり、特に、各種電子機器に使用される低い抵抗値の厚膜抵抗体で形成されたチップ抵抗器等において有用となるものである。 The chip resistor according to the present invention has an effect that the connectivity between the pair of upper electrodes and the plating layer can be improved, and in particular, a thick film resistor having a low resistance value used in various electronic devices. This is useful in a chip resistor or the like formed by the above method.
１１ 絶縁基板
１２ 一対の上面電極
１２ａ 突出部
１３ 抵抗体
１４ 保護膜
１４ａ 切欠部
DESCRIPTION OF SYMBOLS 11 Insulating substrate 12 A pair of upper surface electrodes 12a Projection 13 Resistor 14 Protective film 14a Notch
Claims (1)
An insulating substrate, a pair of upper electrodes provided at both ends of an upper surface of the insulating substrate, a resistor provided on the upper surface of the insulating substrate, and formed between the pair of upper electrodes, and at least the resistor A protective film provided so as to cover the insulating substrate, a pair of end surface electrodes provided on both end surfaces of the insulating substrate, and a plating layer formed on surfaces of the pair of end surface electrodes, and the pair of upper surface electrodes A protruding portion protruding toward the resistor side, wherein the resistor is connected to a portion other than the protruding portion of the pair of upper electrodes, and the protruding portions of the pair of upper electrodes are exposed to the protective film. A chip resistor in which the pair of upper electrodes exposed from the protective film and the plating layer are electrically connected at the notch portion .
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2016003147A JP6678293B2 (en) | 2016-01-12 | 2016-01-12 | Chip resistor |
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| Application Number | Priority Date | Filing Date | Title |
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| JP2016003147A JP6678293B2 (en) | 2016-01-12 | 2016-01-12 | Chip resistor |
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| Publication Number | Publication Date |
|---|---|
| JP2017126593A JP2017126593A (en) | 2017-07-20 |
| JP6678293B2 true JP6678293B2 (en) | 2020-04-08 |
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| JP2016003147A Active JP6678293B2 (en) | 2016-01-12 | 2016-01-12 | Chip resistor |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5995601U (en) * | 1982-12-17 | 1984-06-28 | 松下電器産業株式会社 | printed resistor |
| JPS63208201A (en) * | 1987-02-24 | 1988-08-29 | イビデン株式会社 | Printed wiring board with printed resistor |
| JPH0310502U (en) * | 1989-06-19 | 1991-01-31 | ||
| JP2854492B2 (en) * | 1993-03-24 | 1999-02-03 | ローム株式会社 | Chip resistor |
| JP3766497B2 (en) * | 1997-01-08 | 2006-04-12 | ローム株式会社 | Structure of chip resistor and manufacturing method thereof |
| JP3766493B2 (en) * | 1996-12-20 | 2006-04-12 | ローム株式会社 | Structure of chip resistor and manufacturing method thereof |
| JP3948701B2 (en) * | 2000-12-28 | 2007-07-25 | 太陽社電気株式会社 | Chip resistor |
| JP4594117B2 (en) * | 2004-06-03 | 2010-12-08 | 太陽社電気株式会社 | Chip resistor |
| JP2007165358A (en) * | 2005-12-09 | 2007-06-28 | Rohm Co Ltd | Chip-type capacitor |
| JP6371080B2 (en) * | 2014-03-04 | 2018-08-08 | Koa株式会社 | Manufacturing method of chip resistor |
| JP6339452B2 (en) * | 2014-08-26 | 2018-06-06 | Koa株式会社 | Chip resistor and its mounting structure |
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