JP2007165358A - Chip-type capacitor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a chip-type resistor provided with accurate and low resistance without making a chip substrate larger in size. <P>SOLUTION: The chip resistor is provided with a set of a first side edge and a second side edge being parallel to each other, a top-view square chip substrate which is provided with a set of a third side edge and a fourth side edge being parallel to each other that orthogonally cross the first and second side edges respectively, an upper first electrode and an upper second electrode which are provided along the first and second side edges respectively, and a resistor which is provided on the upper surface of the chip substrate while both ends are being overlaying on the upper first electrode and the upper second electrode, respectively. In this case, the upper first electrode is provided with a first projection projecting to the upper second electrode along the third side edge, and the upper second electrode is provided with a second projection projecting to the upper first electrode along the fourth side edge. Furthermore, the resistor is arranged while the side edges are being overlaid on the first and second projections. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a chip resistor, and particularly has a feature in the shape of an upper electrode connected to a resistor of the chip resistor.

  Conventionally, a chip resistor is composed of a rectangular chip substrate in plan view with a resistor provided on the upper surface. This chip substrate is a large ceramic substrate having a grid-like dividing groove. A chip-type electronic device that is formed by dividing, and after forming a required structure such as an electrode and a resistor on a large-sized substrate, it is divided along a dividing groove to form a chip substrate. As parts.

  That is, the manufacturing process of the chip resistor will be briefly described with reference to FIG. 4. As shown in FIG. 4A, the large substrate 100 made of ceramic includes a plurality of first grooves 110 parallel to each other, A rectangular chip substrate region 130 is formed by providing a plurality of second grooves 120 orthogonal to the first grooves 110.

  Next, an upper first electrode 140a and an upper second electrode 140b are formed in each rectangular chip substrate region 130 of the large substrate 100 along the first groove 110, as shown in FIG. 4B. Yes. The upper first electrode 140a and the upper second electrode 140b are formed by applying an electrode paste across the first groove 110 and sintering the electrode paste, and adjacent to each other across the first groove 110. The upper first electrode 140a of the chip substrate region 130 and the upper second electrode 140b of the other chip substrate region 130 are integrally formed.

  Next, as shown in FIG. 4C, the resistor 150 is formed by applying and sintering a resistor paste between the upper first electrode 140a and the upper second electrode 140b. The resistor 150 has its both ends overlapped with the upper first electrode 140a and the upper second electrode 140b, respectively, and is reliably connected to the upper first electrode 140a and the upper second electrode 140b.

  Next, as shown in FIG. 4D, a protective glass layer 160 is formed on the upper surface of the resistor 150 by printing and sintering a glass paste, and then, as shown in FIG. The resistance value is adjusted while forming a trimming groove 170 on the laser 150 by laser trimming.

  After adjusting the resistance value, an overcoat layer 180 is formed on the upper surface of the protective glass layer 160 by printing and curing a glass paste or a resin paste as shown in FIG. ing. Note that before the overcoat layer 180 is formed, the trimming groove 170 may be backfilled by thinly printing and sintering a glass paste or the like on the upper surface of the resistor 150.

  After the overcoat layer 180 is formed, the large substrate 100 is divided along the first groove 110 to form a bar-shaped substrate 200 in which the chip substrates 300 are arranged in a row as shown in FIG. A side electrode 210 is formed by applying and sintering an electrode paste on the exposed surface of the bar-shaped substrate 200 exposed as a result of division in one groove 110, and then forming the bar-shaped substrate 200 along the second groove 120. Are divided into individual chip substrates 300.

The chip substrate 300 is further plated to form a solder film on the side electrode 210 portion, thereby forming a chip resistor as a product (see, for example, Patent Document 1).
JP 2001-118705 A

However, recently, a chip resistor having a low resistance value with high accuracy is required for removing noise in an electric circuit, and the following methods can be considered to reduce the resistance value.
(1) A resistor is formed of a low resistivity resistor material.
(2) Increase the thickness of the resistor.
(3) Increase the width dimension of the resistor.
(4) The distance between the upper first electrode and the upper second electrode is reduced.

  As in (1), when a resistor is formed of a low resistivity resistor material, the resistance of the resistor paste as the resistor is not sufficiently stable, and it is difficult to form a phosphor having desired characteristics. there were. In addition, when the thickness of the resistor is increased as in (2), it is necessary to increase the viscosity of the resistor paste as the resistor, and as a result, the printability of the resistor paste decreases. There was a risk that the production yield would decrease. Further, as in (3), when the width of the resistor is increased, it is necessary to increase the size of the chip substrate, which increases the size of the chip resistor, which makes it necessary to reduce the size of the chip resistor. There was a risk of not being able to respond. Further, as shown in (4), when the distance between the upper first electrode and the upper second electrode is reduced, the formation of the trimming groove may be hindered, which is not a practical solution.

  In view of such a current situation, the present inventor has developed to provide an accurate low resistance chip resistor without increasing the size of the chip substrate, and has achieved the present invention. .

  In the chip resistor of the present invention, a set of mutually parallel first side edges and second side edges, and a set of mutually parallel third sides that are orthogonal to each other. A rectangular chip substrate having a side edge and a fourth side edge, and an upper first electrode and an upper second electrode provided on the upper surface of the chip substrate along the first side edge and the second side edge, respectively. And a resistor provided on the upper surface of the chip substrate with both ends superimposed on the upper first electrode and the upper second electrode, the upper first electrode has a third side edge A first protrusion projecting toward the upper second electrode along the upper second electrode, and a second protrusion projecting toward the upper first electrode along the fourth side edge on the upper second electrode. The side edge portion is disposed so as to overlap the first protrusion and the second protrusion.

  Further, the trimming groove formed by trimming the resistor is between the upper first electrode side end of the second protrusion and the upper first electrode, or the upper second electrode side end of the first protrusion. And the upper second electrode is also characterized by being formed as a starting point.

  According to the first aspect of the present invention, a set of mutually parallel first and second side edges and a set of mutually parallel third sides that are orthogonal to each other. A rectangular chip substrate having a side edge and a fourth side edge, and an upper first electrode and an upper second electrode provided on the upper surface of the chip substrate along the first side edge and the second side edge, respectively. And a resistor provided on the upper surface of the chip substrate with both ends superimposed on the upper first electrode and the upper second electrode, the upper first electrode has a third side edge A first protrusion projecting toward the upper second electrode along the upper second electrode, and a second protrusion projecting toward the upper first electrode along the fourth side edge on the upper second electrode. The side edge portion is arranged so as to overlap the first protrusion and the second protrusion, thereby reducing the size of the chip substrate. Contact area hear the contact area of the resistor and the upper first electrode without, and the resistor and the upper second electrode can be increased, the resistance value of the resistor can be reduced.

  In addition, since the first protrusion and the second protrusion overlap with the side edges of the resistor, the resistor paste can be prevented from flowing and spreading when the resistor paste serving as the resistor is applied. Since the thickness can be increased, the resistance can be reduced.

  According to a second aspect of the present invention, in the chip resistor according to the first aspect, the trimming groove formed by trimming the resistor includes the upper first electrode side end portion of the second protrusion and the upper first electrode. , Or between the upper second electrode side end of the first protrusion and the upper second electrode, the trimming groove can be reliably formed and the resistance value can be adjusted reliably. it can.

  The chip resistor of the present invention is characterized by the shapes of the upper first electrode and the upper second electrode respectively connected to both ends of a resistor formed on the upper surface of the chip substrate.

  The upper first electrode and the upper second electrode are respectively provided along the first side edge and the second side edge parallel to each other of the chip substrate. In particular, the upper first electrode is directed toward the upper second electrode. A protruding first protruding portion is provided, and the upper second electrode is provided with a second protruding portion protruding toward the upper first electrode.

  The first projecting portion is formed on a third side edge of the pair of parallel third side edge and fourth side edge of the chip substrate that is orthogonal to the first side edge and the second side edge of the chip substrate. The second projecting portion projects along the fourth side edge of the chip substrate.

  In addition, since the resistor is disposed so as to overlap the first protrusion provided on the upper first electrode and the second protrusion provided on the upper second electrode, the resistor and the upper first electrode are arranged. The contact area and the contact area between the resistor and the upper second electrode can be increased, and the resistance value of the resistor can be reduced.

  In particular, since the contact area between the resistor and the upper first electrode and the contact area between the resistor and the upper second electrode can be increased without increasing the size of the chip substrate, the chip resistor is increased in size. Can be prevented.

  Furthermore, the first protrusion and the second protrusion have an action as a dam (dam) that suppresses the spread of the resistor paste when the resistor paste serving as a resistor is applied to the chip substrate. Since the thickness of the resistor can be increased, the resistance of the resistor can be further reduced.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a schematic diagram showing a state in which an upper first electrode 14a, an upper second electrode 14b, and a resistor 15 are formed on a chip substrate 30 in the chip resistor of the present embodiment.

  The chip substrate 30 includes a set of mutually parallel first side edges 31 and second side edges 32, and a set of mutually parallel first side edges 31 and second side edges 32 that are orthogonal to each other. A rectangular ceramic flat plate having a third side edge 33 and a fourth side edge 34 is formed by being divided from a large ceramic substrate as will be described later.

  The upper first electrode 14 a is provided along the first side edge 31 of the chip substrate 30, and the upper second electrode 14 b is provided along the second side edge 31 of the chip substrate 30.

  In particular, the upper first electrode 14a is provided with a first projecting portion t1 projecting toward the upper second electrode 14b along the third side edge 33, and the upper second electrode 14b is provided with a fourth side edge 34. A second projecting portion t2 projecting to the upper first electrode 14a side is provided, and the upper first electrode 14a and the upper second electrode 14b are each substantially L-shaped.

  The resistor 15 is formed by applying a resistor paste in a substantially rectangular shape by screen printing and baking, and one end is overlapped with the upper first electrode 14a and the other end is overlapped with the upper second electrode 14b. Furthermore, the side edge portion of the resistor 15 is overlapped with the first protrusion t1, and the side edge portion of the resistor 15 is also overlapped with the second protrusion t2.

  By providing the resistor 15 in this way, the contact area between the resistor 15 and the upper first electrode 14a and the contact area between the resistor 15 and the upper second electrode 14b can be made substantially L-shaped to increase the contact area. In addition, the resistance value of the resistor 15 can be reduced as the contact area increases.

  Hereinafter, the manufacturing process of the chip resistor of the present embodiment will be described with reference to FIG. As shown in FIG. 2A, the chip resistor according to the present embodiment is manufactured using a ceramic large-sized substrate 10, and the large-sized substrate 10 includes a plurality of second parallel substrates. One chip 11 and a plurality of second grooves 12 orthogonal to the first groove 11 are provided to form a rectangular chip substrate region 13.

  Next, on the upper surface of the large-sized substrate 10, an electrode paste is printed at a predetermined position by screen printing, and the printed electrode paste is sintered, and as shown in FIG. A first electrode 14a and an upper second electrode 14b are formed.

  In particular, the upper first electrode 14a is formed with a first protrusion t1 that protrudes along the second groove 12 toward the upper second electrode 14b, and the upper second electrode 14b has a second groove. A second projecting portion t2 projecting toward the upper first electrode 14a along the line 12 is formed, and the upper first electrode 14a and the upper second electrode 14b are substantially L-shaped.

  In the present embodiment, the electrode paste is applied across the first groove 11, and the upper first electrode 14 a of one chip substrate region 13 adjacent to the first groove 11 and the other chip substrate region 13 are sandwiched. The upper second electrode 14b is integrally formed. The electrode paste is mixed with silver powder, and the upper first electrode 14a and the upper second electrode 14b are respectively silver electrodes.

  Although not shown, an electrode paste is similarly printed on the lower surface of the large-sized substrate 10 by screen printing at a predetermined position, and the printed electrode paste is sintered to form a lower first electrode 14c and a lower second electrode 14d. (See FIG. 2 (g)).

  After each electrode 14a, 14b, 14c, 14d is formed, a resistor paste is printed in a rectangular shape by screen printing between the upper first electrode 14a and the upper second electrode 14b in each chip substrate region 13, The printed resistor paste is sintered to form the resistor 15 in each chip substrate region 13 as shown in FIG. In the present embodiment, the resistor paste uses ruthenium as a main raw material.

  In particular, the resistor paste used as the resistor 15 is applied to the first projecting portion t1 of the upper first electrode 14a and the second projecting portion t2 of the upper second electrode 14b while being superposed on the first projecting portion t1. Since the resistor paste can be prevented from flowing and spreading by the portion t1 and the second protruding portion t2, the resistor 15 can be formed in a thick film shape.

  After the resistor 15 is formed, a glass paste is printed in a predetermined shape by screen printing on the upper surface of the resistor 15 in each chip substrate region 13, and the printed glass paste is sintered, so that FIG. As shown in FIG. 2, a protective glass layer 16 covered with a resistor 15 is formed on each chip substrate region 13.

  After the protective glass layer 16 is formed, the probe 15 (not shown) is brought into contact with the upper first electrode 14a and the upper second electrode 14b, respectively, and the resistor 15 is laser trimmed while measuring the current value or voltage value of the resistor 15. Thus, the resistance value of the resistor 15 is adjusted. In FIG. 2E, reference numeral 17 denotes a trimming groove carved in the resistor 15 by laser trimming.

  In particular, when trimming is performed, as shown in FIG. 2E, a trimming groove 17 is formed starting from the end of the second protrusion t2 on the upper first electrode 14a side and the upper first electrode 14a. By forming the trimming groove 17, the resistance value can be reliably adjusted. The trimming groove 17 may be formed starting from the end of the first protrusion t1 on the upper second electrode 14b side and the upper second electrode 14b.

  After adjusting the resistance value by laser trimming, an overcoat layer 18 is formed on the upper surface of the protective glass layer 16 by printing and curing a glass paste or a resin paste as shown in FIG. Insulating coating. Before the overcoat layer 18 is formed, the trimming grooves 17 may be backfilled by thinly printing glass paste or the like on the upper surface of the resistor 15 and sintering it.

  After the overcoat layer 18 is formed, the large substrate 10 is divided along the first groove 11 to form the bar-shaped substrate 20 in which the chip substrates 30 are arranged in a row as shown in FIG. . A first side edge 31 and a second side edge 32 of the chip substrate 30 are formed by dividing the large substrate 10 along the first groove 11.

  After dividing the large-sized substrate 10 into the bar-shaped substrate 20, the upper first electrode 14a and the lower first electrode are applied to the exposed surfaces of the bar-shaped substrate 20 exposed by the division by applying and sintering an electrode paste, respectively. Forming a first side electrode (not shown) that electrically connects the electrode 14c and a second side electrode (not shown) that electrically connects the upper second electrode 14b and the lower second electrode 14d; ing.

  After the formation of the first side electrode and the second side electrode, the bar-shaped substrate 20 is divided along the second groove 12 to obtain individual chip substrates 30, and this chip substrate is subjected to a barrel plating process. As shown in FIG. 2 (h), a plating film 35 is formed on the first side electrode portion and the second side electrode portion to form a chip resistor. The plating film 35 has a laminated structure of a nickel plating film and a solder plating film. By dividing the bar-shaped substrate 20 along the second groove 12, a third side edge 33 and a fourth side edge 34 of the chip substrate 30 are formed.

  By forming the chip resistor as described above, a chip resistor of 50 mΩ or less can be formed with extremely high accuracy. In the present embodiment, the chip resistor in which one resistor 15 is provided on one chip substrate 30 has been described. However, in the case of a multiple chip resistor in which a plurality of resistors are provided on one chip substrate, an electrode can be used. Are formed in the same manner, a multi-chip resistor having a low resistance value can be obtained.

  In the embodiment described above, the upper first electrode 14a and the upper second electrode 14b are formed in the same pattern in each chip substrate region 13 as shown in FIG. 2B. As shown in FIG. 3, the upper first electrode 14a and the upper second electrode 14b have a mirror symmetry pattern on the chip substrate region 13 adjacent to the second groove 12 with the second groove 12 as a mirror symmetry axis. It may be formed.

  When the upper first electrode 14a and the upper second electrode 14b are formed in such a mirror-symmetric pattern, the first protrusion t1 of the upper first electrode 14a adjacent to the second groove 12 sandwiched therebetween, and The second protruding portions t2 of the upper second electrodes 14b adjacent to each other with the second groove 12 interposed therebetween can be integrally formed with the second groove 12 interposed therebetween.

  Therefore, even if the width dimension in the direction orthogonal to the protruding direction of the first protruding portion t1 and the second protruding portion t2 is reduced, the first protruding portion t1 and the second protruding portion t2 can be reliably formed.

  In particular, since the first protrusion t1 and the second protrusion t2 formed integrally with the second groove 12 are formed by applying and baking the electrode paste, it is possible to have a higher raised shape. When the resistor paste is applied to the upper surface of the first projecting portion t1 and the upper surface of the second projecting portion t2, it is easy to prevent the resistor paste from spreading and form the resistor 15 in a thicker film. Can do.

It is a plane view schematic schematic diagram of the chip resistor concerning the embodiment of the present invention. It is manufacturing process explanatory drawing of the chip resistor concerning embodiment of this invention. It is explanatory drawing of a transformation residence. It is manufacturing process explanatory drawing of the conventional chip resistor.

Explanation of symbols

10 Large format board
11 1st groove
12 Second groove
13 Chip substrate area
14a Upper first electrode
14b Upper second electrode
14c Lower first electrode
14d Lower second electrode
15 resistor
16 Protective glass layer
17 Trimming groove
18 Overcoat layer
20 Bar substrate
30 chip substrate
31 First side edge
32 Second side edge
33 3rd side edge
34 4th side edge
35 Plating film
t1 First protrusion
t2 Second protrusion

Claims (2)

A set of mutually parallel first and second side edges, and a set of mutually parallel third and fourth side edges that are orthogonal to the first and second side edges respectively. A rectangular chip substrate in plan view with
An upper first electrode and an upper second electrode provided on the upper surface of the chip substrate along the first side edge and the second side edge, respectively;
In a chip resistor comprising a resistor provided on the upper surface of the chip substrate while overlapping both ends of the upper first electrode and the upper second electrode,
The upper first electrode is provided with a first protrusion that protrudes toward the upper second electrode along the third side edge,
The upper second electrode is provided with a second protrusion that protrudes toward the upper first electrode along the fourth side edge,
The resistor is a chip resistor, wherein a side edge portion is disposed so as to overlap the first protrusion and the second protrusion.   The trimming groove formed by trimming the resistor is formed between the upper first electrode side end of the second protrusion and the upper first electrode, or the upper second of the first protrusion. 2. The chip resistor according to claim 1, wherein the chip resistor is formed with a gap between an electrode side end portion and the upper second electrode as a starting point.

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