JP2017123411A

JP2017123411A - Chip resistor

Info

Publication number: JP2017123411A
Application number: JP2016002218A
Authority: JP
Inventors: 麻実山本; Asami Yamamoto; 山田　孝一; Koichi Yamada; 孝一山田; 祥吾中山; Shogo Nakayama
Original assignee: Panasonic Intellectual Property Management Co Ltd
Current assignee: Panasonic Intellectual Property Management Co Ltd
Priority date: 2016-01-08
Filing date: 2016-01-08
Publication date: 2017-07-13

Abstract

PROBLEM TO BE SOLVED: To provide a chip resistor capable of surely and directly connecting a plating layer and a part of an upper surface electrode.SOLUTION: A chip resistor is provided with recess portions 11b which are formed on both end portions of an insulating substrate 11 through steps 11a and opened on the upper surface and the end face, parts of a pair of upper surface electrodes 12 are formed on the inner walls of the recess portions 11b, the respective end portions of a pair of end surface electrodes 15 are positioned on the inner walls of the recess portions 11b, and both end portions of a resistor 13 and a protective film 14 are located to be nearer to the center portion of the insulating substrate 11 than the steps 11a.SELECTED DRAWING: Figure 1

Description

本発明は、各種電子機器に使用される低い抵抗値の厚膜抵抗体で形成されたチップ抵抗器に関するものである。 The present invention relates to a chip resistor formed of a thick film resistor having a low resistance value used in various electronic devices.

従来のこの種のチップ抵抗器は、図２に示すように、絶縁基板１と、この絶縁基板１の上面の両端部に設けられた一対の上面電極２と、絶縁基板１の上面に設けられ、かつ一対の上面電極２間に形成された抵抗体３と、少なくとも抵抗体３を覆うように設けられた保護膜４と、一対の上面電極２と電気的に接続されるように絶縁基板１の両端面に設けられた一対の端面電極５と、上面電極２の一部と一対の端面電極５の表面に形成されためっき層６とを備えていた。 As shown in FIG. 2, this type of conventional chip resistor is provided on an insulating substrate 1, a pair of upper surface electrodes 2 provided at both ends of the upper surface of the insulating substrate 1, and an upper surface of the insulating substrate 1. And the insulating substrate 1 so as to be electrically connected to the resistor 3 formed between the pair of upper surface electrodes 2, the protective film 4 provided so as to cover at least the resistor 3, and the pair of upper surface electrodes 2. A pair of end face electrodes 5 provided on both end faces of the, and a part of the upper surface electrode 2 and a plating layer 6 formed on the surface of the pair of end face electrodes 5.

なお、この出願の発明に関する先行技術文献情報としては、例えば、特許文献１が知られている。 As prior art document information relating to the invention of this application, for example, Patent Document 1 is known.

特開２００３−３４７１０２号公報JP 2003-347102 A

上記した従来のチップ抵抗器においては、サイズが小さい場合、上面電極２の露出余裕度が小さくなるため、図３に示すように、端面電極５を塗布した際に上面電極２の表面を端面電極５が全て覆ってしまい、めっき層６が端面電極５のみと電気的に接続し、めっき層６と上面電極２との直接的な接続がない不具合が発生する可能性があるという課題を有していた。 In the conventional chip resistor described above, when the size is small, the exposure margin of the upper surface electrode 2 becomes smaller. Therefore, when the end surface electrode 5 is applied as shown in FIG. 5 is completely covered, and the plating layer 6 is electrically connected only to the end face electrode 5, and there is a problem that there may be a problem that the plating layer 6 and the upper surface electrode 2 are not directly connected. It was.

本発明は上記従来の課題を解決するもので、めっき層と上面電極を確実に接続させることができるチップ抵抗器を提供することを目的とするものである。 The present invention solves the above-described conventional problems, and an object of the present invention is to provide a chip resistor that can reliably connect a plating layer and an upper surface electrode.

上記目的を達成するために本発明は、絶縁基板の両端部に段差を介して形成されかつ上面および端面に開口する凹部を設け、一対の上面電極の一部を凹部の内壁に形成し、一対の端面電極の各端部を凹部の内壁に位置させ、抗体および保護膜の両端部を段差より絶縁基板の中央部側に位置させている。 In order to achieve the above object, the present invention provides a recess formed on both ends of an insulating substrate through a step and opening on the upper surface and the end surface, and a part of the pair of upper surface electrodes is formed on the inner wall of the recess. Each end of the end face electrode is positioned on the inner wall of the recess, and both ends of the antibody and the protective film are positioned closer to the center of the insulating substrate than the step.

本発明のチップ抵抗器は、絶縁基板の両端部に段差を介して形成されかつ上面および端面に開口する凹部を設けているため、端面電極が段差を越えて凹部より内側に伸びるのを防止でき、これにより、部めっき層と上面電極の一部を確実に直接的に接続させることができるという優れた効果を奏するものである。 Since the chip resistor of the present invention is provided with recesses formed at both ends of the insulating substrate through steps and opening at the top surface and end surface, the end surface electrode can be prevented from extending beyond the recesses beyond the step. Thus, the excellent effect that the partial plating layer and a part of the upper surface electrode can be directly and reliably connected is obtained.

本発明の一実施の形態におけるチップ抵抗器の断面図Sectional drawing of the chip resistor in one embodiment of this invention 従来のチップ抵抗器の断面図Cross-sectional view of a conventional chip resistor 従来のチップ抵抗器の不具合を示す断面図Cross-sectional view showing defects of conventional chip resistors

以下、本発明の一実施の形態におけるチップ抵抗器について、図面を参照しながら説明する。 Hereinafter, a chip resistor according to an embodiment of the present invention will be described with reference to the drawings.

図１は本発明の一実施の形態におけるチップ抵抗器の断面図である。 FIG. 1 is a cross-sectional view of a chip resistor according to an embodiment of the present invention.

本発明の一実施の形態におけるチップ抵抗器は、図１に示すように、絶縁基板１１と、前記絶縁基板１１の上面の両端部に設けられた一対の上面電極１２と、前記絶縁基板１１の上面に設けられ、かつ前記一対の上面電極１２間に形成された抵抗体１３と、少なくとも前記抵抗体１３を覆うように設けられた保護膜１４と、前記絶縁基板１１の両端面に前記一対の上面電極１２と電気的に接続されるように設けられた一対の端面電極１５と、前記一対の端面電極１５と前記一対の上面電極１２を覆うように設けられためっき層１６とを備えた構成としている。そして前記絶縁基板１１の両端部に段差１１ａを介して形成されかつ上面および端面に開口する凹部１１ｂを設け、前記一対の上面電極１２の一部を前記凹部１１ｂの内壁に形成し、前記一対の端面電極１５の各端部を前記凹部１１ｂの内壁に位置させ、前記抵抗体１３および前記保護膜１４の両端部を前記段差１１ａより前記絶縁基板１１の中央部側に位置させている。 As shown in FIG. 1, a chip resistor according to an embodiment of the present invention includes an insulating substrate 11, a pair of upper surface electrodes 12 provided at both ends of the upper surface of the insulating substrate 11, and the insulating substrate 11. A resistor 13 provided on the upper surface and formed between the pair of upper surface electrodes 12, a protective film 14 provided so as to cover at least the resistor 13, and the pair of insulating substrates 11 on both end surfaces A configuration including a pair of end surface electrodes 15 provided so as to be electrically connected to the upper surface electrode 12, and a plating layer 16 provided so as to cover the pair of end surface electrodes 15 and the pair of upper surface electrodes 12. It is said. A recess 11b is formed at both ends of the insulating substrate 11 through a step 11a and is open to the upper surface and the end surface. A part of the pair of upper surface electrodes 12 is formed on the inner wall of the recess 11b. Each end of the end face electrode 15 is positioned on the inner wall of the recess 11b, and both ends of the resistor 13 and the protective film 14 are positioned closer to the center of the insulating substrate 11 than the step 11a.

上記構成において、前記絶縁基板１１は、Ａｌ₂Ｏ₃を９６％含有するアルミナで構成され、その形状は矩形状となっている。 In the above configuration, the insulating substrate 11 is made of alumina containing 96% Al ₂ O ₃ and has a rectangular shape.

また、前記一対の上面電極１２は、絶縁基板１１上面の両端部に設けられ、銀または銅からなる厚膜材料を印刷、焼成することによって形成されている。 The pair of upper surface electrodes 12 are provided at both ends of the upper surface of the insulating substrate 11 and are formed by printing and baking a thick film material made of silver or copper.

さらに、前記抵抗体１３は、絶縁基板１１の上面において、一対の上面電極１２間に、銀パラジウム、酸化ルテニウム、または銅ニッケルからなる厚膜材料を印刷した後、焼成することによって形成されている。なお、抵抗体１３を覆うようにプリコートガラスなどの保護ガラス層を設けてもよい。また、抵抗体１３に抵抗値調整用のトリミング溝（以下、図示せず）を設けてもよい。 Further, the resistor 13 is formed on the upper surface of the insulating substrate 11 by printing a thick film material made of silver palladium, ruthenium oxide, or copper nickel between the pair of upper surface electrodes 12 and then firing the printed material. . A protective glass layer such as pre-coated glass may be provided so as to cover the resistor 13. Further, the resistor 13 may be provided with a trimming groove for adjusting a resistance value (hereinafter not shown).

また、前記保護膜１４は一対の上面電極１２の一部と抵抗体１３を覆うように、ガラスまたはエポキシ樹脂からなる厚膜材料により設けられている。ここで、前記抵抗体１３と前記保護膜１４は前記絶縁基板１１の段差１１ａより前記絶縁基板１１の中央部側（内側）に位置させている。 The protective film 14 is formed of a thick film material made of glass or epoxy resin so as to cover a part of the pair of upper surface electrodes 12 and the resistor 13. Here, the resistor 13 and the protective film 14 are positioned closer to the center side (inner side) of the insulating substrate 11 than the step 11 a of the insulating substrate 11.

ここで、前記絶縁基板１１の両端部に、段差１１ａを介して形成され、かつ上面および端面に開口する凹部１１ｂを設け、さらに、前記一対の上面電極１２の一部を前記凹部１１ｂの内壁に形成している。 Here, at both ends of the insulating substrate 11, there are provided recesses 11b that are formed through the step 11a and open to the upper surface and the end surface, and a part of the pair of upper surface electrodes 12 is formed on the inner wall of the recess 11b. Forming.

前記一対の端面電極１５は前記絶縁基板１１の両端部に設けられ、その各端部を前記凹部１１ｂの内壁に位置させている。そして、一対の端面電極１５は、前記絶縁基板１１の前記凹部１１ｂより内側に形成された前記保護膜１４から露出した一対の上面電極１２と電気的に接続されるように、Ａｇと樹脂からなる材料を印刷することによって形成される。 The pair of end face electrodes 15 are provided at both end portions of the insulating substrate 11, and the end portions thereof are positioned on the inner wall of the recess 11b. The pair of end surface electrodes 15 are made of Ag and resin so as to be electrically connected to the pair of upper surface electrodes 12 exposed from the protective film 14 formed inside the concave portion 11b of the insulating substrate 11. Formed by printing material.

上記のように、絶縁基板１１の両端部に凹部１１ｂを設けているため、一対の端面電極１５は、段差１１ａを超えて絶縁基板１１の凹部１１ｂが形成されていない箇所まで伸びることはなく、これにより、段差１１ａより内側の一対の上面電極１２は露出する。また、一対の上面電極１２の一部と一対の端面電極１５の端部が凹部１１ｂの内壁に形成されているため、一対の上面電極１２と一対の端面電極１５とが接続される。 As described above, since the recesses 11b are provided at both ends of the insulating substrate 11, the pair of end surface electrodes 15 does not extend beyond the step 11a to a place where the recess 11b of the insulating substrate 11 is not formed. Thereby, the pair of upper surface electrodes 12 inside the step 11a is exposed. Moreover, since a part of pair of upper surface electrode 12 and the edge part of a pair of end surface electrode 15 are formed in the inner wall of the recessed part 11b, a pair of upper surface electrode 12 and a pair of end surface electrode 15 are connected.

そして、前記抵抗体１３および前記保護膜１４の両端部を前記段差１１ａより前記絶縁基板１１の中央部側に位置させている。すなわち、抵抗体１３、保護膜１４の両端部は、段差１１ａとは一定の距離をおいて位置している。ここで、前記抵抗体１３および前記保護膜１４の両端部を前記段差１１ａより前記絶縁基板１１の中央部側に位置させるために、レジストなどの処理を行ってもよい。 Then, both ends of the resistor 13 and the protective film 14 are positioned closer to the center of the insulating substrate 11 than the step 11a. That is, both ends of the resistor 13 and the protective film 14 are located at a certain distance from the step 11a. Here, in order to position both ends of the resistor 13 and the protective film 14 closer to the central portion of the insulating substrate 11 than the step 11a, a process such as resist may be performed.

さらに、この一対の端面電極１５の表面には、Ｎｉめっき層、Ｓｎめっき層からなるめっき層１６が形成されている。このとき、めっき層１６は前記絶縁基板１１の段差１１ａより中央部側に露出して形成されている前記上面電極１２の一部と接続され、かつ保護膜１４と接する。 Further, a plating layer 16 composed of a Ni plating layer and a Sn plating layer is formed on the surface of the pair of end face electrodes 15. At this time, the plating layer 16 is connected to a part of the upper surface electrode 12 formed exposed to the center side from the step 11 a of the insulating substrate 11 and is in contact with the protective film 14.

上記したように本発明の一実施の形態においては、前記絶縁基板１１の両端部に段差１１ａを介して形成されかつ上面および端面に開口する凹部１１ｂを設けており、かつ、前記抵抗体１３および前記保護膜１４の両端部を前記段差１１ａより前記絶縁基板１１の中央部側に位置させているため、Ａｇと樹脂からなる密着性の弱い前記一対の端面電極１５が前記一対の上面電極１２を全て覆わず、銀や銅からなる密着性の強い前記上面電極１２の一部を確実に露出させることができ、これにより、前記めっき層１６と前記上面電極１２の一部とを確実に直接的に接続させることができるという効果が得られるものである。 As described above, in the embodiment of the present invention, the both ends of the insulating substrate 11 are provided with the recesses 11b formed through the step 11a and open to the upper surface and the end surface, and the resistor 13 and Since the both end portions of the protective film 14 are positioned closer to the central portion of the insulating substrate 11 than the step 11a, the pair of end surface electrodes 15 made of Ag and resin and having a low adhesiveness replace the pair of upper surface electrodes 12. It is possible to reliably expose a part of the upper surface electrode 12 made of silver or copper, which is not covered completely, and to reliably expose the plating layer 16 and a part of the upper surface electrode 12 directly. The effect that it can be connected to is obtained.

また、その結果、熱衝撃などの際に応力発生部分（めっき層１６と上面電極１２との接続部分）での密着力が強くなるため、信頼性不良発生を抑制することができる。 As a result, the adhesion force at the stress generation portion (the connection portion between the plating layer 16 and the upper surface electrode 12) is increased during a thermal shock or the like, so that the occurrence of poor reliability can be suppressed.

本発明に係るチップ抵抗器は、めっき層と上面電極の一部を確実に直接的に接続させることができるという効果を有するものであり、特に、各種電子機器に使用される、１．０ｍｍ×０．５ｍｍのようなサイズの小さい厚膜抵抗体で形成されたチップ抵抗器等において有用となるものである。 The chip resistor according to the present invention has an effect that a part of the plating layer and the upper surface electrode can be reliably connected directly, and is particularly used in various electronic devices. This is useful in a chip resistor formed of a thick film resistor having a small size such as 0.5 mm.

１１絶縁基板
１１ａ段差
１１ｂ凹部
１２一対の上面電極
１３抵抗体
１４保護膜
１５一対の端面電極
１６めっき層 DESCRIPTION OF SYMBOLS 11 Insulation board | substrate 11a Level | step difference 11b Recessed part 12 A pair of upper surface electrode 13 Resistor 14 Protective film 15 A pair of end surface electrode 16 Plating layer

Claims

An insulating substrate; a pair of upper surface electrodes provided on both ends of the upper surface of the insulating substrate; a resistor provided on the upper surface of the insulating substrate and formed between the pair of upper surface electrodes; and at least the resistor A pair of end surface electrodes provided so as to be electrically connected to the pair of upper surface electrodes on both end surfaces of the insulating substrate, the pair of end surface electrodes, and the pair of end surface electrodes. A plating layer provided so as to cover the upper surface electrode, and provided with recesses formed at both end portions of the insulating substrate through steps and opening on the upper surface and the end surface, and a part of the pair of upper surface electrodes is provided with the recesses A chip in which each end of the pair of end surface electrodes is positioned on the inner wall of the recess, and both ends of the resistor and the protective film are positioned closer to the center of the insulating substrate than the step. Resistor.