JP6543053B2 - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
- Publication number
- JP6543053B2 JP6543053B2 JP2015050523A JP2015050523A JP6543053B2 JP 6543053 B2 JP6543053 B2 JP 6543053B2 JP 2015050523 A JP2015050523 A JP 2015050523A JP 2015050523 A JP2015050523 A JP 2015050523A JP 6543053 B2 JP6543053 B2 JP 6543053B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- conductor
- insulator
- transistor
- oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
- H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
- H01L21/441—Deposition of conductive or insulating materials for electrodes
- H01L21/443—Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
- H10D30/6733—Multi-gate TFTs
- H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02551—Group 12/16 materials
- H01L21/02554—Oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02614—Transformation of metal, e.g. oxidation, nitridation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Thin Film Transistor (AREA)
- Semiconductor Memories (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2015050523A JP6543053B2 (ja) | 2014-03-14 | 2015-03-13 | 半導体装置の作製方法 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014051720 | 2014-03-14 | ||
| JP2014051720 | 2014-03-14 | ||
| JP2015050523A JP6543053B2 (ja) | 2014-03-14 | 2015-03-13 | 半導体装置の作製方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019111150A Division JP6761514B2 (ja) | 2014-03-14 | 2019-06-14 | 半導体装置の作製方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2015188084A JP2015188084A (ja) | 2015-10-29 |
| JP2015188084A5 JP2015188084A5 (enExample) | 2018-04-19 |
| JP6543053B2 true JP6543053B2 (ja) | 2019-07-10 |
Family
ID=54069835
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015050523A Expired - Fee Related JP6543053B2 (ja) | 2014-03-14 | 2015-03-13 | 半導体装置の作製方法 |
| JP2019111150A Active JP6761514B2 (ja) | 2014-03-14 | 2019-06-14 | 半導体装置の作製方法 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019111150A Active JP6761514B2 (ja) | 2014-03-14 | 2019-06-14 | 半導体装置の作製方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US20150263140A1 (enExample) |
| JP (2) | JP6543053B2 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017149413A1 (en) * | 2016-03-04 | 2017-09-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| KR102640383B1 (ko) | 2016-03-22 | 2024-02-27 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치, 및 상기 반도체 장치를 포함하는 표시 장치 |
| US10043659B2 (en) | 2016-05-20 | 2018-08-07 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device or display device including the same |
| CN109075209B (zh) | 2016-05-20 | 2022-05-27 | 株式会社半导体能源研究所 | 半导体装置或包括该半导体装置的显示装置 |
| JP2019102530A (ja) * | 2017-11-29 | 2019-06-24 | 東芝メモリ株式会社 | 半導体装置およびその製造方法 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0384963A (ja) * | 1989-08-29 | 1991-04-10 | Casio Comput Co Ltd | 薄膜トランジスタ |
| JP2004128217A (ja) * | 2002-10-02 | 2004-04-22 | Semiconductor Energy Lab Co Ltd | 薄膜トランジスタ及びその作製方法 |
| JP5562603B2 (ja) * | 2008-09-30 | 2014-07-30 | 株式会社半導体エネルギー研究所 | 表示装置 |
| WO2010125986A1 (en) * | 2009-05-01 | 2010-11-04 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
| KR101782176B1 (ko) * | 2009-07-18 | 2017-09-26 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 반도체 장치의 제조 방법 |
| TWI559501B (zh) * | 2009-08-07 | 2016-11-21 | 半導體能源研究所股份有限公司 | 半導體裝置和其製造方法 |
| WO2011070900A1 (en) * | 2009-12-08 | 2011-06-16 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| KR101773641B1 (ko) * | 2010-01-22 | 2017-09-12 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| US8685787B2 (en) * | 2010-08-25 | 2014-04-01 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
| US9437743B2 (en) * | 2010-10-07 | 2016-09-06 | Semiconductor Energy Laboratory Co., Ltd. | Thin film element, semiconductor device, and method for manufacturing the same |
| KR101680768B1 (ko) * | 2010-12-10 | 2016-11-29 | 삼성전자주식회사 | 트랜지스터 및 이를 포함하는 전자장치 |
| TWI521612B (zh) * | 2011-03-11 | 2016-02-11 | 半導體能源研究所股份有限公司 | 半導體裝置的製造方法 |
| US8847220B2 (en) * | 2011-07-15 | 2014-09-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| KR20230004930A (ko) * | 2012-04-13 | 2023-01-06 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 |
| TWI478344B (zh) * | 2012-07-04 | 2015-03-21 | E Ink Holdings Inc | 電晶體與其製造方法 |
| WO2014021442A1 (en) * | 2012-08-03 | 2014-02-06 | Semiconductor Energy Laboratory Co., Ltd. | Oxide semiconductor stacked film and semiconductor device |
-
2015
- 2015-03-11 US US14/645,123 patent/US20150263140A1/en not_active Abandoned
- 2015-03-13 JP JP2015050523A patent/JP6543053B2/ja not_active Expired - Fee Related
-
2019
- 2019-06-14 JP JP2019111150A patent/JP6761514B2/ja active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP2019161237A (ja) | 2019-09-19 |
| US20150263140A1 (en) | 2015-09-17 |
| JP2015188084A (ja) | 2015-10-29 |
| JP6761514B2 (ja) | 2020-09-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP7751757B2 (ja) | 半導体装置 | |
| TWI873964B (zh) | 半導體裝置及其製造方法 | |
| US10600918B2 (en) | Semiconductor device | |
| JP6599111B2 (ja) | 酸化物半導体膜の作製方法 | |
| JP6556446B2 (ja) | トランジスタ | |
| JP6488124B2 (ja) | 半導体装置 | |
| JP6514512B2 (ja) | 半導体装置 | |
| JP6480761B2 (ja) | 半導体装置の作製方法 | |
| JP6761514B2 (ja) | 半導体装置の作製方法 | |
| JP6440457B2 (ja) | 半導体装置 | |
| JP6463117B2 (ja) | 半導体装置 | |
| JP2015079947A (ja) | 半導体装置およびその作製方法 | |
| JP2015084418A (ja) | 半導体装置 | |
| JP6126509B2 (ja) | 半導体装置 | |
| JP6537341B2 (ja) | 半導体装置 | |
| JP2025184903A (ja) | 半導体装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180308 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20180308 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20181120 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20181204 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20190116 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20190305 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20190429 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20190521 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20190614 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 6543053 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| LAPS | Cancellation because of no payment of annual fees |