JP6510972B2 - Inverter control circuit and power supply - Google Patents

Description

  The present invention relates to an inverter control circuit and a power supply device using the same.

  Arc welding is known in which an arc is generated between a welding torch and a workpiece and welding of the workpiece is performed by the heat of the arc. The arc is powered by the welding power supply.

  FIG. 11 is a diagram for explaining a general welding power supply device A100, and shows the overall configuration of a welding system. One output terminal a of welding power supply device A100 is connected to the electrode at the tip of welding torch T via power cable C1. The other output terminal b of welding power supply device A100 is connected to workpiece W via power cable C2. Welding power supply device A 100 generates an arc between the tip of the electrode of welding torch T and workpiece W to supply power to the arc. Welding power supply device A 100 includes: DC power supply 1 for outputting DC current, inverter circuit 2 for converting DC current to AC current, transformer 3 for transforming AC voltage output from inverter circuit 2, and AC current for DC current The control circuit 500 controls the inverter circuit 2, the drive circuit 6 amplifies the drive signals P1 to P4, and the current sensor 7 detects the output current of the welding power supply device A100. The control circuit 500 performs output current control based on the current signal I detected by the current sensor 7.

  In welding power supply device A100, in order to achieve the output stabilization at the time of low output, what switches control of inverter circuit 2 by pulse width control and phase shift control is known (for example, refer to patent documents 1). In such a welding power supply device A100, in order to prevent the pulse width of the drive signal from becoming too small at low output, the control circuit 500 outputs by shifting the phase of the pulse while keeping the pulse width fixed. Control (phase shift control) is performed.

JP, 2009-131007, A

  FIG. 12 is a diagram for explaining an output current waveform of welding power supply device A 100 when simulation of phase shift control is performed.

In FIG. 12, the upper four stages show the waveforms of the drive signals P1 to P4 input to the switching elements 21 to 24 of the inverter circuit 2, respectively. Further, the fifth stage shows the waveform of the current signal I detected by the current sensor 7, the sixth stage shows the waveform of the output voltage V of the welding power supply device A1, and the seventh stage shows a transformer _Fig . 6 shows a waveform of a voltage V _TP of the secondary side winding 3; As shown in the figure, the phase of the drive signal P2 is behind the phase of the drive signal P1, and the phase of the drive signal P4 is behind the phase of the drive signal P3. The DC power supply 1 is connected to the primary winding 31 of the transformer 3 only when the pulse of the drive signal P1 (P3) and the pulse of the drive signal P2 (P4) overlap, and a voltage is applied. Therefore, the output of welding power supply device A100 can be controlled by adjusting the phase difference between drive signal P1 (P3) and drive signal P2 (P4).

  As shown in the figure, the current signal I rises when both the drive signal P1 (P3) and the drive signal P2 (P4) are on (when the two pulses overlap), and the drive signal P1 When either (P3) or the drive signal P2 (P4) is on, it is falling. Further, when all the drive signals P1 to P4 are off (dead time), a flyback current flows, and the current signal I changes from rising to falling. In the case of the example of FIG. 12, in a state where the pulse widths of the drive signals P1 to P4 are small, the time during which the pulses of the drive signal P1 (P3) and the pulses of the drive signal P2 (P4) overlap is relatively long. It has become. Since the time during which the current signal I falls during the dead time is long, the fluctuation range h of the current signal I is wide (the difference between the maximum value and the minimum value is large). Then, since the target value of the current signal I is small, the minimum value of the current signal I may be too small, and the current flowing to the arc may be insufficient to cause arc breakage.

  The present invention has been conceived under the above-described circumstances, and an object thereof is to provide an inverter control circuit and a power supply device capable of reducing the fluctuation range of the output current at low output.

  In order to solve the above-mentioned subject, in the present invention, the following technical measures are taken.

  The control circuit provided by the first aspect of the present invention follows the preceding drive signal input to the switching element disposed in one arm of the inverter circuit and the tracking input to the switching element disposed in the other arm. A control circuit that generates and outputs a drive signal, wherein the phase of the follow-up drive signal is delayed from the phase of the preceding drive signal and output, and the phase of the preceding drive signal and the phase of the follow-up drive signal First control means for controlling an output current by changing a phase difference, and a pulse of the preceding drive signal and a pulse of the following drive signal by a predetermined ratio of the pulse width of the preceding drive signal or the following drive signal And control switching means for switching between control by the first control means and control by the second control means. And wherein the are. According to this configuration, while switching to control by the second control means, the overlapping time of the pulse of the leading drive signal and the pulse of the following driving signal is a predetermined ratio of the pulse width of the preceding driving signal or the following driving signal. It is fixed. By setting the predetermined ratio appropriately, the fluctuation range of the output current of the inverter circuit can be reduced. Further, since the control by the first control means and the control by the second control means can be switched, appropriate control can be performed according to the output.

  In a preferred embodiment of the present invention, the control circuit matches and outputs the phase of the follow drive signal and the phase of the advance drive signal, and changes the pulse widths of the advance drive signal and the follow drive signal. The control switching means further includes a third control means for controlling the output current by causing the control current to be controlled, the control by the first control means, the control by the second control means, and the control by the third control means. Switch. According to this configuration, since the control by the first control unit, the control by the second control unit, and the control by the third control unit can be switched, further appropriate control can be performed according to the output. .

  In a preferred embodiment of the present invention, the control switching means switches control based on a target value of the output current of the inverter circuit. According to this configuration, it is possible to prevent erroneous switching due to a detection error in the sensor.

  In a preferred embodiment of the present invention, the control switching means switches control based on an output current of the inverter circuit. According to this configuration, switching can be performed according to the actual state.

  In a preferred embodiment of the present invention, the control switching means is based on the pulse width of the preceding drive signal or the following drive signal, or the phase difference between the phase of the preceding drive signal and the phase of the following drive signal. Switch control. According to this configuration, it is possible to reliably switch before the pulse width or the phase difference which may cause a problem.

  In a preferred embodiment of the present invention, the predetermined ratio is greater than 0 and less than 1/2. According to this configuration, the output can be performed while suppressing the fluctuation range of the current signal.

  In a preferred embodiment of the present invention, the predetermined ratio is 1/5. According to this configuration, the fluctuation range of the current signal can be minimized.

  In a preferred embodiment of the present invention, the second control means is a length of an overlapping portion of the pulse of the preceding drive signal and the pulse of the following drive signal based on the output current of the inverter circuit. Overlap width calculation means for calculating an overlap width; and drive signal generation means for generating the drive signal as pulse widths of the preceding drive signal and the follow-up drive signal as a time obtained by dividing the overlap width by the predetermined ratio. Is equipped. According to this configuration, it is possible to feedback control the output current by adjusting the pulse width and to set the ratio of the overlap width to the pulse width to a fixed value.

  In a preferred embodiment of the present invention, the overlap width calculating means calculates a gain from a current signal obtained by detecting a current after transforming and rectifying an output of the inverter circuit, and an overlap width previously calculated. An overlap width is calculated by multiplying the compensation value calculated from the deviation between the current signal and the target value by the gain. According to this configuration, the overlap width can be changed according to the arc load, and the pulse width can be changed. Therefore, when the arc load at the time of short circuit etc. suddenly decreases, it is possible to suppress the flow of a large current by reducing the pulse width.

  In a preferred embodiment of the present invention, the second control means adjusts pulse widths of the preceding drive signal and the follow drive signal based on the output current of the inverter circuit. According to this configuration, calculation of the overlap width is facilitated.

  In a preferred embodiment of the present invention, the second control means adjusts a DC voltage to be input to the inverter circuit based on an output current of the inverter circuit. According to this configuration, the pulse width of each drive signal can be fixed.

  A power supply device provided by the second aspect of the present invention is characterized by comprising the control circuit provided by the first aspect of the present invention, and the inverter circuit. According to this configuration, since control of the power supply device can be switched appropriately, appropriate control can be performed according to the output.

  In a preferred embodiment of the invention, the welding torch is powered in a welding system. According to this configuration, since control of the power supply device (welding power supply device) for supplying power to the welding torch can be switched appropriately, appropriate control according to the output can be performed.

  According to the present invention, while switching to control by the second control means, the overlapping time of the pulse of the leading drive signal and the pulse of the following driving signal is a predetermined ratio of the pulse width of the preceding driving signal or the following driving signal. It is fixed. By setting the predetermined ratio appropriately, the fluctuation range of the output current of the inverter circuit can be reduced.

  Other features and advantages of the present invention will become more apparent from the detailed description given below with reference to the accompanying drawings.

It is a figure for demonstrating the welding power supply device which concerns on 1st Embodiment. It is a block diagram showing details of each control part of a control circuit concerning a 1st embodiment. It is a figure for demonstrating the waveform of a prior | preceding drive signal, and the waveform of a following drive signal. It is a figure for demonstrating the current waveform which changes by predetermined ratio R. FIG. It is a figure for demonstrating the on-off state of each switching element, and the electric current which flows. It is a figure for demonstrating the on-off state of each switching element, and the electric current which flows. It is a figure for demonstrating the current waveform which changes by predetermined ratio R. FIG. It is a figure for demonstrating the output current waveform of a welding power supply device when simulation of overlap width ratio fixed control is performed. It is a figure for demonstrating the modification of an overlapping width ratio fixed control part. It is a figure for demonstrating the welding power supply device which concerns on 2nd Embodiment. It is a figure for demonstrating the conventional common welding power supply device. It is a figure for demonstrating the output current waveform of a welding power supply device when simulation of phase shift control is performed.

  An embodiment of the present invention will be specifically described below with reference to the drawings, taking the case where the power supply apparatus according to the present invention is used as a welding power supply apparatus as an example.

  FIG. 1 is a view for explaining a welding power supply device A1 according to the first embodiment, and shows the entire configuration of the welding power supply device A1. FIG. 2 is a block diagram showing details of each control unit of the control circuit 5.

  The welding power supply A1 generates an arc between the tip of the electrode of the welding torch and the workpiece to supply power to the arc. In FIG. 1, the welding torch, the workpiece and the arc are collectively shown as a load L. As shown in FIG. 1, the welding power supply A 1 includes a DC power supply 1, an inverter circuit 2, a transformer 3, a rectifier circuit 4, a control circuit 5, a drive circuit 6, and a current sensor 7.

  The DC power supply 1 outputs a DC current, and includes, for example, a rectifier circuit that rectifies an AC current input from a power system, and a smoothing capacitor that smoothes the DC current. The direct current power supply 1 is not limited to one that converts alternating current into direct current and outputs it. For example, a direct current may be output from a fuel cell, a storage battery, a solar cell or the like, as long as the direct current is output to the inverter circuit 2.

  The inverter circuit 2 converts a direct current input from the direct current power source 1 into a high frequency current and outputs the high frequency current to the transformer 3. The inverter circuit 2 is a single-phase full-bridge inverter and includes four switching elements 21 to 24. In the present embodiment, IGBTs (Insulated Gate Bipolar Transistors) are used as the switching elements 21 to 24. The switching elements 21 to 24 are not limited to IGBTs, and may be bipolar transistors, MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), or the like.

  The switching element 21 and the switching element 23 are connected in series by connecting the emitter terminal of the switching element 21 and the collector terminal of the switching element 23. The collector terminal of the switching element 21 is connected to the positive electrode side of the DC power supply 1, and the emitter terminal of the switching element 23 is connected to the negative electrode side of the DC power supply 1 to form a bridge structure. Similarly, the switching element 24 and the switching element 22 are connected in series to form a bridge structure. A bridge structure formed of the switching element 21 and the switching element 23 is a leading arm, and a bridge structure formed of the switching element 24 and the switching element 22 is a tracking arm. An output line is connected to a connection point between the switching element 21 and the switching element 23 of the leading arm, and an output line is also connected to a connection point between the switching element 24 and the switching element 22 of the following arm. The primary winding 31 of the transformer 3 is connected between these two output lines. A flywheel diode is connected to each of the switching elements 21 to 24 in antiparallel. Drive signals P1 to P4 output from the drive circuit 6 are input to gate terminals of the switching elements 21 to 24, respectively. Each of the switching elements 21-24 can be switched between the on state and the off state based on the drive signals P1 to P4, respectively. Thereby, direct current is converted into alternating current. The inverter circuit 2 is not limited to this.

  The transformer 3 transforms the AC voltage output from the inverter circuit 2 and outputs the transformed voltage to the rectifier circuit 4. The secondary side winding 32 of the transformer 3 is provided with a center tap separately from the two output terminals.

  The rectifier circuit 4 is a two-wave rectifier circuit using the center tap of the transformer 3, rectifies an alternating current output from the transformer 3, and outputs it as a direct current. The rectifier circuit 4 includes two rectifying diodes 41 and 42 and a DC reactor 43. The anode terminals of the rectifying diodes 41 and 42 are connected to the respective output terminals of the secondary side winding 32 of the transformer 3 and connected in series. The DC reactor 43 is connected in series between the connection point c on the cathode terminal side of the rectifying diodes 41 and 42 and the output terminal a of the welding power supply A1, and stabilizes the output current. The center tap of the transformer 3 is connected to the output terminal b of the welding power supply A1. A direct current output from the rectifier circuit 4 flows to a load L (arc or the like) as a welding current.

  The current sensor 7 is disposed on a connecting line between the center tap of the transformer 3 and the output terminal b, detects the output current of the welding power supply device A1, and outputs it to the control circuit 5 as a current signal I. The current sensor 7 may be disposed on a connection line between the direct current reactor 43 and the output terminal a.

  The control circuit 5 controls the inverter circuit 2, generates a drive signal for controlling the inverter circuit 2, and outputs the drive signal to the drive circuit 6. The control circuit 5 performs output current control, and feedback-controls the output current of the welding power supply device A1 based on the current signal I input from the current sensor 7. The control circuit 5 performs normal pulse width control at high output, performs phase shift control at medium output, and performs overlap width ratio fixed control to be described later at low output. The control circuit 5 includes an output current setting unit 51, a subtraction unit 52, a control switching unit 53, a PWM (Pulse Width Modulation) control unit 54, a PSM (Phase Shift Modulation) control unit 55, and an overlap width ratio fixing control unit 56. Have.

The output current setting unit 51 sets a target value I ^* of the output current of the welding power source device A1. Output current setting unit 51 outputs the set target value I ^* to subtraction unit 52 and control switching unit 53. The output current setting unit 51 sets a target value I ^* based on welding conditions input by an operator or programmed in advance. Subtraction unit 52 calculates deviation ΔI (= I ^* −I) between current signal I input from current sensor 7 and target value I ^* input from output current setting unit 51, and switches control switching unit 53. Output to

Control switching unit 53 receives PWM control unit 54, PSM control unit 55, and overlap width ratio fixing control unit according to target value I ^* input from output current setting unit 51 and deviation ΔI input from subtraction unit 52. Output to one of 56. The control switching unit 53 outputs the deviation ΔI to the PWM control unit 54 when the target value I ^* is in a predetermined high output range (high output). Further, when target value I ^* is in a medium output range (<high output range) set in advance (at medium output), deviation ΔI is output to PSM control unit 55. Furthermore, when the target value I ^* is in a low output range (<middle output range) set in advance (at low output), the deviation ΔI is output to the overlap width ratio fixing control unit 56. While the deviation ΔI is input, the PWM control unit 54, the PSM control unit 55, and the overlap width ratio fixing control unit 56 generate drive signals P1 to P4 based on the deviation ΔI and output the drive signals P1 to P4 to the drive circuit 6. That is, control according to one of the control units 54 to 56 for which the control switching unit 53 outputs the deviation ΔI is performed. Thereby, the control circuit 5 can switch control according to the output of welding power supply device A1.

The method of control switching in the control circuit 5 is not limited to the one described above. For example, the subtracting unit 52 outputs the deviation ΔI to the PWM control unit 54, the PSM control unit 55, and the overlap width ratio fixing control unit 56, and the control switching unit 53 controls the PWM control unit 54 and the PSM control unit according to the target value I ^*. Only one of 55 and the overlap width ratio fixing control unit 56 may be driven, or the drive signal P1 output from any of the PWM control unit 54, the PSM control unit 55, and the overlapping width ratio fixing control unit 56 may be output. Only P4 may be output to the drive circuit 6. The control circuit 5 may switch the control by the PWM control unit 54, the control by the PSM control unit 55, and the control by the overlap width ratio fixing control unit 56.

  In the present embodiment, assuming that the target value of the output current can perform normal pulse width control as a high output range and the target value of the output current is small and normal pulse width control is performed, the PWM signal The pulse width is so narrow that control can not be properly performed, and the range excluding the low output range is defined as the middle output range. For example, the duty ratio of the PWM signal is a few percent or less, and the target value of the output current is a few [A] or less. Further, the target value of the output current is further reduced, and in the case where phase shift control is performed, the output current becomes too small, so that the current flowing to the arc is insufficient and the possibility of occurrence of arc breakage increases. It has a low output range. For example, it is a case where the target value of the output current is several hundred [mA] or less. Note that how to set each range is not limited to this.

Further, the control switching in the control circuit 5 is not limited to the switching in accordance with the target value I ^* . For example, switching may be performed according to the current signal I input from the current sensor 7, or switching of the voltage between the output terminal a and the output terminal b may be performed according to a voltage signal detected by a voltage sensor not shown. You may In addition, switching may be performed according to a value calculated by a predetermined calculation formula based on the voltage signal and the current signal. In the case of switching according to the target value I ^* , there is an effect of preventing erroneous switching due to a detection error of the sensor. On the other hand, when switching is performed based on the detected current signal or voltage signal, there is an effect that switching can be performed according to the actual state. Further, the control by the PWM control unit 54 and the control by the PSM control unit 55 are switched according to the pulse width, and the control by the PSM control unit 55 and the control by the overlap width ratio fixing control unit 56 are switched according to the phase difference. You may do so. In this case, there is an effect that the switching can be reliably performed before the pulse width or the phase difference which may cause a problem.

  The PWM control unit 54 is for performing pulse width control, generates drive signals P1 to P4 based on the deviation ΔI input from the control switching unit 53, and outputs the drive signals P1 to P4 to the drive circuit 6. As shown in FIG. 2A, the PWM control unit 54 includes a PI control unit 54a and a drive signal generation unit 54b. The PI control unit 54a calculates a compensation value by PI control (proportional integration control) based on the input deviation ΔI, and outputs it as a compensation value signal to the drive signal generation unit 54b. Control other than PI control may be performed. The drive signal generation unit 54b generates a PWM signal by comparing the compensation value signal input from the PI control unit 54a with a carrier signal such as a triangular wave generated internally, and outputs the PWM signal as a drive signal. . In this case, the same drive signal is input to the switching element 21 and the switching element 22, and the same drive signal is input to the switching element 23 and the switching element 24. That is, no phase difference is provided between the drive signal P1 (P3) input to the switching element 21 (23) and the drive signal P2 (P4) input to the switching element 22 (24). The configuration of the PWM control unit 54 is not limited to this, as long as the drive signals P1 to P4 for performing pulse width control are generated. The "PWM control unit 54" corresponds to the "third control means" of the present invention.

  The PSM control unit 55 is for performing phase shift control, generates drive signals P1 to P4 based on the deviation ΔI inputted from the control switching unit 53, and outputs the drive signals P1 to P4 to the drive circuit 6. As shown in FIG. 2B, the PSM control unit 55 includes a PI control unit 55a and a drive signal generation unit 55b. The PI control unit 55a calculates a compensation value by PI control (proportional integration control) based on the input deviation ΔI, and outputs it as a compensation value signal to the drive signal generation unit 55b. Control other than PI control may be performed. The drive signal generation unit 55b generates a pulse signal of a predetermined frequency with a predetermined duty ratio, and outputs the pulse signal as a drive signal. The drive signal generation unit 55b provides a phase difference between the drive signal P1 (P3) input to the switching element 21 (23) and the drive signal P2 (P4) input to the switching element 22 (24), and outputs the same. Do. In the present embodiment, the phase of the drive signal P2 is controlled to be delayed from the phase of the drive signal P1 and the phase of the drive signal P4 is controlled to be delayed from the phase of the drive signal P3. Hereinafter, the drive signal P1 (P3) input to the switching element 21 (23) is referred to as a preceding drive signal P1 (P3), and the drive signal input to the switching element 22 (24) is referred to as a follow-up drive signal P2 (P4). By shifting the phase, the overlapping portion between the pulse of the preceding drive signal P1 (P3) and the pulse of the follow-up drive signal P2 (P4) is reduced. Therefore, even if the pulse width is the same, the output is smaller than when the phase is not shifted. be able to. Further, the phase difference is changed in accordance with the compensation value signal input from the PI control unit 55a. That is, the output is reduced by increasing the phase difference as the compensation value signal is larger. On the other hand, as the compensation value signal is smaller, the output is increased by reducing the phase difference. The configuration of the PSM control unit 55 is not limited to this, as long as it generates drive signals P1 to P4 for performing phase shift control. The “PSM control unit 55” corresponds to the “first control unit” in the present invention.

  The overlap width ratio fixing control unit 56 is for performing control when the output is smaller, and generates the drive signals P1 to P4 based on the deviation ΔI input from the control switching unit 53, to drive the drive circuit 6 Output to The overlap width ratio fixing control unit 56 fixes the ratio of the length of the overlapping portion of the pulse of the preceding drive signal P1 (P3) and the pulse of the follow-up driving signal P2 (P4) to the pulse width to a predetermined ratio R. Take control. The "overlap width ratio fixing control unit 56" corresponds to the "second control means" in the present invention.

  FIG. 3 is a diagram for explaining the waveform of the preceding drive signal P1 (P3) and the waveform of the follow drive signal P2 (P4). The upper waveform is the preceding drive signal P1 (P3), and the lower waveform is the follow drive signal P2 (P4). The period T of each of the drive signals P1 to P4 is fixed. The pulse width of each of the drive signals P1 to P4 is Ton, and the length of the overlapping portion of the pulse of the preceding drive signal P1 (P3) and the pulse of the follow drive signal P2 (P4) (hereinafter referred to as "overlap width" ) Is Tx. The pulse width Ton and the overlap width Tx change depending on the output of the welding power supply device A1, but the ratio R of the overlap width Tx to the pulse width Ton is fixed. Therefore, if the overlap width Tx is determined, the pulse width Ton (= Tx / R) is determined, and if the pulse width Ton is determined, the overlap width Tx (= Ton · R) is determined. In the present embodiment, the overlap width Tx is calculated and determined first, and the pulse width Ton (= Tx / R) is calculated based on the calculated overlap width Tx. Alternatively, the pulse width Ton may be calculated and determined first, and the overlap width Tx (= Ton · R) may be calculated based on the calculated pulse width Ton. Further, in the present embodiment, the ratio R is 1/5 (20%). In the following, control performed with the ratio R of the overlap width Tx to the pulse width Ton fixed is referred to as “overlap width ratio fixed control”.

  FIG. 4 is a diagram for explaining a current waveform which changes according to a predetermined ratio R, and shows a result of simulating the behavior of the welding power source device A1 by a computer.

FIG. 4A shows the case where R = 1 (100%), and FIG. 4B shows the case where R = 1/5 (20%). 4A and 4B, the upper four stages show the waveforms of the drive signals P1 to P4, and the fifth stage shows the waveform of the current signal I detected by the current sensor 7, The sixth stage shows the waveform of the output voltage V of the welding power supply device A1, and the seventh stage shows the waveform of the voltage V _TP of the secondary side winding of the transformer 3. The pulse widths of the drive signals P1 to P4 are different (the pulse width in FIG. 4A is reduced) in order to make the output currents of the two equal.

In FIG. 4A, the phase of the pulse of the preceding drive signal P1 (P3) and the phase of the pulse of the follow-up drive signal P2 (P4) coincide with each other, and there is no phase difference. In this case, the cycle of the current signal I is half the cycle of each of the drive signals P1 to P4. On the other hand, in FIG. 4B, the overlap width Tx is 20% of the pulse width Ton of each of the drive signals P1 to P4, and when 80% of the pulse of the preceding drive signal P1 (P3) elapses, The pulse of the drive signal P2 (P4) is rising. In this case, the cycle of the current signal I is a cycle of 1⁄4 of the cycle of each of the drive signals P1 to P4. That is, in the case of FIG. 4B, the period is shorter than in the case of FIG. 4A, and the time taken for rising and falling of the current signal I is shortened, and the fluctuation range of the current signal I is reduced. There is. While the current signal I in FIG. 4 (a) fluctuates between 0 and 500 mA (see the range h shown in the drawing), the current signal I in FIG. 4 (b) fluctuates between 50 and 300 mA. (Refer to the range h shown in the figure). That is, when outputting the same current, the fluctuation range of the current signal I when R = 1/5 is about half that when R = 1. When R = 1, there is a moment when the current signal I becomes 0 mA. At this time, the current flowing to the arc may be insufficient to cause arc breakage.

  FIG. 5 and FIG. 6 are diagrams for explaining the on / off states of the switching elements 21 to 24 and the current flowing therethrough.

  FIG. 5 (a) shows the state in period A shown in FIG. 4 (b). In period A, the switching elements 21 and 22 are in the on state, and the switching elements 23 and 24 are in the off state. In this period, a voltage is applied to the primary side winding of the transformer 3, and a current indicated by a broken arrow flows. At this time, an output current indicated by an alternate long and short dash line arrow flows from the secondary side winding of the transformer 3. During the period A, the current on the primary side gradually increases, and the output current also gradually increases (see I in FIG. 4B).

  FIG. 5 (b) shows the state in period B shown in FIG. 4 (b). In the period B, the switching element 21 is switched to the OFF state, and the voltage applied to the primary side winding of the transformer 3 is cut off. However, since there is a current path (see dashed arrow) including the flywheel diode of the switching element 23, the current continues to flow. Also at this time, an output current indicated by an alternate long and short dash line arrow flows from the secondary side winding of the transformer 3. During the period B, the current on the primary side gradually decreases and the output current also gradually decreases (see I in FIG. 4B).

  FIG.5 (c) has shown the state in the period C shown in FIG.4 (b). In period C, since the switching element 22 is also switched to the off state, all the switching elements 21 to 24 are in the off state, and the primary side of the transformer 3 is unloaded. At this time, the energy stored in the secondary winding is discharged to the secondary side of the transformer 3, and an output current indicated by a dashed-dotted arrow flows. During the period C, the output current gradually increases (see I in FIG. 4 (b)).

  FIG. 5 (d) shows the state in period D shown in FIG. 4 (b). In the period D, since the switching element 23 is switched to the on state, a current path including the flywheel diode of the switching element 22 is formed, so that a current indicated by a broken arrow flows. As a result, the output current indicated by the dashed-dotted line arrow gradually decreases (see I in FIG. 4B).

  FIG. 6 (a) shows the state in period E shown in FIG. 4 (b). In period E, the switching element 24 is switched to the ON state, voltage is applied to the primary side winding of the transformer 3, and current indicated by a broken arrow flows. At this time, an output current indicated by an alternate long and short dash line arrow flows from the secondary side winding of the transformer 3. During the period E, the current on the primary side gradually increases, and the output current also gradually increases (see I in FIG. 4B).

  FIG. 6 (b) shows the state in period F shown in FIG. 4 (b). In the period F, the switching element 23 is switched to the OFF state, and the voltage applied to the primary side winding of the transformer 3 is cut off. However, since there is a current path (see dashed arrow) including the flywheel diode of the switching element 21, current continues to flow. Also at this time, an output current indicated by an alternate long and short dash line arrow flows from the secondary side winding of the transformer 3. During the period F, the current on the primary side gradually decreases and the output current also gradually decreases (see I in FIG. 4B).

  FIG.6 (c) has shown the state in the period G shown in FIG.4 (b). In the period G, since the switching element 24 is also switched to the off state, all the switching elements 21 to 24 are in the off state, and the primary side of the transformer 3 is unloaded. At this time, the energy stored in the secondary winding is discharged to the secondary side of the transformer 3, and an output current indicated by a dashed-dotted arrow flows. During the period G, the output current gradually increases (see I in FIG. 4 (b)).

  FIG. 6 (d) shows the state in period H shown in FIG. 4 (b). In the period H, the switching element 21 is switched to the ON state, so that a current path including the flywheel diode of the switching element 24 is formed, so that the current indicated by the dashed arrow flows. As a result, the output current indicated by the dashed-dotted line arrow gradually decreases (see I in FIG. 4B).

  As described above, the current signal I repeats rising and falling as shown in FIG. 4 (b). By shortening the period A and the period E, the rise of the current signal I in these periods is suppressed, and the output current is suppressed. Further, the period A and the period E are set to 1⁄4 of the periods B, D, F, and H (that is, the overlap width Tx is set to 1⁄5 of the pulse width Ton of each of the drive signals P1 to P4). The rise of current signal I in period A and period E matches the rise in current signal I in period C and period G, whereby the period of current signal I is made equal to the period of drive signals P1 to P4. It has a period of 1/4 of. In this case, the fluctuation range of the current signal I is minimized.

  FIG. 7 shows an example of the waveform of the current signal I when the value of the ratio R is changed. FIG. 7 (a) shows the case where R = 1/10 (10%), and FIG. 7 (b) shows the case where R = 1/2 (50%). In FIGS. 7A and 7B, the upper four stages show the waveforms of the drive signals P1 to P4, and the fifth stage shows the waveform of the current signal I detected by the current sensor 7. As the ratio R becomes smaller than 1⁄5, the waveform of the current signal I collapses (see FIG. 7A), and the fluctuation range h of the current signal I increases. Also, as the ratio R becomes larger than 1⁄5, the waveform of the current signal I is broken (see FIG. 7B), and the fluctuation range h of the current signal I is increased. The waveform of the current signal I changes depending on the state of the load.

  When the ratio R is equal to or less than 1/2 (50%), the collapse of the waveform of the current signal I is limited (see FIG. 7B), and the fluctuation range of the current signal I is not so large. In addition, when the ratio R is "0", the output can not be performed. Therefore, by setting a value larger than “0” at 1⁄2 (50%) or less as the ratio R, it is possible to perform output while suppressing the fluctuation range of the current signal I. However, the ratio R is set to 1⁄5 (20%) so that the waveform of the current signal I does not collapse (the period of the current signal I becomes a period of 1⁄4 of the period of each of the drive signals P1 to P4). Is desirable.

  As shown in FIG. 2C, the overlap width ratio fixing control unit 56 includes an overlap width calculation unit 56a and a drive signal generation unit 56e.

  The overlap width calculation unit 56a calculates an overlap width Tx. The overlap width calculation unit 56a calculates the overlap width Tx based on the deviation ΔI input from the control switching unit 53 and the current signal I input from the current sensor 7, and outputs the overlap width Tx to the drive signal generation unit 56e. . As shown in FIG. 2C, the overlap width calculation unit 56a includes a PI control unit 56b, a gain calculation unit 56c, and a multiplication unit 56d.

  The PI control unit 56 b calculates a compensation value by PI control (proportional integration control) based on the deviation ΔI input from the control switching unit 53. The PI control unit 56b outputs the calculated compensation value to the multiplication unit 56d. Note that control other than PI control (for example, PID control) may be performed.

The gain calculation unit 56c calculates a gain G for multiplying the compensation value output from the PI control unit 56b. The gain calculation unit 56c calculates the gain G based on the following equation (1) from the current signal I input from the current sensor 7 and the overlap width Tx calculated previously. The parameters b, c, d (0 <b, 0 <c, 0 <d) are appropriately set. When the arc length becomes longer and the arc load (load L) becomes larger, the load current becomes smaller, so the current signal I becomes smaller, and when the arc length becomes shorter and the arc load becomes smaller, the load current becomes larger. Will grow. That is, {(Tx−b) / I} in the following equation (1) changes according to the arc load, and the gain G changes linearly with the arc load. Since 0 <c, the gain G increases as the arc load increases. Further, the gain G increases in accordance with the previous overlap width Tx. The gain calculation unit 56c outputs the calculated gain G to the multiplication unit 56d.
G = c · {(Tx−b) / I} + d (1)

  The multiplying unit 56d multiplies the compensation value input from the PI control unit 56b by the gain G input from the gain calculating unit 56c. The multiplication unit 56d outputs the calculation result as the overlapping width Tx to the drive signal generation unit 56e.

  The drive signal generation unit 56e generates the drive signals P1 to P4. The drive signal generation unit 56e sets a value obtained by dividing the ratio R (for example, R = 1/5) from the overlap width Tx input from the multiplication unit 56d as a pulse width Ton (= Tx / R) to drive each of the drive signals P1 to P1. Generate P4. Further, the drive signal generation unit 56e sets the phase of the follow drive signal P2 (P4) such that the overlap width of the pulse of the advance drive signal P1 (P3) and the pulse of the follow drive signal P2 (P4) becomes the overlap width Tx. Are generated later than the phase of the preceding drive signal P1 (P3). The phase difference is Ton−Tx = Tx / R−Tx = {(1−R) / R} · Tx. For example, in the case of R = 1/5, the phase difference is 4 · Tx. The drive signal generation unit 56e outputs the generated drive signals P1 to P4 to the drive circuit 6.

  The overlapping width ratio fixing control performed by the overlapping width ratio fixing control unit 56 calculates the overlapping width Tx in accordance with the output current of the welding power supply device A1, and calculates the pulse width Ton from the overlapping width Tx and the ratio R which is a fixed value. This is a kind of pulse width control because the output is controlled by the pulse width of the drive signal. However, conventional pulse width control is different from the conventional pulse width control in that the phase of follow-up drive signal P2 (P4) is delayed from the phase of preceding drive signal P1 (P3) and the ratio of overlap width Tx of both pulses to pulse width Ton is fixed. It is different.

  The configuration of the overlap width ratio fixing control unit 56 is not limited to this, as long as the drive signals P1 to P4 for performing the overlap width ratio fixing control are generated. For example, although the case where the pulse width of the preceding drive signal P1 (P3) and the pulse width of the follow-up drive signal P2 (P4) are the same has been described above, the present invention is not limited thereto. Even if the pulse widths are different, the ratio R of the overlap width Tx to either of the pulse widths may be fixed. For example, the pulse width of the follow-up drive signal P2 (P4) is calculated from the overlap width Tx and the ratio R, with the pulse width of the preceding drive signal P1 (P3) as the previous pulse width of the follow-up drive signal P2 (P4). You may do so. The pulse width of the follow-up drive signal P2 (P4) may be calculated from the overlap width Tx and the ratio R, with the pulse width of the preceding drive signal P1 (P3) being a fixed value.

  Moreover, although the case where period T of each drive signal P1-P4 was fixed was demonstrated above, it is not restricted to this. For example, the off period of each of the drive signals P1 to P4 may be fixed, and the period T may be changed by changing the pulse width Ton according to the calculated overlap width Tx. In the above, the case of calculating and determining the overlap width Tx and calculating the pulse width Ton (= Tx / R) based on the calculated overlap width Tx has been described above, but the present invention is limited thereto. Absent. First, the pulse width Ton may be calculated and determined, and the overlap width Tx (= Ton · R) may be calculated based on the calculated pulse width Ton.

  The control circuit 5 may perform analog processing or digital processing. When digital processing is performed, the control circuit 5 may be realized by a microcomputer or the like, and a current signal input from the current sensor 7 may be converted into a digital signal by an analog / digital conversion circuit and input.

  The drive circuit 6 amplifies the drive signals P1 to P4 input from the control circuit 5 to levels that can drive the switching elements 21 to 24, and outputs the amplified signals. The configuration of the drive circuit 6 is not limited, and may be a pulse transformer method or a photo coupler method.

  Next, the operation and effect of the present embodiment will be described.

  According to the present embodiment, the control circuit 5 can switch the control according to the output. That is, the control circuit 5 performs PWM control when the output destination of the control switching unit 53 is the PWM control unit 54 when the output is high, and the output destination of the control switching unit 53 is the PSM control unit 55 when the middle output is performed. Thus, the phase shift control is performed, and when the output is low, the output destination of the control switching unit 53 becomes the overlap width ratio fixing control unit 56, thereby performing the overlap width ratio fixing control. Thus, appropriate control can be performed according to the output.

  Further, according to the present embodiment, the overlap width ratio fixing control unit 56 sets the ratio of the overlap width Tx of the pulse of the preceding drive signal P1 (P3) and the pulse of the follow drive signal P2 (P4) to the pulse width Ton Fix at a predetermined ratio R. By setting the ratio R appropriately, the fluctuation range of the output current of the welding power source device A1 can be reduced. Thus, it is possible to suppress the occurrence of arc breakage due to the minimum value of the output current becoming too small at low output. In the present embodiment, since the ratio R is set to 1/5 (20%), the cycle of the current signal I is 1⁄4 of the cycle of each of the drive signals P1 to P4 (FIG. 4). (B)). Therefore, the time taken for rising and falling of the current signal I is the shortest, and the fluctuation range of the current signal I is the smallest. Thereby, the fluctuation range of the output current of welding power supply device A1 can be reduced most.

  FIG. 8 illustrates an output current waveform of welding power supply device A100 when simulation of overlap width ratio fixed control is performed to obtain an output current (average value 250 [mA]) similar to that of the simulation in FIG. 12. It is a figure for.

The upper four stages in FIG. 8 show the waveforms of the drive signals P1 to P4 input to the switching elements 21 to 24 of the inverter circuit 2, respectively. Further, the fifth stage shows the waveform of the current signal I detected by the current sensor 7, the sixth stage shows the waveform of the output voltage V of the welding power supply device A1, and the seventh stage shows a transformer _Fig . 6 shows a waveform of a voltage V _TP of the secondary side winding 3; In the simulation, the ratio of the overlap width Tx of the pulse of the preceding drive signal P1 (P3) and the pulse of the follow drive signal P2 (P4) to the pulse width Ton of the follow drive signal P2 (P4) is a predetermined ratio R (30 %) Is fixed.

  While the variation range h of the output current I is 0 to 560 mA in the simulation of FIG. 12, the variation range h of the output current I is 60 to 500 mA in the simulation of FIG. The The fluctuation range of the output current I could be reduced to about 80%. Further, since the minimum value of the output current I is 60 [mA], it is possible to suppress the occurrence of the arc breakage due to the shortage of the current flowing to the arc.

  Further, according to the present embodiment, the overlap width ratio fixing control unit 56 calculates the overlap width Tx by the overlap width calculation unit 56a based on the current signal I, and divides the overlap width Tx by the ratio R to obtain a pulse width. Calculate Ton. Therefore, the ratio R of the overlap width Tx to the pulse width Ton can be a fixed value while feedback control of the output current is performed by adjusting the pulse width Ton.

  According to the present embodiment, the overlap width calculation unit 56a calculates the gain G from the current signal I and the overlap width Tx calculated previously, and multiplies the compensation value calculated by the PI control unit 56b by the gain G. Calculate the width Tx. Since the gain G linearly changes with respect to the arc load, the overlap width Tx can be changed according to the arc load, and the pulse width Ton can be changed. Therefore, when the arc load suddenly decreases at the time of short circuit etc., it is possible to suppress the flow of a large current by reducing the pulse width Ton.

  Next, a modification of the overlap width ratio fixing control unit 56 will be described below.

  FIG. 9A is a view for explaining an overlapping width ratio fixing control unit 56 ′ which is a first modification of the overlapping width ratio fixing control unit 56. In FIG. 9A, the same or similar elements as or to the overlap width ratio fixing control unit 56 (see FIG. 2C) are denoted by the same reference numerals. The overlap width ratio fixing control unit 56 'first generates a PWM signal by a general pulse width control method, and the tracking drive signal P2 (P4) is generated by a predetermined phase difference from the preceding drive signal P1 (P3). The output is delayed.

  The overlap width ratio fixing control unit 56 'shown in FIG. 9A includes a PI control unit 56b and a drive signal generation unit 56e'. The PI control unit 56b is the same as the PI control unit 56b shown in FIG. 2 (c).

  The drive signal generation unit 56 e ′ generates the drive signals P 1 to P 4 and outputs the drive signals to the drive circuit 6. The drive signal generation unit 56 e ′ generates a PWM signal by comparing the signal of the compensation value input from the PI control unit 56 b with a carrier signal such as a triangular wave generated inside. Then, the drive signal generation unit 56e 'outputs the generated PWM signal as the preceding drive signal P1 (P3), delays the phase of the generated PWM signal, and outputs it as the follow drive signal P2 (P4). The phase difference is Ton−Tx = Ton−Ton · R = Ton · (1−R). For example, when R = 1/5, the phase difference is (4/5) · Ton. Since the output is reduced by shifting the phase between the preceding drive signal P1 (P3) and the follow drive signal P2 (P4), it is not necessary to make the pulse width of the PWM signal too small.

  According to the first modification, the overlap width ratio fixing control unit 56 ′ delays the phase of the follow-up drive signal P2 (P4) from the phase of the precedent drive signal P1 (P3) and generates the pulse of the precedent drive signal P1 (P3). The ratio of the overlapping width Tx of the follow-up driving signal P2 (P4) to the pulse with respect to the pulse width Ton is fixed to a predetermined ratio R. Therefore, also in the first modification, the same effect as that of the first embodiment can be obtained. Further, according to the first modified example, it is possible to achieve an effect that the calculation of the overlap width Tx becomes easy.

  Fig. 9 (b) is a diagram for describing an overlapping width ratio fixing control unit 56 "which is a second modification of the overlapping width ratio fixing control unit 56. In Fig. 9 (b), the overlapping width ratio is The same or similar elements as or to those of the fixing control unit 56 (see FIG. 2C) are denoted by the same reference numerals. The overlapping width ratio fixing control unit 56 ′ ′ has the pulse widths of the drive signals P1 to P4. Instead of controlling the output current by adjustment, the output current is controlled by adjusting the DC voltage input to the inverter circuit 2.

  The overlap width ratio fixing control unit 56 ′ ′ shown in FIG. 9B includes a PI control unit 56b and a drive signal generation unit 56e ′ ′. Further, the DC power supply 1 (see FIG. 1) of the welding power supply A1 is a DC power supply 1 'capable of changing the output voltage. The PI control unit 56b is similar to the PI control unit 56b shown in FIG. 2C, but outputs the calculated compensation value to the DC power supply 1 '.

  The drive signal generation unit 56e ′ ′ generates the drive signals P1 to P4 and outputs the drive signals P1 to P4 to the drive circuit 6. The drive signal generation unit 56e ′ ′ has drive signals of a predetermined frequency and a predetermined pulse width Ton. Generate P1 to P4. Further, the drive signal generation unit 56 e ′ ′ makes the overlap width between the pulse of the preceding drive signal P 1 (P 3) and the pulse of the follow drive signal P 2 (P 4) equal to a predetermined overlap width Tx (= Ton · R). The phase of the follow-up drive signal P2 (P4) is generated later than the phase of the preceding drive signal P1 (P3) The phase difference is Ton-Tx = Ton-Ton-R = Ton-(1-R).

  The DC power supply 1 'is a DC power supply capable of changing the output voltage, and changes the output voltage according to the compensation value input from the PI control unit 56b. That is, the control circuit 5 performs so-called amplitude control.

  According to the second modification, the overlap width ratio fixing control unit 56 ′ ′ delays the phase of the follow-up drive signal P2 (P4) from the phase of the preceding drive signal P1 (P3), and The ratio of the overlapping width Tx to the pulse of the follow-up driving signal P2 (P4) to the pulse width Ton is fixed to a predetermined ratio R. Therefore, also in the second modification, the same effect as the first embodiment is obtained. Since the amplitude control is performed, the pulse width Ton of each of the drive signals P1 to P4 can be fixed, and the output current can be controlled by adjusting the frequency of each of the drive signals P1 to P4. Frequency control may be performed.

  In the first embodiment, the case where three controls are switched according to the output has been described, but the present invention is not limited to this. For example, phase shift control may be performed at high output and medium output, and overlap width ratio fixed control may be performed at low output. Such a case will be described below as a second embodiment.

  FIG. 10 is a view for explaining a welding power supply A2 according to the second embodiment. In FIG. 10, the same or similar elements as or to those of the welding power source A1 (see FIG. 1) according to the first embodiment are denoted by the same reference numerals. Welding power supply device A2 differs from welding power supply device A1 according to the first embodiment in that it does not have PWM control unit 54.

The control switching unit 53 outputs the deviation ΔI input from the subtraction unit 52 to the PSM control unit 55 or the overlap width ratio fixing control unit 56 according to the target value I ^* input from the output current setting unit 51. The control switching unit 53 outputs the deviation ΔI to the PSM control unit 55 when the target value I ^* is in a predetermined high output range (high output) and in a middle output range (medium output). Further, when the target value I ^* is in the low output range set in advance (at the time of low output), the deviation ΔI is output to the overlap width ratio fixing control unit 56. While the deviation ΔI is input, the PSM control unit 55 and the overlap width ratio fixing control unit 56 generate drive signals P1 to P4 based on the deviation ΔI and output the drive signals P1 to P4 to the drive circuit 6.

  According to the second embodiment, the control circuit 5 performs phase shift control by setting the output destination of the control switching unit 53 to the PSM control unit 55 at high output and medium output, and at low output, the control switching unit 53. Since the output destination of is the overlapping width ratio fixing control unit 56, the overlapping width ratio fixing control is performed. Thus, appropriate control can be performed according to the output. Further, also in the second embodiment, since the overlap width ratio fixing control unit 56 performs the overlap width ratio fixing control, the fluctuation range of the output current of the welding power source device A1 can be reduced. Thus, it is possible to suppress the occurrence of arc breakage due to the minimum value of the output current becoming too small at low output.

  Although the case where the power supply device according to the present invention is used as a welding power supply device has been described in the first and second embodiments, the present invention is not limited to this. The present invention can also be applied to other power supplies. The present invention is effective in stabilizing the output current by reducing the fluctuation range of the output current, and is particularly effective when stabilizing the output in a power supply device that needs to be controlled to a low output. It is.

  The inverter control circuit and the power supply device according to the present invention are not limited to the embodiments described above. The specific configuration of each part of the inverter control circuit and the power supply device according to the present invention can be varied in design in many ways.

A1, A2 welding power supply 1,1 'DC power supply 2 inverter circuit 21, 22, 23, 24 switching element 3 transformer 31 primary side winding 32 secondary side winding 4 rectification circuit 41, 42 rectification diode 43 DC reactor Reference Signs List 5 control circuit 51 output current setting unit 52 subtraction unit 53 control switching unit 54 PWM control unit (third control means)
54a PI control unit 54b drive signal generation unit 55 PSM control unit (first control means)
55a PI control unit 55b drive signal generation unit 56, 56 ', 56 "overlapping width ratio fixing control unit (second control means)
56a overlap width calculation unit 56b PI control unit 56c gain calculation unit 56d multiplication unit 56e, 56e ', 56e "drive signal generation unit 6 drive circuit 7 current sensor L load

Claims (13)

A control circuit that generates and outputs a preceding drive signal input to a switching element disposed in one arm of the inverter circuit and a follow-up driving signal input to a switching element disposed in the other arm,
A first control for controlling an output current by delaying the phase of the follow-up drive signal from the phase of the preceding drive signal and outputting it, and changing the phase difference between the phase of the preceding drive signal and the phase of the follow-up drive signal Means,
Second control means for outputting a pulse of the preceding drive signal and a pulse of the following drive signal so as to overlap each other by a predetermined ratio of the pulse width of the preceding drive signal or the following drive signal;
Control switching means for switching between control by the first control means and control by the second control means;
The control circuit characterized by having. Third control means for controlling the output current by matching the phase of the follow-up drive signal with the phase of the advance drive signal and outputting the same, and changing the pulse widths of the advance drive signal and the follow-up drive signal is further provided. Equipped
The control switching means switches between control by the first control means, control by the second control means, and control by the third control means.
The control circuit according to claim 1. The control switching means switches control based on a target value of the output current of the inverter circuit.
A control circuit according to claim 1 or 2. The control switching unit switches control based on an output current of the inverter circuit.
A control circuit according to claim 1 or 2. The control switching unit switches control based on a pulse width of the preceding drive signal or the following drive signal, or a phase difference between the phase of the preceding drive signal and the phase of the following drive signal.
A control circuit according to claim 1 or 2. The predetermined ratio is greater than 0 and less than 1/2.
The control circuit according to any one of claims 1 to 5. The predetermined ratio is 1/5.
The control circuit according to claim 6. The second control means is
Overlap width calculating means for calculating an overlap width which is a length of an overlapping portion of the pulse of the preceding drive signal and the pulse of the follow-up drive signal based on the output current of the inverter circuit;
Drive signal generation means for generating the preceding drive signal and the following drive signal as a pulse width of the preceding drive signal and the following drive signal, a time obtained by dividing the overlapping width by the predetermined ratio;
Equipped with
The control circuit according to any one of claims 1 to 7. The overlap width calculation means
The gain is calculated from the current signal obtained by detecting the current after transforming and rectifying the output of the inverter circuit, and the overlap width previously calculated,
The overlapping width is calculated by multiplying the compensation value calculated from the deviation between the current signal and the target value by the gain.
The control circuit according to claim 8. The second control means is
Adjusting pulse widths of the preceding drive signal and the following drive signal based on the output current of the inverter circuit;
The control circuit according to any one of claims 1 to 7. The second control means is
Adjusting a DC voltage input to the inverter circuit based on an output current of the inverter circuit;
The control circuit according to any one of claims 1 to 7. The control circuit according to any one of claims 1 to 11.
The inverter circuit;
A power supply apparatus comprising: Supply power to the welding torch in the welding system
The power supply device according to claim 12.