JP2017118685A - Inverter control circuit and electric power supply - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an inverter control circuit capable of reducing a fluctuation range of an output current at a low power.SOLUTION: A control circuit 5 generates a preceding drive signal P1(P3) that is inputted to a switching element 21(23) arranged to one arm of an inverter circuit 2; and a tracking driving signal P2(P4) that is inputted to a switching element 22(24) arranged to the other arm. The control circuit 5 comprises: a PSM control part 55 that outputs a phase of the tracking driving signal P2(P4) so as to be delayed from the phase of the preceding drive signal P1(P3), and controls an output current by changing a phase difference; an overlapping width rate fixing control part 56 that outputs a signal so as to overlap a pulse of the preceding drive signal P1(P3) with the pulse of tracking driving signal P2(P4) by a predetermined rate of a pulse width of the preceding drive signal P1(P3) or the tracking driving signal P2(P4); a control switching part 53 that switches a control by the PSM control part 55 to the control by the overlapping width rate fixing control part 56.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an inverter control circuit and a power supply device using the same.

  Arc welding is known in which an arc is generated between a welding torch and a workpiece, and the workpiece is welded by the heat of the arc. Electric power is supplied to the arc from the welding power source device.

  FIG. 11 is a diagram for explaining a general welding power source apparatus A100, and shows the overall configuration of the welding system. One output terminal a of the welding power source apparatus A100 is connected to the electrode at the tip of the welding torch T via the power cable C1. The other output terminal b of the welding power source device A100 is connected to the workpiece W via the power cable C2. The welding power supply device A100 generates an arc between the tip of the electrode of the welding torch T and the workpiece W, and supplies electric power to the arc. A welding power source apparatus A100 includes a DC power source 1 that outputs DC current, an inverter circuit 2 that converts DC current into AC current, a transformer 3 that transforms AC voltage output from the inverter circuit 2, and AC current that is converted into DC current. A rectifier circuit 4 for controlling the inverter circuit 2, a drive circuit 6 for amplifying the drive signals P1 to P4, and a current sensor 7 for detecting the output current of the welding power source apparatus A100. The control circuit 500 performs output current control based on the current signal I detected by the current sensor 7.

  In the welding power source apparatus A100, there is known one in which the control of the inverter circuit 2 is switched between pulse width control and phase shift control in order to stabilize output at low output (see, for example, Patent Document 1). In such welding power source apparatus A100, in order to prevent the pulse width of the drive signal from becoming too small at the time of low output, the control circuit 500 outputs by shifting the phase of the pulse while keeping the pulse width fixed. (Phase shift control) is performed.

JP 2009-131007 A

  FIG. 12 is a diagram for describing an output current waveform of welding power supply apparatus A100 when a phase shift control simulation is performed.

In FIG. 12, the upper four stages show the waveforms of the drive signals P1 to P4 input to the switching elements 21 to 24 of the inverter circuit 2, respectively. The fifth stage shows the waveform of the current signal I detected by the current sensor 7, the sixth stage shows the waveform of the output voltage V of the welding power source device A1, and the seventh stage shows the transformer. 3 shows the waveform of the voltage V _TP of the secondary side winding _No. 3. As shown in the figure, the phase of the drive signal P2 is delayed from the phase of the drive signal P1, and the phase of the drive signal P4 is delayed from the phase of the drive signal P3. Only when the pulse of the drive signal P1 (P3) and the pulse of the drive signal P2 (P4) overlap, the DC power source 1 is connected to the primary winding 31 of the transformer 3 and a voltage is applied. Therefore, the output of the welding power source device A100 can be controlled by adjusting the phase difference between the drive signal P1 (P3) and the drive signal P2 (P4).

  As shown in the figure, the current signal I rises when both the drive signal P1 (P3) and the drive signal P2 (P4) are on (when both pulses overlap), and the drive signal P1 It falls when either (P3) or drive signal P2 (P4) is on. Further, when all the drive signals P1 to P4 are off (dead time), a flyback current flows, and the current signal I changes from rising to falling. In the case of the example in FIG. 12, since the pulse width of the drive signal P1 (P3) and the drive signal P2 (P4) is relatively long while the pulse width of the drive signals P1 to P4 is small, the dead time is long. It has become. Since the time during which the current signal I falls during the dead time is long, the fluctuation range h of the current signal I is wide (the difference between the maximum value and the minimum value is large). Then, since the target value of the current signal I is small, the minimum value of the current signal I becomes too small, and the current flowing through the arc may be insufficient to cause an arc break.

  The present invention has been conceived under the circumstances described above, and an object of the present invention is to provide an inverter control circuit and a power supply device that can reduce the fluctuation range of the output current at the time of low output.

  In order to solve the above problems, the present invention takes the following technical means.

  The control circuit provided by the first aspect of the present invention includes a preceding drive signal that is input to a switching element disposed in one arm of an inverter circuit, and a tracking that is input to the switching element disposed in the other arm. A drive circuit that generates and outputs a drive signal, the phase of the follow drive signal being delayed from the phase of the preceding drive signal, and a phase between the phase of the advance drive signal and the phase of the follow drive signal A first control means for controlling an output current by changing a phase difference; and a pulse of the preceding drive signal and a pulse of the follow drive signal by a predetermined ratio of a pulse width of the preceding drive signal or the follow drive signal. And a control switching means for switching between the control by the first control means and the control by the second control means. And wherein the are. According to this configuration, while the control is switched to the control by the second control means, the overlapping time of the pulse of the preceding drive signal and the pulse of the follower drive signal becomes a predetermined ratio of the pulse width of the preceding drive signal or the follower drive signal. Fixed. By appropriately setting the predetermined ratio, the fluctuation range of the output current of the inverter circuit can be reduced. Further, since the control by the first control means and the control by the second control means can be switched, appropriate control according to the output can be performed.

  In a preferred embodiment of the present invention, the control circuit outputs the following drive signal and the preceding drive signal in phase with each other, and changes the pulse width of the preceding drive signal and the following drive signal. And further comprising third control means for controlling the output current, wherein the control switching means includes control by the first control means, control by the second control means, and control by the third control means. Switch. According to this configuration, since the control by the first control means, the control by the second control means, and the control by the third control means can be switched, further appropriate control according to the output can be performed. .

  In a preferred embodiment of the present invention, the control switching means switches control based on a target value of the output current of the inverter circuit. According to this configuration, it is possible to prevent erroneous switching due to a detection error in the sensor.

  In a preferred embodiment of the present invention, the control switching means switches control based on the output current of the inverter circuit. According to this structure, it can switch according to an actual state.

  In a preferred embodiment of the present invention, the control switching means is based on a pulse width of the preceding drive signal or the following drive signal, or a phase difference between the phase of the preceding drive signal and the phase of the follow drive signal. Switch the control. According to this configuration, switching can be reliably performed before the pulse width or phase difference that may cause a problem is reached.

  In a preferred embodiment of the present invention, the predetermined ratio is greater than 0 and less than 1/2. According to this configuration, output can be performed while suppressing the fluctuation range of the current signal.

  In a preferred embodiment of the present invention, the predetermined ratio is 1/5. According to this configuration, the fluctuation range of the current signal can be minimized.

  In a preferred embodiment of the present invention, the second control means has a length of a portion where the pulse of the preceding drive signal and the pulse of the following drive signal overlap based on the output current of the inverter circuit. An overlap width calculating means for calculating an overlap width; and a drive signal generating means for generating the drive signal using a time obtained by dividing the overlap width by the predetermined ratio as a pulse width of the preceding drive signal and the follow drive signal; It has. According to this configuration, the ratio of the overlap width to the pulse width can be set to a fixed value while feedback control of the output current is performed by adjusting the pulse width.

  In a preferred embodiment of the present invention, the overlap width calculating means calculates a gain from a current signal obtained by detecting a current after transforming and rectifying the output of the inverter circuit, and a previously calculated overlap width, The overlap width is calculated by multiplying the compensation value calculated from the deviation between the current signal and the target value by the gain. According to this configuration, the overlap width can be changed according to the arc load, and the pulse width can be changed. Therefore, when the arc load suddenly decreases during a short circuit or the like, it is possible to suppress a large current from flowing by reducing the pulse width.

  In a preferred embodiment of the present invention, the second control means adjusts the pulse widths of the preceding drive signal and the following drive signal based on the output current of the inverter circuit. According to this configuration, the overlap width can be easily calculated.

  In a preferred embodiment of the present invention, the second control means adjusts a DC voltage input to the inverter circuit based on an output current of the inverter circuit. According to this configuration, the pulse width of each drive signal can be fixed.

  The power supply device provided by the second aspect of the present invention includes the control circuit provided by the first aspect of the present invention and the inverter circuit. According to this configuration, since the control of the power supply device can be appropriately switched, it is possible to perform appropriate control according to the output.

  In a preferred embodiment of the invention, power is supplied to the welding torch in the welding system. According to this configuration, since the control of the power supply device (welding power supply device) that supplies power to the welding torch can be appropriately switched, appropriate control according to the output can be performed.

  According to the present invention, while the control is switched to the control by the second control means, the overlap time of the pulse of the preceding drive signal and the pulse of the follow drive signal becomes a predetermined ratio of the pulse width of the preceding drive signal or the follow drive signal. Fixed. By appropriately setting the predetermined ratio, the fluctuation range of the output current of the inverter circuit can be reduced.

  Other features and advantages of the present invention will become more apparent from the detailed description given below with reference to the accompanying drawings.

It is a figure for demonstrating the welding power supply device which concerns on 1st Embodiment. It is a block diagram which shows the detail of each control part of the control circuit which concerns on 1st Embodiment. It is a figure for demonstrating the waveform of a preceding drive signal, and the waveform of a tracking drive signal. It is a figure for demonstrating the current waveform which changes with the predetermined ratio R. FIG. It is a figure for demonstrating the ON / OFF state of each switching element, and the flowing electric current. It is a figure for demonstrating the ON / OFF state of each switching element, and the flowing electric current. It is a figure for demonstrating the current waveform which changes with the predetermined ratio R. FIG. It is a figure for demonstrating the output current waveform of a welding power supply device when the simulation of overlap width ratio fixed control was performed. It is a figure for demonstrating the modification of an overlap width ratio fixed control part. It is a figure for demonstrating the welding power supply device which concerns on 2nd Embodiment. It is a figure for demonstrating the conventional general welding power supply device. It is a figure for demonstrating the output current waveform of a welding power supply device when simulating phase shift control.

  Hereinafter, embodiments of the present invention will be specifically described with reference to the drawings, taking as an example the case where the power supply apparatus according to the present invention is used as a welding power supply apparatus.

  FIG. 1 is a view for explaining a welding power supply device A1 according to the first embodiment, and shows an overall configuration of the welding power supply device A1. FIG. 2 is a block diagram showing details of each control unit of the control circuit 5.

  The welding power supply device A1 generates an arc between the tip of the electrode of the welding torch and the workpiece, and supplies electric power to the arc. In FIG. 1, a welding torch, a workpiece, and an arc are collectively shown as a load L. As shown in FIG. 1, the welding power supply device A <b> 1 includes a DC power supply 1, an inverter circuit 2, a transformer 3, a rectifier circuit 4, a control circuit 5, a drive circuit 6, and a current sensor 7.

  The DC power source 1 outputs a DC current, and includes, for example, a rectifier circuit that rectifies an AC current input from the power system, and a smoothing capacitor that smoothes the AC current. Note that the DC power source 1 is not limited to one that converts an alternating current into a direct current and outputs it. For example, what outputs DC current, such as a fuel cell, a storage battery, a solar cell, etc. may be sufficient as long as it outputs DC current to the inverter circuit 2.

  The inverter circuit 2 converts a direct current input from the direct current power source 1 into a high frequency current and outputs the high frequency current to the transformer 3. The inverter circuit 2 is a single-phase full-bridge type inverter, and includes four switching elements 21 to 24. In the present embodiment, IGBTs (Insulated Gate Bipolar Transistors) are used as the switching elements 21 to 24. The switching elements 21 to 24 are not limited to IGBTs, and may be bipolar transistors, MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), or the like.

  The switching element 21 and the switching element 23 are connected in series by connecting the emitter terminal of the switching element 21 and the collector terminal of the switching element 23. The collector terminal of the switching element 21 is connected to the positive side of the DC power source 1 and the emitter terminal of the switching element 23 is connected to the negative side of the DC power source 1 to form a bridge structure. Similarly, the switching element 24 and the switching element 22 are connected in series to form a bridge structure. The bridge structure formed by the switching element 21 and the switching element 23 is a leading arm, and the bridge structure formed by the switching element 24 and the switching element 22 is a tracking arm. An output line is connected to a connection point between the switching element 21 and the switching element 23 of the preceding arm, and an output line is also connected to a connection point between the switching element 24 and the switching element 22 of the tracking arm. A primary winding 31 of the transformer 3 is connected between these two output lines. A flywheel diode is connected to each switching element 21 to 24 in antiparallel. Drive signals P1 to P4 output from the drive circuit 6 are input to the gate terminals of the switching elements 21 to 24, respectively. Each of the switching elements 21 to 24 can be switched between an on state and an off state based on the drive signals P1 to P4, respectively. Thereby, a direct current is converted into an alternating current. The inverter circuit 2 is not limited to this.

  The transformer 3 transforms the AC voltage output from the inverter circuit 2 and outputs it to the rectifier circuit 4. The secondary winding 32 of the transformer 3 is provided with a center tap in addition to the two output terminals.

  The rectifier circuit 4 is a double-wave rectifier circuit using the center tap of the transformer 3, and rectifies the alternating current output from the transformer 3 and outputs it as a direct current. The rectifier circuit 4 includes two rectifier diodes 41 and 42 and a DC reactor 43. The rectifying diodes 41 and 42 are connected in series with anode terminals connected to the respective output terminals of the secondary winding 32 of the transformer 3. The DC reactor 43 is connected in series between the connection point c on the cathode terminal side of the rectifying diodes 41 and 42 and the output terminal a of the welding power source device A1, and stabilizes the output current. The center tap of the transformer 3 is connected to the output terminal b of the welding power supply device A1. The direct current output from the rectifier circuit 4 flows as a welding current to the load L (arc or the like).

  The current sensor 7 is disposed on a connection line between the center tap of the transformer 3 and the output terminal b, detects the output current of the welding power supply device A1, and outputs it as a current signal I to the control circuit 5. Note that the current sensor 7 may be disposed on a connection line between the DC reactor 43 and the output terminal a.

  The control circuit 5 controls the inverter circuit 2, generates a drive signal for controlling the inverter circuit 2, and outputs the drive signal to the drive circuit 6. The control circuit 5 performs output current control, and feedback-controls the output current of the welding power source device A1 based on the current signal I input from the current sensor 7. The control circuit 5 performs normal pulse width control at the time of high output, performs phase shift control at the time of medium output, and performs overlap width ratio fixed control described later at the time of low output. The control circuit 5 includes an output current setting unit 51, a subtraction unit 52, a control switching unit 53, a PWM (Pulse Width Modulation) control unit 54, a PSM (Phase Shift Modulation) control unit 55, and an overlap width ratio fixed control unit 56. I have.

The output current setting unit 51 sets a target value I ^* of the output current of the welding power source device A1. The output current setting unit 51 outputs the set target value I ^* to the subtraction unit 52 and the control switching unit 53. The output current setting unit 51 sets a target value I ^* based on welding conditions input by an operator or programmed in advance. The subtraction unit 52 calculates a deviation ΔI (= I ^* −I) between the current signal I input from the current sensor 7 and the target value I ^* input from the output current setting unit 51, and the control switching unit 53 Output to.

The control switching unit 53 uses the PWM control unit 54, the PSM control unit 55, and the overlap width ratio fixed control unit to convert the deviation ΔI input from the subtraction unit 52 in accordance with the target value I ^* input from the output current setting unit 51. To any of 56. The control switching unit 53 outputs the deviation ΔI to the PWM control unit 54 when the target value I ^* is a preset high output range (at the time of high output). Further, when the target value I ^* is a preset medium output range (<high output range) (medium output), the deviation ΔI is output to the PSM control unit 55. Further, when the target value I ^* is a preset low output range (<medium output range) (at the time of low output), the deviation ΔI is output to the overlap width ratio fixed control unit 56. While the deviation ΔI is input, the PWM control unit 54, the PSM control unit 55, and the overlap width ratio fixing control unit 56 generate drive signals P1 to P4 based on the deviation ΔI and output them to the drive circuit 6. That is, control according to any of the control units 54 to 56 to which the control switching unit 53 outputs the deviation ΔI is performed. Thereby, the control circuit 5 can switch control according to the output of welding power supply device A1.

The control switching method in the control circuit 5 is not limited to the above. For example, the subtraction unit 52 outputs the deviation ΔI to the PWM control unit 54, the PSM control unit 55, and the overlap width ratio fixed control unit 56, and the control switching unit 53 performs the PWM control unit 54, the PSM control unit according to the target value I ^*. 55 and the overlap width ratio fixed control unit 56 may be driven, or the drive signals P1 to P1 output from any of the PWM control unit 54, the PSM control unit 55, and the overlap width ratio fixed control unit 56. Only P4 may be output to the drive circuit 6. The control circuit 5 may be any circuit that switches between control by the PWM control unit 54, control by the PSM control unit 55, and control by the overlapping width ratio fixed control unit 56.

  In this embodiment, if the target value of the output current is a range where the normal pulse width control can be performed and the target value of the output current is small and the normal pulse width control is performed, The range in which the pulse width becomes too narrow to perform appropriate control and excluding the low output range is defined as the medium output range. For example, the duty ratio of the PWM signal is several percent or less, and the target value of the output current is several [A] or less. In addition, when the target value of the output current is further reduced and phase shift control is performed, the range in which the output current becomes too small and the current flowing through the arc is insufficient to increase the possibility of arc breakage. Low output range. For example, this is a case where the target value of the output current is several hundred [mA] or less. In addition, how to set each range is not restricted to this.

Further, the control switching in the control circuit 5 is not limited to switching according to the target value I ^* . For example, the voltage may be switched according to the current signal I input from the current sensor 7, or the voltage between the output terminal a and the output terminal b may be switched according to a voltage signal detected by a voltage sensor (not shown). It may be. Further, switching may be performed according to a value calculated by a predetermined calculation formula based on the voltage signal and the current signal. When switching according to the target value I ^* , there is an effect of preventing erroneous switching due to a detection error in the sensor. On the other hand, when switching based on the detected current signal or voltage signal, there is an effect that switching can be performed according to the actual state. Further, the control by the PWM control unit 54 and the control by the PSM control unit 55 are switched according to the pulse width, and the control by the PSM control unit 55 and the control by the overlap width ratio fixed control unit 56 are switched according to the phase difference. You may do it. In this case, there is an effect that switching can be surely performed before the pulse width or phase difference that may cause a problem is reached.

  The PWM control unit 54 performs pulse width control, generates drive signals P1 to P4 based on the deviation ΔI input from the control switching unit 53, and outputs the drive signals P1 to P4 to the drive circuit 6. As shown in FIG. 2A, the PWM control unit 54 includes a PI control unit 54a and a drive signal generation unit 54b. The PI control unit 54a calculates a compensation value by PI control (proportional integration control) based on the input deviation ΔI, and outputs it as a compensation value signal to the drive signal generation unit 54b. Control other than PI control may be performed. The drive signal generation unit 54b generates a PWM signal by comparing the compensation value signal input from the PI control unit 54a with a carrier signal such as a triangular wave generated internally, and outputs the PWM signal as a drive signal. . In this case, the same drive signal is input to the switching element 21 and the switching element 22, and the same drive signal is input to the switching element 23 and the switching element 24. That is, there is no phase difference between the drive signal P1 (P3) input to the switching element 21 (23) and the drive signal P2 (P4) input to the switching element 22 (24). Note that the configuration of the PWM control unit 54 is not limited to this, and any configuration may be used as long as it generates the drive signals P1 to P4 for performing the pulse width control. The “PWM control unit 54” corresponds to “third control means” of the present invention.

  The PSM control unit 55 is for performing phase shift control, generates drive signals P1 to P4 based on the deviation ΔI input from the control switching unit 53, and outputs the drive signals P1 to P4 to the drive circuit 6. As shown in FIG. 2B, the PSM control unit 55 includes a PI control unit 55a and a drive signal generation unit 55b. The PI control unit 55a calculates a compensation value by PI control (proportional integration control) based on the input deviation ΔI, and outputs the compensation value signal to the drive signal generation unit 55b as a compensation value signal. Control other than PI control may be performed. The drive signal generation unit 55b generates a pulse signal having a predetermined frequency with a predetermined duty ratio, and outputs the pulse signal as a drive signal. The drive signal generation unit 55b outputs a phase difference between the drive signal P1 (P3) input to the switching element 21 (23) and the drive signal P2 (P4) input to the switching element 22 (24). To do. In the present embodiment, control is performed so that the phase of the drive signal P2 is delayed from the phase of the drive signal P1 and the phase of the drive signal P4 is delayed from the phase of the drive signal P3. Hereinafter, the drive signal P1 (P3) input to the switching element 21 (23) is referred to as a preceding drive signal P1 (P3), and the drive signal input to the switching element 22 (24) is referred to as a follow-up drive signal P2 (P4). By shifting the phase, the portion where the pulse of the preceding drive signal P1 (P3) and the pulse of the follow-up drive signal P2 (P4) overlap becomes smaller, so even if the pulse width is the same, the output is made smaller than when the phase is not shifted. be able to. Further, the phase difference is changed according to the compensation value signal input from the PI control unit 55a. That is, the larger the compensation value signal, the smaller the output by increasing the phase difference. On the other hand, as the compensation value signal is smaller, the output is increased by reducing the phase difference. Note that the configuration of the PSM control unit 55 is not limited to this, and any configuration that generates the drive signals P1 to P4 for performing the phase shift control may be used. The “PSM control unit 55” corresponds to “first control means” of the present invention.

  The overlap width ratio fixed control unit 56 is for performing control when the output is smaller, generates drive signals P1 to P4 based on the deviation ΔI input from the control switching unit 53, and drives the drive circuit 6 Output to. The overlapping width ratio fixing control unit 56 fixes the ratio of the length of the portion where the pulse of the preceding driving signal P1 (P3) and the pulse of the following driving signal P2 (P4) overlap to the predetermined width R to a predetermined ratio R. Take control. The “overlap width ratio fixing control unit 56” corresponds to “second control means” of the present invention.

  FIG. 3 is a diagram for explaining the waveform of the preceding drive signal P1 (P3) and the waveform of the follow-up drive signal P2 (P4). The upper waveform is the preceding drive signal P1 (P3), and the lower waveform is the follow drive signal P2 (P4). The period T of each drive signal P1 to P4 is fixed. The pulse width of each of the drive signals P1 to P4 is Ton, and the length of the overlapping portion of the pulse of the preceding drive signal P1 (P3) and the pulse of the follow-up drive signal P2 (P4) (hereinafter referred to as “overlap width”) Is Tx. Although the pulse width Ton and the overlap width Tx vary depending on the output of the welding power source device A1, the ratio R of the overlap width Tx to the pulse width Ton is fixed. Therefore, if the overlap width Tx is determined, the pulse width Ton (= Tx / R) is determined, and if the pulse width Ton is determined, the overlap width Tx (= Ton · R) is determined. In the present embodiment, the overlap width Tx is first calculated and determined, and the pulse width Ton (= Tx / R) is calculated based on the calculated overlap width Tx. Note that the pulse width Ton may be calculated and determined first, and the overlap width Tx (= Ton · R)) may be calculated based on the calculated pulse width Ton. In the present embodiment, the ratio R is 1/5 (20%). Hereinafter, the control performed by fixing the ratio R of the overlap width Tx to the pulse width Ton is referred to as “overlap width ratio fixed control”.

  FIG. 4 is a diagram for explaining a current waveform that changes according to a predetermined ratio R, and shows a result of simulating the behavior of the welding power source device A1 by a computer.

FIG. 4A shows a case where R = 1 (100%), and FIG. 4B shows a case where R = 1/5 (20%). 4A and 4B, the upper four stages show the waveforms of the drive signals P1 to P4, and the fifth stage shows the waveform of the current signal I detected by the current sensor 7. The sixth stage shows the waveform of the output voltage V of the welding power source device A1, and the seventh stage shows the waveform of the voltage _VTP of the secondary winding of the transformer 3. In order to make the output currents of both the same level, the pulse widths of the drive signals P1 to P4 are different (the pulse width in FIG. 4A is small).

In FIG. 4A, the phase of the pulse of the preceding drive signal P1 (P3) and the phase of the pulse of the follow-up drive signal P2 (P4) match, and there is no phase difference. In this case, the cycle of the current signal I is half the cycle of the drive signals P1 to P4. On the other hand, in FIG. 4B, the overlap width Tx is 20% of the pulse width Ton of each drive signal P1 to P4, and the follow-up is performed when 80% of the pulse of the preceding drive signal P1 (P3) has elapsed. The pulse of the drive signal P2 (P4) rises. In this case, the cycle of the current signal I is a quarter of the cycle of each of the drive signals P1 to P4. That is, in the case of FIG. 4B, the period is shorter than in the case of FIG. 4A, the time taken for the current signal I to rise and fall is shortened, and the fluctuation range of the current signal I becomes small. Yes. While the current signal I in FIG. 4A varies between 0 to 500 mA (see the range h shown in the figure), the current signal I in FIG. 4B varies between 50 to 300 mA. (Refer to the range h shown in the figure). In other words, when the same current is output, the fluctuation range of the current signal I when R = 1/5 is about half that when R = 1. When R = 1, there is a moment when the current signal I becomes 0 mA. At this time, the current flowing through the arc may be insufficient and an arc break may occur.

  5 and 6 are diagrams for explaining the on / off states of the switching elements 21 to 24 and the flowing currents.

  FIG. 5A shows a state in the period A shown in FIG. In the period A, the switching elements 21 and 22 are turned on, and the switching elements 23 and 24 are turned off. During this period, a voltage is applied to the primary side winding of the transformer 3, and a current indicated by a dashed arrow flows. At this time, an output current indicated by a one-dot chain line arrow flows from the secondary winding of the transformer 3. During the period A, the primary side current gradually increases and the output current also gradually increases (see I in FIG. 4B).

  FIG. 5B shows a state in the period B shown in FIG. In the period B, the voltage applied to the primary winding of the transformer 3 is cut off because the switching element 21 is switched to the OFF state. However, since there is a current path including the flywheel diode of the switching element 23 (see the broken line arrow), the current continues to flow. Also at this time, an output current indicated by a one-dot chain line arrow flows from the secondary winding of the transformer 3. During the period B, the primary-side current gradually decreases and the output current also gradually decreases (see I in FIG. 4B).

  FIG. 5C shows a state in the period C shown in FIG. In the period C, since the switching element 22 is also switched off, all the switching elements 21 to 24 are turned off, and the primary side of the transformer 3 is unloaded. At this time, the energy stored in the secondary winding is released to the secondary side of the transformer 3, and an output current indicated by a one-dot chain line arrow flows. During the period C, the output current gradually increases (see I in FIG. 4B).

  FIG. 5D shows a state in the period D shown in FIG. In the period D, since the switching element 23 is switched to the ON state, a current path including the flywheel diode of the switching element 22 is formed, and thus a current indicated by a broken-line arrow flows. As a result, the output current indicated by the one-dot chain line arrow gradually decreases (see I in FIG. 4B).

  FIG. 6A shows a state in the period E shown in FIG. In the period E, the switching element 24 is switched to the ON state, so that a voltage is applied to the primary winding of the transformer 3 and a current indicated by a broken-line arrow flows. At this time, an output current indicated by a one-dot chain line arrow flows from the secondary winding of the transformer 3. During the period E, the primary side current gradually increases and the output current also gradually increases (see I in FIG. 4B).

  FIG. 6B shows a state in the period F shown in FIG. In the period F, the voltage applied to the primary side winding of the transformer 3 is cut off because the switching element 23 is switched to the OFF state. However, since there is a current path including the flywheel diode of the switching element 21 (see the broken line arrow), the current continues to flow. Also at this time, an output current indicated by a one-dot chain line arrow flows from the secondary winding of the transformer 3. During the period F, the primary current gradually decreases, and the output current also gradually decreases (see I in FIG. 4B).

  FIG. 6C shows a state in the period G shown in FIG. In the period G, since the switching element 24 is also switched to the off state, all the switching elements 21 to 24 are in the off state, and the primary side of the transformer 3 is unloaded. At this time, the energy stored in the secondary winding is released to the secondary side of the transformer 3, and an output current indicated by a one-dot chain line arrow flows. During the period G, the output current gradually increases (see I in FIG. 4B).

  FIG. 6D shows a state in the period H shown in FIG. In the period H, since the switching element 21 is switched to the ON state, a current path including the flywheel diode of the switching element 24 is formed, and thus a current indicated by a broken-line arrow flows. As a result, the output current indicated by the one-dot chain line arrow gradually decreases (see I in FIG. 4B).

  As described above, the current signal I repeats rising and falling as shown in FIG. By shortening the period A and the period E, the increase of the current signal I in these periods is suppressed, and the output current is suppressed. Further, the period A and the period E are set to 1/4 of the periods B, D, F, and H (that is, the overlap width Tx is set to 1/5 of the pulse width Ton of each of the drive signals P1 to P4). The rise of the current signal I in A and the period E coincides with the rise of the current signal I in the period C and the period G, whereby the cycle of the current signal I is changed to the cycle of each drive signal P1 to P4. The period is 1/4. In this case, the fluctuation range of the current signal I is minimized.

  FIG. 7 shows an example of the waveform of the current signal I when the value of the ratio R is changed. 7A shows a case where R = 1/10 (10%), and FIG. 7B shows a case where R = 1/2 (50%). 7A and 7B, the upper four stages show the waveforms of the drive signals P1 to P4, and the fifth stage shows the waveform of the current signal I detected by the current sensor 7. FIG. As the ratio R becomes smaller than 1/5, the waveform of the current signal I shifts (see FIG. 7A), and the fluctuation width h of the current signal I increases. Further, as the ratio R becomes larger than 1/5, the waveform of the current signal I shifts (see FIG. 7B), and the fluctuation width h of the current signal I increases. Note that the waveform of the current signal I changes depending on the state of the load.

  When the ratio R is ½ (50%) or less, the way in which the waveform of the current signal I is broken is limited (see FIG. 7B), and the fluctuation range of the current signal I is not so large. Further, when the ratio R is “0”, output cannot be performed. Therefore, by setting the ratio R to a value less than 1/2 (50%) and greater than “0”, output can be performed while suppressing the fluctuation range of the current signal I. However, the ratio R is set to 1/5 (20%) so that the waveform of the current signal I does not collapse (the period of the current signal I is a quarter of the period of each of the drive signals P1 to P4). Is desirable.

  As shown in FIG. 2C, the overlap width ratio fixing control unit 56 includes an overlap width calculation unit 56a and a drive signal generation unit 56e.

  The overlap width calculator 56a calculates the overlap width Tx. The overlap width calculation unit 56a calculates an overlap width Tx based on the deviation ΔI input from the control switching unit 53 and the current signal I input from the current sensor 7, and outputs the overlap width Tx to the drive signal generation unit 56e. . As shown in FIG. 2C, the overlap width calculation unit 56a includes a PI control unit 56b, a gain calculation unit 56c, and a multiplication unit 56d.

  The PI control unit 56 b calculates a compensation value by PI control (proportional integration control) based on the deviation ΔI input from the control switching unit 53. The PI control unit 56b outputs the calculated compensation value to the multiplication unit 56d. Control other than PI control (for example, PID control) may be performed.

The gain calculation unit 56c calculates a gain G for multiplying the compensation value output from the PI control unit 56b. The gain calculation unit 56c calculates the gain G from the current signal I input from the current sensor 7 and the previously calculated overlap width Tx based on the following equation (1). The parameters b, c, d (0 <b, 0 <c, 0 <d) are set as appropriate. When the arc length becomes longer and the arc load (load L) becomes larger, the load current becomes smaller, so the current signal I becomes smaller. When the arc length becomes shorter and the arc load becomes smaller, the load current becomes larger, so the current signal I Will grow. That is, {(Tx−b) / I} in the following equation (1) changes according to the arc load, and the gain G changes linearly with respect to the arc load. Since 0 <c, the gain G increases as the arc load increases. Further, the gain G increases in accordance with the previous overlap width Tx. The gain calculation unit 56c outputs the calculated gain G to the multiplication unit 56d.
G = c · {(Tx−b) / I} + d (1)

  The multiplication unit 56d multiplies the compensation value input from the PI control unit 56b by the gain G input from the gain calculation unit 56c. The multiplication unit 56d outputs the calculation result to the drive signal generation unit 56e as the overlap width Tx.

  The drive signal generator 56e generates the drive signals P1 to P4. The drive signal generation unit 56e uses a value obtained by dividing a ratio R (for example, R = 1/5) from the overlap width Tx input from the multiplication unit 56d as a pulse width Ton (= Tx / R), and then outputs each of the drive signals P1 to P1. P4 is generated. In addition, the drive signal generation unit 56e causes the phase of the follow-up drive signal P2 (P4) so that the overlap width of the pulse of the preceding drive signal P1 (P3) and the pulse of the follow-up drive signal P2 (P4) becomes the overlap width Tx. Is delayed from the phase of the preceding drive signal P1 (P3). The phase difference is Ton−Tx = Tx / R−Tx = {(1−R) / R} · Tx. For example, when R = 1/5, the phase difference is 4 · Tx. The drive signal generation unit 56e outputs the generated drive signals P1 to P4 to the drive circuit 6.

  The overlap width ratio fixing control performed by the overlap width ratio fixing control unit 56 calculates the overlap width Tx according to the output current of the welding power source A1, and calculates the pulse width Ton from the overlap width Tx and the ratio R which is a fixed value. Thus, the output is controlled by the pulse width of the drive signal, which is a kind of pulse width control. However, the conventional pulse width control is different in that the phase of the following drive signal P2 (P4) is delayed from the phase of the preceding drive signal P1 (P3) and the ratio of the overlap width Tx of both pulses to the pulse width Ton is fixed. Different.

  Note that the configuration of the overlapping width ratio fixing control unit 56 is not limited to this, and any structure that generates the drive signals P1 to P4 for performing the overlapping width ratio fixing control may be used. For example, although the case where the pulse width of the preceding drive signal P1 (P3) and the pulse width of the follow-up drive signal P2 (P4) are the same has been described above, the present invention is not limited to this. Even if the pulse widths are different, the ratio R of the overlapping width Tx to either pulse width may be fixed. For example, assuming that the pulse width of the preceding drive signal P1 (P3) is the previous pulse width of the follow-up drive signal P2 (P4), the pulse width of the follow-up drive signal P2 (P4) is calculated from the overlap width Tx and the ratio R. You may do it. Alternatively, the pulse width of the follow-up drive signal P2 (P4) may be calculated from the overlap width Tx and the ratio R, with the pulse width of the preceding drive signal P1 (P3) being a fixed value.

  Moreover, although the above demonstrated the case where the period T of each drive signal P1-P4 was fixed, it is not restricted to this. For example, the period T may be changed by fixing the off period of each of the drive signals P1 to P4 and changing the pulse width Ton according to the calculated overlap width Tx. In the above description, the case where the overlap width Tx is calculated and determined and the pulse width Ton (= Tx / R) is calculated based on the calculated overlap width Tx has been described. However, the present invention is not limited thereto. Absent. First, the pulse width Ton may be calculated and determined, and the overlap width Tx (= Ton · R)) may be calculated based on the calculated pulse width Ton.

  Note that the control circuit 5 may perform analog processing or digital processing. When digital processing is performed, the control circuit 5 may be realized by a microcomputer or the like, and the current signal input from the current sensor 7 may be converted into a digital signal by an analog / digital conversion circuit and input.

  The drive circuit 6 amplifies the drive signals P1 to P4 input from the control circuit 5 to a level that can drive the switching elements 21 to 24, and outputs the amplified signals. The configuration of the drive circuit 6 is not limited, and may be a pulse transformer system or a photocoupler system.

  Next, the effect of this embodiment is demonstrated.

  According to this embodiment, the control circuit 5 can switch control according to the output. That is, the control circuit 5 performs PWM control by causing the output destination of the control switching unit 53 to be the PWM control unit 54 at the time of high output, and the output destination of the control switching unit 53 to be the PSM control unit 55 at the time of medium output. Thus, phase shift control is performed, and at the time of low output, the output destination of the control switching unit 53 is the overlap width ratio fixed control section 56 to perform overlap width ratio fixed control. Thereby, suitable control according to an output can be performed.

  Further, according to the present embodiment, the overlapping width ratio fixing control unit 56 sets the ratio of the overlapping width Tx of the pulse of the preceding drive signal P1 (P3) and the pulse of the follow driving signal P2 (P4) to the pulse width Ton. A predetermined ratio R is fixed. By appropriately setting the ratio R, the fluctuation range of the output current of the welding power source device A1 can be reduced. As a result, it is possible to suppress the occurrence of arc interruption due to the minimum value of the output current becoming too small at the time of low output. In the present embodiment, since the ratio R is set to 1/5 (20%), the period of the current signal I is a quarter of the period of each of the drive signals P1 to P4 (FIG. 4). (See (b)). Therefore, the time required for the current signal I to rise and fall is the shortest, and the fluctuation range of the current signal I is the smallest. Thereby, the fluctuation range of the output current of welding power supply device A1 can be reduced most.

  FIG. 8 illustrates an output current waveform of the welding power source apparatus A100 when the overlap width ratio fixed control simulation is performed and the output current is approximately the same as the simulation in FIG. 12 (average value 250 [mA]). FIG.

In FIG. 8, the upper four stages show the waveforms of the drive signals P1 to P4 input to the switching elements 21 to 24 of the inverter circuit 2, respectively. The fifth stage shows the waveform of the current signal I detected by the current sensor 7, the sixth stage shows the waveform of the output voltage V of the welding power source device A1, and the seventh stage shows the transformer. 3 shows the waveform of the voltage V _TP of the secondary side winding _No. 3. In the simulation, the ratio of the overlap width Tx of the pulse of the preceding drive signal P1 (P3) and the pulse of the follow drive signal P2 (P4) to the follow drive signal P2 (P4) pulse width Ton is a predetermined ratio R (30 %).

  In the simulation of FIG. 12, the fluctuation range h of the output current I was 0 to 560 [mA], whereas in the simulation of FIG. 8, the fluctuation range h of the output current I was 60 to 500 [mA]. It was. The fluctuation range of the output current I could be reduced to about 80%. Moreover, since the minimum value of the output current I is 60 [mA], it is possible to suppress the occurrence of arc break due to insufficient current flowing through the arc.

  Further, according to the present embodiment, the overlap width ratio fixing control unit 56 calculates the overlap width Tx by the overlap width calculation unit 56a based on the current signal I, and divides the overlap width Tx by the ratio R to thereby calculate the pulse width. Ton is calculated. Therefore, by adjusting the pulse width Ton, the ratio R of the overlap width Tx to the pulse width Ton can be set to a fixed value while feedback controlling the output current.

  According to the present embodiment, the overlap width calculation unit 56a calculates the gain G from the current signal I and the overlap width Tx calculated last time, and multiplies the compensation value calculated by the PI control unit 56b by the gain G to overlap. The width Tx is calculated. Since the gain G changes linearly with respect to the arc load, the overlap width Tx can be changed according to the arc load, and the pulse width Ton can be changed. Therefore, when the arc load at the time of a short circuit or the like suddenly decreases, it is possible to suppress a large current from flowing by reducing the pulse width Ton.

  Next, a modified example of the overlapping width ratio fixing control unit 56 will be described below.

  FIG. 9A is a diagram for explaining an overlapping width ratio fixing control unit 56 ′ that is a first modification of the overlapping width ratio fixing control unit 56. In FIG. 9A, the same or similar elements as those in the overlap width ratio fixing control unit 56 (see FIG. 2C) are denoted by the same reference numerals. The overlap width ratio fixed control unit 56 ′ first generates a PWM signal by a general pulse width control method, and changes the follow-up drive signal P2 (P4) by a predetermined phase difference from the preceding drive signal P1 (P3). The output is delayed.

  The overlap width ratio fixed control unit 56 ′ shown in FIG. 9A includes a PI control unit 56 b and a drive signal generation unit 56 e ′. The PI control unit 56b is the same as the PI control unit 56b shown in FIG.

  The drive signal generator 56 e ′ generates the drive signals P <b> 1 to P <b> 4 and outputs them to the drive circuit 6. The drive signal generation unit 56e 'generates a PWM signal by comparing the compensation value signal input from the PI control unit 56b with a carrier signal such as a triangular wave generated internally. Then, the drive signal generation unit 56e 'outputs the generated PWM signal as the preceding drive signal P1 (P3), delays the phase of the generated PWM signal, and outputs it as the follow-up drive signal P2 (P4). The phase difference is Ton−Tx = Ton−Ton · R = Ton · (1−R). For example, when R = 1/5, the phase difference is (4/5) · Ton. Since the output is reduced by shifting the phase between the preceding drive signal P1 (P3) and the follow drive signal P2 (P4), it is not necessary to make the pulse width of the PWM signal too small.

  According to the first modification, the overlapping width ratio fixed control unit 56 ′ delays the phase of the follow-up drive signal P2 (P4) from the phase of the preceding drive signal P1 (P3), and the pulse of the preceding drive signal P1 (P3). The ratio of the overlap width Tx with the pulse of the follow-up drive signal P2 (P4) to the pulse width Ton is fixed to a predetermined ratio R. Therefore, also in the 1st modification, there can exist the same effect as a 1st embodiment. Further, according to the first modification, it is possible to obtain an effect that the calculation of the overlap width Tx becomes easy.

  FIG. 9B is a diagram for explaining an overlap width ratio fixing control unit 56 ″ which is a second modification of the overlap width ratio fixing control unit 56. In FIG. 9B, the overlap width ratio is illustrated. The same or similar elements as those of the fixed control unit 56 (see FIG. 2C) are denoted by the same reference numerals. The overlapping width ratio fixed control unit 56 ″ determines the pulse widths of the drive signals P1 to P4. The output current is not controlled by adjusting, but the output current is controlled by adjusting the DC voltage input to the inverter circuit 2.

  The overlap width ratio fixing control unit 56 ″ shown in FIG. 9B includes a PI control unit 56b and a drive signal generation unit 56e ″. Further, the DC power source 1 (see FIG. 1) of the welding power source apparatus A1 is a DC power source 1 'that can change the output voltage. The PI control unit 56b is the same as the PI control unit 56b shown in FIG. 2C, but outputs the calculated compensation value to the DC power supply 1 '.

  The drive signal generation unit 56e ″ generates the drive signals P1 to P4 and outputs them to the drive circuit 6. The drive signal generation unit 56e ″ has each drive signal having a predetermined pulse width Ton and a predetermined frequency. P1 to P4 are generated. Further, the drive signal generation unit 56e ″ is configured so that the overlap width of the pulse of the preceding drive signal P1 (P3) and the pulse of the follow drive signal P2 (P4) becomes a predetermined overlap width Tx (= Ton · R). The follow-up drive signal P2 (P4) is generated by delaying the phase of the preceding drive signal P1 (P3), and the phase difference is Ton−Tx = Ton−Ton · R = Ton · (1−R).

  The DC power supply 1 'is a DC power supply that can change the output voltage, and changes the output voltage according to the compensation value input from the PI control unit 56b. That is, the control circuit 5 performs so-called amplitude control.

  According to the second modification, the overlapping width ratio fixed control unit 56 ″ delays the phase of the follow-up drive signal P2 (P4) from the phase of the preceding drive signal P1 (P3), and the pulse of the preceding drive signal P1 (P3) The ratio of the overlap width Tx with the pulse of the tracking drive signal P2 (P4) to the pulse width Ton is fixed to a predetermined ratio R. Therefore, also in the second modified example, the same effect as in the first embodiment is obtained. In addition, since amplitude control is performed, the pulse width Ton of each drive signal P1 to P4 can be fixed, and the output current is controlled by adjusting the frequency of each drive signal P1 to P4. You may make it perform frequency control.

  In 1st Embodiment, although the case where three controls were switched according to the output was demonstrated, it is not restricted to this. For example, phase shift control may be performed during high output and medium output, and overlap width ratio fixed control may be performed during low output. Such a case will be described below as a second embodiment.

  FIG. 10 is a view for explaining a welding power source device A2 according to the second embodiment. In FIG. 10, the same or similar elements as those of the welding power source device A <b> 1 (see FIG. 1) according to the first embodiment are denoted by the same reference numerals. The welding power supply device A2 is different from the welding power supply device A1 according to the first embodiment in that the welding power supply device A2 does not include the PWM control unit 54.

The control switching unit 53 outputs the deviation ΔI input from the subtraction unit 52 to the PSM control unit 55 or the overlap width ratio fixed control unit 56 in accordance with the target value I ^* input from the output current setting unit 51. The control switching unit 53 outputs the deviation ΔI to the PSM control unit 55 when the target value I ^* is in a preset high output range (at the time of high output) and in the case of an intermediate output range (at the time of medium output). Further, when the target value I ^* is a preset low output range (at the time of low output), the deviation ΔI is output to the overlapping width ratio fixed control unit 56. While the deviation ΔI is input, the PSM control unit 55 and the overlap width ratio fixing control unit 56 generate drive signals P1 to P4 based on the deviation ΔI and output them to the drive circuit 6.

  According to the second embodiment, the control circuit 5 performs the phase shift control by setting the output destination of the control switching unit 53 to be the PSM control unit 55 at the time of high output and medium output, and controls the control switching unit 53 at the time of low output. The output destination is the overlap width ratio fixing control unit 56, so that overlap width ratio fixing control is performed. Thereby, suitable control according to an output can be performed. Also in the second embodiment, since the overlapping width ratio fixing control unit 56 performs the overlapping width ratio fixing control, the fluctuation range of the output current of the welding power source device A1 can be reduced. As a result, it is possible to suppress the occurrence of arc interruption due to the minimum value of the output current becoming too small at the time of low output.

  In the said 1st and 2nd embodiment, although the case where the power supply device which concerns on this invention was used as a welding power supply device was demonstrated, it is not restricted to this. The present invention can also be applied to other power supply apparatuses. The present invention is effective in stabilizing the output current by reducing the fluctuation range of the output current, and more effective in stabilizing the output particularly in a power supply device that needs to be controlled to a low output. It is.

  The inverter control circuit and the power supply device according to the present invention are not limited to the above-described embodiments. The specific configuration of each part of the inverter control circuit and the power supply device according to the present invention can be varied in design in various ways.

A1, A2 Welding power supply device 1, 1 'DC power source 2 Inverter circuit 21, 22, 23, 24 Switching element 3 Transformer 31 Primary winding 32 Secondary winding 4 Rectifier circuit 41, 42 Rectifier diode 43 DC reactor 5 Control Circuit 51 Output Current Setting Unit 52 Subtraction Unit 53 Control Switching Unit 54 PWM Control Unit (Third Control Unit)
54a PI control unit 54b Drive signal generation unit 55 PSM control unit (first control means)
55a PI controller 55b Drive signal generator 56, 56 ', 56 "Overlap width ratio fixed controller (second control means)
56a Overlap width calculator 56b PI controller 56c Gain calculator 56d Multiplier 56e, 56e ', 56e "Drive signal generator 6 Drive circuit 7 Current sensor L Load

Claims (13)

A control circuit that generates and outputs a preceding drive signal input to a switching element disposed in one arm of the inverter circuit and a follow-up drive signal input to a switching element disposed in the other arm;
A first control for controlling the output current by changing the phase difference between the phase of the preceding driving signal and the phase of the following driving signal by outputting the phase of the following driving signal after being delayed from the phase of the preceding driving signal. Means,
Second control means for outputting the preceding drive signal pulse and the following drive signal pulse so as to overlap each other by a predetermined ratio of a pulse width of the preceding drive signal or the follow drive signal;
Control switching means for switching between control by the first control means and control by the second control means;
A control circuit comprising: Third control means for outputting the phase of the following drive signal and the phase of the preceding drive signal so as to coincide with each other, and controlling the output current by changing the pulse width of the preceding drive signal and the following drive signal. Prepared,
The control switching means switches between control by the first control means, control by the second control means, and control by the third control means;
The control circuit according to claim 1. The control switching means switches control based on a target value of the output current of the inverter circuit;
The control circuit according to claim 1 or 2. The control switching means switches control based on the output current of the inverter circuit.
The control circuit according to claim 1 or 2. The control switching means switches control based on a pulse width of the preceding drive signal or the follow-up drive signal, or a phase difference between the phase of the preceding drive signal and the phase of the follow-up drive signal;
The control circuit according to claim 1 or 2. The predetermined ratio is greater than 0 and less than 1/2.
The control circuit according to claim 1. The predetermined ratio is 1/5.
The control circuit according to claim 6. The second control means includes
Based on the output current of the inverter circuit, an overlap width calculating means for calculating an overlap width that is a length of a portion where the pulse of the preceding drive signal and the pulse of the follow drive signal overlap;
Drive signal generation means for generating the drive signal, with the time obtained by dividing the overlap width by the predetermined ratio as the pulse width of the preceding drive signal and the follow-up drive signal;
With
The control circuit according to claim 1. The overlap width calculating means includes
Calculate the gain from the current signal that has detected the current after rectifying by transforming the output of the inverter circuit, and the previously calculated overlap width,
The overlap value is calculated by multiplying the compensation value calculated from the deviation between the current signal and the target value by the gain.
The control circuit according to claim 8. The second control means includes
Based on the output current of the inverter circuit, adjust the pulse width of the preceding drive signal and the follow drive signal,
The control circuit according to claim 1. The second control means includes
Based on the output current of the inverter circuit, the DC voltage input to the inverter circuit is adjusted.
The control circuit according to claim 1. A control circuit according to any one of claims 1 to 11,
The inverter circuit;
A power supply device comprising: Supplying power to the welding torch in the welding system,
The power supply device according to claim 12.