JP6377449B2 - Wafer division method - Google Patents

Description

  The present invention relates to a method for dividing a wafer in which an insulating film such as a low-k film (low dielectric constant insulating film) is laminated.

  In recent years, with the miniaturization of semiconductor devices, wafers with an insulating film such as a low-k film have been put into practical use. This Low-k film is very fragile, and there is a problem that film peeling tends to occur in mechanical dicing using a cutting blade. Further, a metal wire called a TEG (Test Element Group) for testing a chip circuit is formed on the wafer. In order to divide the wafer, it is necessary to break the TEG, but a cutting blade is suitable for breaking the TEG. For this reason, a method of dividing a wafer by combining ablation processing and mechanical dicing has been proposed (see, for example, Patent Document 1).

  In the wafer dividing method described in Patent Document 1, a laser beam is irradiated along a planned dividing line of the wafer, and only the Low-k film is ablated from the surface of the wafer. Subsequently, the portion from which the Low-k film has been removed is cut by a cutting blade, and the wafer is divided into individual chips along the division line. Since the low-k film is not cut by the cutting blade, peeling of the low-k film is prevented. Further, since the TEG is broken by the cutting blade, the wafer can be divided in a short time.

JP2013-105821A

  However, in the wafer dividing method described in Patent Document 1, since the wafer is divided by the cutting blade, irregularities that are finely carved remain on the side surfaces of the chips after the division. For this reason, cracks are likely to be generated from the unevenness on the side surface of the chip, and the bending strength of the chip may be reduced. Furthermore, since the Low-k film is removed from the surface of the wafer by irradiation with a laser beam, thermal damage due to ablation processing remains in the chip, causing a reduction in the bending strength of the chip. Thus, although the wafer with the Low-k film can be divided, there is a problem that the bending strength of the chip after the division is lowered.

  The present invention has been made in view of the above points, and provides a wafer dividing method capable of appropriately dividing a wafer on which an insulating film is formed without reducing the bending strength of the chip after division. For the purpose.

The method for dividing a wafer according to the present invention comprises: an insulating film formed on a surface; a division line that divides a device; and a measurement pattern that is disposed in the insulating film on the division line and that measures the device. A wafer dividing method for dividing a wafer having a predetermined dividing line along a predetermined dividing line, the mask forming step for masking the device of the wafer except the dividing predetermined line, and the predetermined dividing line not masked in the mask forming step. an insulation film removing step of removing the insulating film by dry etching, thereby cut a cutting blade of a thin width than the predetermined width of the dividing line on the surface of al plants constant depth of the wafer, the cutting a cutting groove forming step of forming a cutting groove the insulating film without contacting the blade to the mask to remove the measurement pattern of the dividing lines are removed,該切Kezumizo formed Engineering The cutting groove formed in (1) is dry-etched in the thickness direction of the wafer to divide along the planned dividing line, and a mask removing step to remove the mask formed in the mask forming step. .

Another method of dividing the wafer according to the present invention includes an insulating film formed on a surface, a division planned line for partitioning a device, a measurement pattern disposed in the insulating film of the planned division line and measuring the device, , A wafer dividing method for dividing the wafer along the planned division line, a mask forming step for masking the device of the wafer except the planned division line, and the division not masked in the mask forming step an insulating film removing step of removing the insulating film of the scheduled line by dry etching, thereby cut a cutting blade of a thin width than the predetermined width of the dividing line on the surface or al plants constant depth of the wafer, a cutting groove forming step of forming a cutting groove the insulating film is removed the measurement pattern of the dividing lines is removed without contacting the said cutting blade in a mask,該切Kezumizo type The deep groove forming step of forming the deep groove along the planned dividing line by dry-etching the cut groove formed in the process from the surface of the wafer to the depth reaching the finished thickness in the thickness direction of the wafer, and finishing the wafer from the back surface A back surface grinding step of grinding the wafer to divide the wafer and a mask removing step of removing the mask formed in the mask forming step.

  According to these configurations, the planned dividing line exposed from the mask is dry-etched, and the insulating film is removed along the planned dividing line from the surface of the wafer. For this reason, the insulating film does not peel off and the wafer is not damaged by heat. The measurement pattern is exposed by removing the insulating film, but the measurement pattern is divided along the planned division line by the cutting blade to form a cutting groove. Furthermore, the side surface of the chip | tip after a division | segmentation is formed by dry-etching a cutting groove. For this reason, the side surface of each chip becomes smooth, and the unevenness that becomes the starting point of the crack is not formed. In this way, the wafer can be divided into individual chips without reducing the bending strength of the divided chips. Further, since the wafer is divided by dry etching, the processing time does not change greatly even when the number of lines to be divided increases as the chip size is reduced.

  According to the present invention, the insulating film is removed by dry etching, the measurement pattern in the insulating film is divided by a cutting blade, and the wafer is divided again by dry etching. The wafer on which the insulating film is formed can be appropriately divided without lowering.

It is a cross-sectional schematic diagram of the wafer which concerns on this Embodiment. It is a figure which shows an example of the mask formation process which concerns on 1st Embodiment. It is a figure which shows an example of the tape sticking process which concerns on 1st Embodiment. It is a figure which shows an example of the insulating film removal process which concerns on 1st Embodiment. It is a figure which shows an example of the cutting groove formation process which concerns on 1st Embodiment. It is a figure which shows an example of the division | segmentation process which concerns on 1st Embodiment. It is a figure which shows an example of the mask removal process which concerns on 1st Embodiment. It is a figure which shows an example of the mask formation process which concerns on 2nd Embodiment. It is a figure which shows an example of the insulating film removal process which concerns on 2nd Embodiment. It is a figure which shows an example of the cutting groove formation process which concerns on 2nd Embodiment. It is a figure which shows an example of the deep groove formation process which concerns on 2nd Embodiment. It is a figure which shows an example of the mask removal process which concerns on 2nd Embodiment. It is a figure which shows an example of the tape sticking process which concerns on 2nd Embodiment. It is a figure which shows an example of the back surface grinding process which concerns on 2nd Embodiment.

  A wafer dividing method according to the present embodiment will be described with reference to the accompanying drawings. A wafer to be processed will be described with reference to FIG. FIG. 1 is a schematic cross-sectional view of a wafer according to the present embodiment.

  As shown in FIG. 1, a wafer W is formed by applying a device D composed of a low-k film 11 (low dielectric constant insulating film) such as an inorganic film or an organic film and a wiring layer 13 to the surface of a semiconductor substrate 12 made of silicon. It is formed and configured. The device D is partitioned by a plurality of division lines 15 arranged in a lattice pattern on the surface 16 of the wafer W. Each division planned line 15 has a predetermined width, and in the Low-k film 11 in which each division planned line 15 is arranged, a TEG 14 (Test Element Group) is embedded. The semiconductor substrate 12 may be made of gallium arsenide.

  In such a wafer W, the Low-k film 11 is very fragile, and the Low-k film 11 is likely to be peeled off by cutting using a cutting blade. On the other hand, in the ablation processing with a laser beam, thermal damage remains on the divided chips. For this reason, in the method for dividing the wafer W according to the present embodiment, the Low-k film 11 is removed from the division-scheduled line 15 by dry etching to suppress film peeling and thermal damage to the wafer W. However, in the dry etching, although the Low-k film 11 can be removed appropriately, it takes a long time to remove the TEG 14 from the planned division line 15 by dry etching because the TEG 14 is formed of a metal line.

  Therefore, in the wafer W dividing method according to the first embodiment, the wafer W is divided by combining dry etching and blade dicing. That is, after the low-k film 11 is satisfactorily removed by dry etching along the planned dividing line 15, the TEG 14 exposed from the low-k film 11 is blade-diced so as to divide the TEG 14 in a short time. Then, the wafer W is divided into individual chips by dry etching again along the planned division lines 15 so that fine irregularities that may become crack starting points do not remain on the side surfaces of the divided chips.

  Hereinafter, a wafer dividing method according to the first embodiment will be described with reference to the accompanying drawings. The wafer dividing method according to the first embodiment is a method of dividing a wafer that has already been thinned. FIG. 2 is a diagram illustrating an example of a mask forming process according to the first embodiment. Drawing 3 is a figure showing an example of the tape sticking process concerning a 1st embodiment. FIG. 4 is a diagram illustrating an example of the insulating film removing process according to the first embodiment. FIG. 5 is a diagram illustrating an example of a cutting groove forming process according to the first embodiment. FIG. 6 is a diagram illustrating an example of a dividing process according to the first embodiment. FIG. 7 is a diagram illustrating an example of a mask removing process according to the first embodiment.

  As shown in FIG. 2, a mask formation process is first implemented. As shown in FIG. 2A, in the mask forming step, a resist resin having a strong plasma resistance is applied to the entire surface of the wafer W by a spin coating method or the like, and a resist layer 21 is formed so as to cover the surface 16 of the wafer W. Then, the resist layer 21 is exposed through a photomask on which a pattern corresponding to the planned division line 15 is drawn, and the pattern is transferred to the resist layer 21 along the planned division line 15. By immersing the exposed wafer W in the developer, only the exposed portion of the resist layer 21 is dissolved and the surface of the wafer W is exposed.

  As shown in FIG. 2B, the resist layer 21 remains on the device D on the surface 16 of the wafer W, and the resist layer 21 on the planned dividing line 15 is removed to expose the Low-k film 11 upward. In this way, a mask exposing the Low-k film 11 is formed along the planned division line 15 so that only the planned division line 15 is etched during plasma etching. At this time, in the Low-k film 11 exposed from the resist layer 21, the TEG 14 that is divided in the subsequent cutting groove forming step is disposed. The wafer W on which the mask is formed is carried into a tape mounter (not shown).

  As shown in FIG. 3, a tape sticking process is implemented after a mask formation process. In the tape attaching step, the tape T is attached to the back surface 17 of the wafer W by the attaching roller 31 of the tape mounter. Note that, in the tape attaching step, the wafer W may be attached to the tape T stretched on a ring frame (not shown) so that conveyance after the division becomes easy. Further, as the tape T, a material having a strong plasma resistance is used. Moreover, a tape sticking process may be implemented manually by an operator. The wafer W to which the tape T is adhered is carried into an etching apparatus (not shown).

  As shown in FIG. 4, an insulating film removal process is implemented after a tape sticking process. In the insulating film removing step, the wafer W is held on the chuck table of the etching apparatus via the tape T. Etching gas is sprayed toward the surface 16 of the wafer W, and the etching gas is turned into plasma, whereby the surface 16 of the wafer W is dry-etched. Since the mask 16 is formed on the surface 16 of the wafer W by the resist layer 21, only the planned division line 15 that is not masked by the resist layer 21 is dry-etched in the thickness direction of the wafer W, and the low division line 15 is low. The -k film 11 is removed.

  In this case, since the low-k film 11 is etched by anisotropic plasma etching, the etching proceeds perpendicularly to the wafer W at the division line 15. Since the side surface of the Low-k film 11 is formed substantially vertically, the device D side covered with the resist layer 21 is not cut. Further, unlike the case where the Low-k film 11 is removed by a cutting blade or a laser beam, the Low-k film 11 is not peeled off by the cutting blade, and the wafer W is not thermally damaged by ablation. . Therefore, only the Low-k film 11 is appropriately removed from the surface 16 of the wafer W along the division line 15.

In the insulating film removal step, for example, anisotropic plasma etching of the low-k film 11 is performed under the following processing conditions. The power applied to the coil is the power to create and maintain plasma, the power applied to the stage (chuck table) is the power to draw ions, the gas type is ions, the gas decomposed into radicals, and the process pressure is the set pressure during etching. ing.
<Low-k etching recipe 1>
・ High frequency power frequency: 13.56 MHz
・ Stage temperature (electrostatic chuck temperature): 10 ℃
・ He pressure for wafer cooling: 2000Pa
-Coil applied power: 2500W
・ Stage applied power: 400W
Gas type: CF4, C4F8, O2, Ar mixed gasGas flow rate: CF4 = 200 sccm, C4F8 = 50 sccm, O2 = 50 sccm, Ar = 200 sccm
・ Process pressure: 5Pa
In the insulating film removing step, only the Low-k film 11 is etched, so that the TEG 14 in the Low-k film 11 is exposed to the outside. The wafer W after the removal of the Low-k film 11 is carried into a cutting device (not shown).

Further, depending on the design of the TEG 14, there may be a case where the opening size of the low-k film 11 is small and the aspect ratio is high. In this case, it is desirable to have a condition in which the anisotropy of etching is increased by increasing the mean free path by decreasing the process pressure and increasing the ion attraction by increasing the stage applied power.
<Low-k etching recipe 2>
・ High frequency power frequency: 13.56 MHz
・ Stage temperature (electrostatic chuck temperature): 10 ℃
・ He pressure for wafer cooling: 2000Pa
-Coil applied power: 2500W
・ Stage applied power: 600W
Gas type: CF4, C4F8, O2, Ar mixed gasGas flow rate: CF4 = 200 sccm, C4F8 = 50 sccm, O2 = 50 sccm, Ar = 200 sccm
・ Process pressure: 1Pa
・ Processing time: Arbitrary (adjusted according to Low-k film thickness and aspect ratio)

Further, depending on the wafer W, a polyimide film may be formed on the top surfaces of the TEG 14 and the Low-k film 11. In this case, the low-k etching can be performed after the polyimide etching step using O2 as a gas species.
<Example of polyimide etching recipe>
・ High frequency power frequency: 13.56 MHz
・ Stage temperature (electrostatic chuck temperature): 10 ℃
・ He pressure for wafer cooling: 2000Pa
-Coil applied power: 3000W
・ Stage applied power: 400W
Gas type: CF4, O2, Ar, N2 mixed gasGas flow rate: CF4 = 40 sccm, O2 = 200 sccm, N2 = 100 sccm, Ar = 100 sccm
・ Process pressure: 5Pa
・ Processing time: Arbitrary (adjusted according to polyimide film thickness)

  As shown in FIG. 5, a cutting groove forming step is performed after the insulating film removing step. In the cutting groove forming step, the wafer W is held on the chuck table of the cutting device via the tape T, and the wafer W is moved below the cutting blade 32. Then, the cutting blade 32 is aligned with the division schedule line 15 of the wafer W, and the wafer W is cut by the cutting blade 32 to a predetermined depth reaching the upper surface of the semiconductor substrate 12 from the surface 16 of the wafer W. As a result, the TEG 14 is divided by the cutting blade 32 in the planned division line 15 from which the Low-k film 11 has been removed, and the cutting groove 22 along the planned division line 15 is formed on the surface 16 of the wafer W.

  In this case, the width dimension of the cutting blade 32 is formed to be thinner than the predetermined width of the division line 15. For this reason, the side surface of the cutting blade 32 does not hit the side surface of the Low-k film 11 on the resist layer 21 side, and the Low-k film 11 does not peel off. Further, since the metal TEG 14 is divided by the cutting blade 32, the TEG 14 can be removed from the scheduled division line 15 (the cutting groove 22) in a short time. In the cutting groove forming step, it is only necessary to cut to a depth at which the TEG 14 is removed. For example, the upper surface of the semiconductor substrate 12 may be slightly cut. The wafer W after the formation of the cutting groove 22 is again carried into an etching apparatus (not shown).

  As shown in FIG. 6, a dividing step is performed after the cutting groove forming step. In the dividing step, the wafer W is held on the chuck table of the etching apparatus via the tape T. Etching gas is sprayed toward the surface 16 of the wafer W, and the etching gas is turned into plasma, whereby the surface 16 of the wafer W is dry-etched. Since the surface of the device D is masked by the resist layer 21, only the cutting groove 22 (see FIG. 5) that is not masked by the resist layer 21 is dry-etched in the thickness direction of the wafer W, and along the scheduled dividing line 15. Thus, the wafer W is divided into individual chips C.

  In this case, since the semiconductor substrate 12 is subjected to anisotropic plasma etching, the etching progresses perpendicularly to the surface 16 of the wafer W in the cutting groove 22. Since the side surface 23 of the divided chip C is formed substantially vertically, the semiconductor substrate 12 side covered with the resist layer 21 is not scraped. In addition, unlike the case where the wafer W is divided by the cutting blade 32 (see FIG. 5), the side surface 23 of the chip C is not formed with unevenness that causes cracks, and the side surface 23 of the chip C is smooth. It is finished to suppress the decrease in bending strength. In this way, the semiconductor substrate 12 is removed along the cutting grooves 22 of the wafer W, and the wafer W is divided into individual chips C having a good side shape.

In the dividing step, for example, anisotropic plasma etching of the semiconductor substrate 12 is performed under the following processing conditions. In the dividing step, plasma etching is performed by repeating a cycle of an etching step and a protective film deposition step. Note that the number of cycles is set according to the processing depth, and is repeated, for example, 50 cycles, with an etching step of 5 seconds and a protective film deposition step of 3 seconds as one cycle. The power applied to the coil is the power to create and maintain the plasma, the power applied to the stage (chuck table) is the power to draw ions, the gas type is ions, the gas decomposed into radicals, and the process pressure is the set pressure during etching. ing. Further, C4F8, which is a gas species in the protective film deposition step, is decomposed into ions and radicals, and a fluorocarbon film (CxFy) is deposited on the processed groove surface.
(Etching step)
-Coil applied power: 2500W
・ Stage applied power: 150W
・ Gas type: SF6
・ Gas flow rate: 400sccm
・ Process pressure: 25Pa
-Step time: 5 seconds (protective film deposition step)
-Coil applied power: 2500W
・ Stage applied power: 50W
・ Gas type: C4F8
・ Gas flow rate: 400sccm
・ Process pressure: 25Pa
・ Step time: 3 seconds

  As shown in FIG. 7, a mask removing process is performed after the dividing process. In the mask removal process, the resist layer 21 (see FIG. 6) is peeled off from the divided chip C with a chemical solution or the like, and the mask formed in the mask formation process is removed. Note that the mask removing step is not limited as long as the resist layer 21 can be removed from the chip C. A peeling tape (not shown) is attached to the resist layer 21 of the chip C, and the resist layer 21 is peeled off by the peeling tape. Alternatively, the resist layer 21 may be dissolved and removed with a chemical solution.

  As described above, according to the method for dividing the wafer W according to the first embodiment, the planned division line 15 exposed from the mask is dry-etched, and is low from the surface 16 of the wafer W along the planned division line 15. The -k film 11 is removed. For this reason, film peeling of the Low-k film 11 does not occur, and the wafer W is not damaged by heat. The TEG 14 is exposed by the removal of the Low-k film 11, but the TEG 14 is divided along the scheduled division line 15 by the cutting blade 32 to form the cutting groove 22. Furthermore, since the side surfaces 23 of the individual chips C are formed by dry etching, the side surfaces 23 of the individual chips C are not made uneven so as to be the starting point of cracks. In this way, the wafer W can be divided into individual chips C without reducing the bending strength of the divided chips C. Furthermore, since the wafer W is divided by dry etching, the processing time does not change greatly even when the number of division lines 15 increases as the chip size is reduced.

  In the first embodiment, the example in which the method for dividing the wafer W is applied to DAG (Dicing After Grinding) in which the grinding process is performed before the cutting process has been described. As described above, the wafer W dividing method may be applied to DBG (Dicing Before Grinding) in which grinding is performed after cutting.

  Hereinafter, a wafer dividing method according to the second embodiment will be described. The wafer dividing method according to the second embodiment is different from the first embodiment in that the wafer before being thinned is divided. Note that the same steps as those in the first embodiment will be described as simplified as possible.

  FIG. 8 is a diagram illustrating an example of a mask forming process according to the second embodiment. FIG. 9 is a diagram illustrating an example of the insulating film removing process according to the second embodiment. FIG. 10 is a diagram illustrating an example of a cutting groove forming process according to the second embodiment. FIG. 11 is a diagram illustrating an example of a deep groove forming process according to the second embodiment. FIG. 12 is a diagram illustrating an example of a mask removing process according to the second embodiment. FIG. 13 is a diagram illustrating an example of a tape attaching process according to the second embodiment. FIG. 14 is a diagram illustrating an example of a back surface grinding process according to the second embodiment.

  As shown in FIG. 8, a mask formation process is first performed. In the mask formation step, as in the first embodiment, a resist resin is applied to the surface 16 of the wafer W, and the resist resin is altered along the division lines 15 by exposure through a photomask. The exposed part is dissolved. As a result, the resist layer 21 is removed from the division lines 15 while leaving the resist layer 21 only on the device D on the surface 16 of the wafer W.

  As shown in FIG. 9, an insulating film removing step is performed after the mask forming step. In the insulating film removal step, only the Low-k film 11 is removed from the surface 16 of the wafer W along the planned dividing line 15 by anisotropic plasma etching, as in the first embodiment. For this reason, also in the second embodiment, the low-k film 11 does not peel off, and thermal damage does not remain on the wafer W. Further, since only the low-k film 11 is etched in the division line 15, the TEG 14 in the low-k film 11 is exposed to the outside.

  As shown in FIG. 10, a cutting groove forming step is performed after the insulating film removing step. In the cutting groove forming step, similarly to the first embodiment, the wafer W is cut to a predetermined depth reaching the upper surface of the semiconductor substrate 12 by the cutting blade 32 and the TEG 14 is divided. As a result, a cutting groove 22 along the planned division line 15 is formed on the surface 16 of the wafer W in the planned division line 15.

  As shown in FIG. 11, the deep groove forming step is performed after the cutting groove forming step. In the deep groove forming step, the wafer W is held on the chuck table of the etching apparatus. Etching gas is sprayed toward the surface 16 of the wafer W, and the etching gas is turned into plasma, whereby the surface 16 of the wafer W is dry-etched. Since the mask 16 is formed on the surface 16 of the wafer W by the resist layer 21, only the cutting groove 22 (see FIG. 10) that is not masked by the resist layer 21 is dry-etched in the thickness direction of the wafer W. At this time, etching is performed to a position deeper than the finishing thickness L of the wafer W in the back surface grinding step in the subsequent stage, and the deep groove 25 is formed along the planned division line 15.

  Further, since the semiconductor substrate 12 is subjected to anisotropic plasma etching, the etching progresses perpendicularly to the wafer W in the cutting groove 22 (see FIG. 10). Since the side surface 23 of the deep groove 25 is formed substantially vertically, the semiconductor substrate 12 side covered with the resist layer 21 is not scraped. Unlike the case where the wafer W is divided by the cutting blade 32, fine irregularities are not formed on the side surface 23 of the deep groove 25. Thus, the semiconductor substrate 12 is removed along the cutting grooves 22 of the wafer W, and the deep grooves 25 are formed in the wafer W. In the deep groove forming step according to the second embodiment, for example, the Bosch method is used, and the processing is performed under substantially the same processing conditions as the dividing step according to the first embodiment.

  As shown in FIG. 12, a mask removing process is performed after the deep groove forming process. In the mask removal step, the resist layer 21 (see FIG. 11) is peeled off from the surface 16 of the wafer W by a chemical solution or the like, as in the first embodiment, and the mask formed in the mask formation step is removed. Note that the mask removing process is not limited as long as the resist layer 21 can be removed from the surface 16 of the wafer W, and a peeling tape (not shown) is attached to the resist layer 21 and the resist layer 21 is peeled off by the peeling tape. Alternatively, the resist layer 21 may be dissolved and removed with a chemical solution.

  As shown in FIG. 13, a tape sticking process is implemented after a mask removal process. In the tape attaching step, the tape T is attached to the surface 16 of the wafer W by the attaching roller 31 of the tape mounter. The tape T may be attached to the front surface 16 of the wafer W by the operator's manual work.

  As shown in FIG. 14, a back grinding process is implemented after a tape sticking process. In the back surface grinding step, the wafer W is held on a chuck table of a grinding device (not shown) with the back surface 17 of the wafer W facing upward. The grinding wheel 33 is positioned above the wafer W, and the wafer W is ground by the rotational contact between the grinding wheel 33 and the back surface 17 of the wafer W. Then, when the wafer W is ground to the finished thickness L, the deep grooves 25 are exposed from the back surface 17 of the wafer W, and the wafer W is divided into individual chips. In addition, you may make it the structure by which grinding damage is removed from the back surface 17 of the chip | tip after grinding by an etching or polishing.

  As described above, in the method for dividing the wafer W according to the second embodiment, as in the first embodiment, the wafer W can be separated into individual wafers without reducing the bending strength of the divided chips. Can be divided into chips. Further, since the wafer W is divided by dry etching, it is effective for the wafer W corresponding to the reduction in the chip size. Further, since it is not necessary to carry the wafer W with a ring frame (not shown), it is easy to carry.

  In addition, this invention is not limited to the said embodiment, It can change and implement variously. In the above-described embodiment, the size, shape, and the like illustrated in the accompanying drawings are not limited to this, and can be appropriately changed within a range in which the effect of the present invention is exhibited. In addition, various modifications can be made without departing from the scope of the object of the present invention.

  For example, in the first embodiment described above, the tape adhering process is performed after the mask forming process, but the present invention is not limited to this structure. The tape sticking process should just be implemented before the division | segmentation process, for example, a tape sticking process may be implemented before a mask formation process.

  As described above, the present invention has an effect that the wafer on which the insulating film is formed can be appropriately divided without lowering the bending strength of the chip after division. This is useful for a method of dividing a wafer in which an insulating film such as a film is laminated.

11 Low-k film (insulating film)
14 TEG (measurement pattern)
15 Line to be Divided 16 Wafer Front 17 Wafer Back 21 Resist Layer 22 Cutting Groove 25 Deep Groove 32 Cutting Blade 33 Grinding Wheel D Device W Wafer

Claims (2)

A wafer having an insulating film formed on the surface, a division line that divides the device, and a measurement pattern that is disposed in the insulating film of the division line and that measures the device, along the division line A method of dividing a wafer,
A mask forming step of masking the device of the wafer excluding the division line;
An insulating film removing step of removing the insulating film by dry etching the line to be divided that is not masked in the mask forming step;
The cutting blade of the thin width than the predetermined width of the dividing lines were cut in the surface of al plants constant depth of the wafer, the dividing of the insulating film is removed without contacting the said cutting blade in the mask A cutting groove forming step of forming a cutting groove from which the measurement pattern of the line is removed;
A dividing step of dry-etching the cutting groove formed in the cutting groove forming step in a wafer thickness direction and dividing the cutting groove along the division-scheduled line;
A mask removing step for removing the mask formed in the mask forming step;
A method of dividing a wafer. A wafer having an insulating film formed on the surface, a division line that divides the device, and a measurement pattern that is disposed in the insulating film of the division line and that measures the device, along the division line A method of dividing a wafer,
A mask forming step of masking the device of the wafer excluding the division line;
An insulating film removing step of removing the insulating film by dry etching the line to be divided that is not masked in the mask forming step;
The cutting blade of the thin width than the predetermined width of the dividing lines were cut in the surface of al plants constant depth of the wafer, the dividing of the insulating film is removed without contacting the said cutting blade in the mask A cutting groove forming step of forming a cutting groove from which the measurement pattern of the line is removed;
A deep groove forming step of forming a deep groove along the line to be divided by dry etching the cut groove formed in the cutting groove forming step from the surface of the wafer to a depth reaching a finished thickness in the thickness direction of the wafer;
Grinding the wafer from the back surface to the finished thickness and dividing the wafer,
A mask removing step for removing the mask formed in the mask forming step;
A method of dividing a wafer.

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